TXS02324 [TI]
Dual-Supply 2:1 SIM Card Multiplexer/Translator With Slot Dedicated Dual LDO; 双电源2 ： 1 SIM卡多路复用器/转换器采用专用插槽双通道LDO
| 型号： | TXS02324 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Dual-Supply 2:1 SIM Card Multiplexer/Translator With Slot Dedicated Dual LDO |
| 文件： | 总25页 (文件大小：608K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TXS02324
www.ti.com
SCES823 –FEBRUARY 2011
Dual-Supply 2:1 SIM Card Multiplexer/Translator
With Slot Dedicated Dual LDO
Check for Samples: TXS02324
1
FEATURES
RUK PACKAGE
(TOP VIEW)
•
Level Translator
VDDIO Range of 1.7 V to 3.3 V
Low-Dropout (LDO) Regulator
–
•
15 14 13
12 11
–
–
–
–
50-mA LDO Regulator With Enable
16
17
18
19
20
10
RSTX
DNU
SIMCLK
1.8-V or 2.95-V Selectable Output Voltage
2.3-V to 5.5-V Input Voltage Range
9
SIMRST
8
GND
SIM1CLK
Very Low Dropout: 100 mV (Max) at 50 mA
7
SIM2CLK
SIM2IO
SIM1IO
6
SIM1RST
•
•
Control and Communication Through I2C
1
2
3
4
5
Interface With Baseband Processor
ESD Protection Exceeds JESD 22
–
–
2000-V Human-Body Model (A114-B)
1000-V Charged-Device Model (C101)
Note: The Exposed Thermal Pad must be
connect to Ground.
•
Package
20-Pin QFN (3 mm x 3 mm)
–
DESCRIPTION/ORDERING INFORMATION
The TXS02324 is a complete dual-supply standby Smart Identity Module (SIM) card solution for interfacing
wireless baseband processors with two individual SIM subscriber cards to store data for mobile handset
applications. It is a custom device which is used to extend a single SIM/UICC interface to be able to support two
SIMs/UICCs.
The device complies with ISO/IEC Smart-Card Interface requirements as well as GSM and 3G mobile standards.
It includes a high-speed level translator capable of supporting Class-B (2.95 V) and Class-C (1.8 V) interfaces,
two low-dropout (LDO) voltage regulators that have output voltages that are selectable between 2.95-V Class-B
and 1.8-V Class-C interfaces, an integrated "fast-mode" 400 kb/s "slave" I2C control register interface for
configuration purposes, a 32-kHz clock input for internal timing generation.
The voltage-level translator has two supply voltage pins. VDDIO sets the reference for the baseband interface
and can be operated from 1.7 V to 3.3 V. VSIM1 and VSIM2 are programmed to either 1.8 V or 2.95 V, each
supplied by an independent internal LDO regulator. The integrated LDO accepts input battery voltages from 2.3
V to 5.5 V and outputs up to 50 mA to the B-side circuitry and external Class-B or Class-C SIM card.
ORDERING INFORMATION(1)
TA
PACKAGE(2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
ZUY
–40°C to 85°C
QFN – RUK
Tape and reel
TXS02324RUKR
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
© 2011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TXS02324
SCES823 –FEBRUARY 2011
www.ti.com
VBAT
3-V or 1.8-V
SIM Card
I2C
Control
Logic
SCK
SDA
VSIM1
LDO
V
GND
VPP
I/O
CC
SIM1_RST
SIM1_CLK
Reset
CLK
NC
SIM_RST
SIM_CLK
NC
Translator
SIM1_I/O
SIM_I/O
V_I/O
Baseband
V
CC
3-V or 1.8-V
SIM Card
RSTX
IRQ
VSIM2
LDO
V
GND
VPP
I/O
CC
SIM2_RST
SIM2_CLK
Reset
CLK
NC
NC
Translator
SIM2_I/O
GND
TXS02324
Figure 1. Interfacing With SIM Card
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NO.
SCES823 –FEBRUARY 2011
TERMINAL FUNCTIONS
POWER
DOMAIN
NAME
TYPE(1)
DESCRIPTION
1
2
SIM2RST
VSIM2
VBAT
O
O
P
VSIM2
VSIM2
VBAT
SIM2 reset
1.8 V/2.95 V supply voltage to SIM2
Battery power supply
Ground
3
4
GND
G
O
O
I/O
O
I
5
VSIM1
SIM1RST
SIM1IO
SIM1CLK
SIMRST
SIMCLK
SIMIO
VDDIO
SCL
VSIM1
VSIM1
VSIM1
VSIM1
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
-
1.8 V/2.95 V supply voltage to SIM1
SIM1 reset
6
7
SIM1 data
8
SIM1 clock
9
UICC/SIM reset from baseband
UICC/SIM clock
10
11
12
13
14
15
16
17
18
19
20
I
I/O
P
UICC/SIM data
1.8-V power supply for device operation and I/O buffers toward baseband
I2C clock
I2C data
I
SDA
I/O
I/O
I
IRQ
Interrupt to baseband. This signal is used to set the I2C address.
RSTX
Active-low reset input from baseband
DNU
I
Do not use. Should not be electrically connected.
GND
G
O
I/O
GROUND
SIM2 clock
SIM2 data
SIM2CLK
SIM2IO
VSIM2
VSIM2
(1) G = Ground, I = Input, O = Output, P = Power
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Table 1. Register Overview
REGISTER BITS
COMMAND
BYTE
READ
OR
WRITE
POWER-UP
DEFAULT
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
(HEX)
Device
hardware
revision
0
0
0
1
0
0
0
1
00h
R
0001 0001
information
Software
revision
information
0
0
0
0
0
0
0
0
01h
04h
R
R
0000 0000
0000 0000
SIM2 Interface
Status
SIM1 Interface
Status
Status
Register
Unused
Unused
Unused Unused
SIM2
SIM1
SIM1
SIM
SIM2
SIM2 Interface
Status
LDO
SIM1 Interface
Status
LDO
Interface
Control
Register
Voltage
Enable/
Select
Voltage
Enable/
Select
08h
R/W
0000 0000
Disable
Disable
4
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SCES823 –FEBRUARY 2011
Table 2. Device Hardware Revision Register (00h)
Device HW Driver Register
HW identification
Bits(s)
Type (R/W)
Description
This register contains the manufacturer and
device ID(1) (value to be specified by the
manufacturer)
7:0
R
(1) The manufacturer ID part of this data shall remain unchanged when the HW revision ID is updated. The manufacturer ID shall uniquely
identify the manufacturer. The manufacturer ID is encoded on the MSB nibble.
Table 3. Device Software Revision Register (01h)
Device SW Driver Register
Bits(s)
Type (R/W)
Description
This register contains information about the
SW driver required for this device. This
information shall only be updated when
changes to the device requires SW
SW Driver Version
7:0
R
modifications. Initial register value is 00h
Table 4. Status Register (04h)
Status Register
Bits(s)
Type (R/W)
Unused
Description
Unused
Unused
Unused
Unused
Unused
0
1
2
3
Unused
Unused
Unused
Unused
Unused
Unused
Status of SIM1 interface
'00' Powered down with pull-downs activated
'01' Isolated with pull-downs deactivated
'10' Powered with pull downs activated
'11' Active with pull downs deactivated
SIM1 Interface Status [1:0]
SIM2 Interface Status [1:0]
5:4(1)
R
R
Status of SIM2 interface
'00' Powered down with pull-downs activated
'01' Isolated with pull-downs deactivated
'10' Powered with pull downs activated
'11' Active with pull downs deactivated
7:6(1)
(1) The content of bits 5:4 and 7:6 reflects the value written to the state bits in the SIM Interface control register 3:2 and 7:6 respectively
and the setting of the regulator bits in the SIM interface control register 0 and 4 respectively.
Table 5. SIM Interface Control Register (08h)(1)(2)
Status Register
Bit(s)
Type (R/W)
Description
'0' Regulator is off, regulator output is pulled
down
'1' Regulator is powered on, regulator output
pull-down is released
SIM1 Regulator Control
0
R/W
'0' 1.8 V
'1' 2.95 V
SIM1 Regulator Voltage Selection
SIM1 Interface State [1:0]
1
R/W
R/W
Status of SIM1 interface
'00' Powered down state with pull-downs
activated
'01' Isolated state with pull-downs
deactivated
3:2
'10' Not allowed
'11' Active state with pull downs deactivated
'0' Regulator is off, regulator output is pulled
down
'1' Regulator is powered on, regulator output
pull-down is released
SIM2 Regulator Control
(1) Reset value: 00h
4
R/W
(2) The state '10', on bits 3:2 and 7:6, is not prevented by HW but shall never be set by SW. State '10' means that the interface is powered
with the pull-downs active, this state correspond to state '00' with the regulator being switched on. Setting the state to '10' does not have
any impact on the corresponding regulator bit setting. The regulator control bits do not impact the state bits in this register. The regulator
control bits however do impact the status bits in the status register.
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Table 5. SIM Interface Control Register (08h)(1)(2) (continued)
Status Register
Bit(s)
Type (R/W)
Description
'0' 1.8 V
'1' 2.95 V
SIM2 Regulator Voltage
5
R/W
Status of SIM2 interface
'00' Powered down state with pull-downs
activated
SIM2 Interface State [1:0]
7:6
R/W
'01' Isolated state with pull-downs
deactivated
'10' Not allowed
'11' Active state with pull downs deactivated
6
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SCES823 –FEBRUARY 2011
BASIC DEVICE OPERATION
The TXS02324 is controlled through a standard I2C interface reference to VDDIO. It is connected between the
two SIM card slots and the SIM/UICC interface of the baseband. The device uses VBAT and VDDIO as supply
voltages. The supply voltage for each SIM card is generated by an on-chip low drop out regulator. The interface
between the baseband and the TXS02324 is reference to VDDIO while the interface between the TXS02324 and
the SIM card is referenced to the LDO output of either VSIM1 or VSIM2 depending on which slot is being
selected. The VDDIO on the baseband side normally does not exceed 1.8V, thus voltage level shifting is needed
to support a 3V SIM/UICC interface (Class B).
The TXS02324 has two basic states, the reset and operation state. The baseband utilizes information in the
status registers to determine how to manipulate the control registers to properly switch between two SIM cards.
These fundamental sequences are outlined below and are to help the user to successfully incorporate this device
into the system.
DEVICE ADDRESS
The address of the device is shown below:
Slave Address
IRQ
0
1
1
1
1
0
R/W
Address Reference
IRQ@ Reset
R/W
0 (W)
1 (R)
0 (W)
1 (R)
Slave Address
0
0
1
1
120 (decimal), 78(h)
121 (decimal), 79(h)
122 (decimal), 7A(h)
123 (decimal), 7B(h)
RESET STATE
In the reset state the device settings are brought back to their default values and any SIM card that has been
active is deactivated. After reset, neither of the UICC/SIM interfaces is selected. The active pull-downs at the
UICC/SIM interface are automatically activated. To ensure the system powers up in an operational state, device
uses an internal 32 KHz clock for internal timing generation.
•
•
Power up the TXS02324 by asserting VBAT to enter the operation state
I2C Interface becomes active with the VDDIO supply
RESET summary:
•
•
•
•
Any pending interrupts are cleared
I2C registers are in the default state
Both on chip regulators are set to 1.8V and disabled
All SIM1 and SIM2 signals are pulled to GND
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SETTING UP THE SIM INTERFACE
The TXS02324 supports both Class C (1.8V) or Class B (2.95V) SIM cards. In order to support these cards
types, the interface on the SIM side needs to be properly setup. After power up, the system should default to
SIM1 card. The following sequence outlines a rudimentary sequence of preparing the SIM1 card interface:
•
Configure the SIM1 regulator to 1.8V by asserting B1 = 0 in the SIM Interface Control Register (08h). The
system by default should start in 1.8V mode.
•
•
•
•
•
•
The baseband SIM interface is set to a LOW state.
Disable the SIM1 interface by asserting B2 = 0 and B3 = 0 in the SIM Interface Control Register.
Disable the SIM2 interface by asserting B6 = 0 and B7 = 0 in the SIM Interface Control Register.
VSIM1 voltage regulator should now be activated by asserting B0 = 1 in the SIM Interface Control Register.
Enable the SIM1 interface by asserting B2 = 1 and B3 = 1 in the SIM Interface Control Register.
The SIM1 interface (VSIM1, SIM1CLK, SIM1I/O) is now active. The TXS02324 relies on the baseband to
perform the power up sequencing of the SIM card. If there is lack of communication between the baseband
and the SIM card, the SIM1 interface must be powered-down and then powered up again through the
regulator by configuring it to 2.95V by asserting B1 = 1 in the SIM Interface Control Register.
SWITCHING BETWEEN SIM CARDS
The following sequence outlines a rudimentary sequence of switching between the SIM1 card and SIM2 card:
•
Put the SIM1 card interface into “clock stop” mode then assert B2 = 1 and B3 = 0 in the SIM Interface Control
Register (08h). This will latch the state of the SIM1 interface (SIM1CLK, SIM1I/O, SIM1RST).
•
There can be two scenarios when switching to SIM2 card:
–
SIM2 may be in the power off mode, B6 = 0 and B7 = 0 in the Status Register (04h). If SIM2 is in power
off mode, the SIM/UICC interface will need to be set to the power off state. In this case the baseband will
most likely need to go through a power up sequence iteration
–
SIM2 may already be in the “clock stop” mode, B6 = 1 and B7 = 0 in the Status Register (04h). If SIM2 is
in “clock stop” mode, the interface between the baseband and the device is set to the clock stop mode
levels that correspond to the SIM2 card interface.
•
•
After determining whether the SIM2 card is either in power off mode or clock stop mode, the SIM2 card
interface is then activated by asserting B6 = 1 and B7 = 1 in the SIM Interface Control Register (08h) and the
negotiation between the baseband and card can continue.
Switching from SIM2 to SIM1 done in the same manner.
8
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SCES823 –FEBRUARY 2011
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
Level Translator(1)
MIN
–0.3
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
MAX
4.0
UNIT
VDDIO
VI
Supply voltage range
Input voltage range
V
V_I/O-port
VSIMx-port
Control inputs
V_I/O-port
VSIMx-port
V_I/O-port
VSIMx-port
VI < 0
4.6
4.6
V
4.6
4.6
Voltage range applied to any output in the high-impedance or
power-off state
VO
VO
V
V
4.6
4.6
Voltage range applied to any output in the high or low state
4.6
IIK
IOK
IO
Input clamp current
–50
–50
±50
±100
150
mA
mA
mA
mA
°C
Output clamp current
VO < 0
Continuous output current
Continuous current through VCCA or GND
Storage temperature range
Tstg
–65
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
LDO(1)
MIN
–0.3
–0.3
–55
–55
MAX
6
UNIT
V
VIN
Input voltage range
VOUT
TJ
Output voltage range
6
V
Junction temperature range
Storage temperature range
150
150
2
°C
°C
kV
V
Tstg
Human-Body Model (HBM)
ESD rating
Charged-Device Model (CDM)
1000
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
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THERMAL IMPEDANCE RATINGS
UNIT
θJA
Package thermal impedance(1)
RUK package
94.1
°C/W
(1) The package thermal impedance is calculated in accordance with JESD 51-7.
RECOMMENDED OPERATING CONDITIONS(1)
Level Translator
Description
MIN
MAX
3.3
UNIT
V
VDDIO
VIH
Supply voltage
1.7
High-level input voltage
Applies to pins: RSTX, SCL,
SDA, IRQ, SIMRST, SIMCLK,
SIMIO
VDDIO × 0.7
1.9
V
VIL
Low-level input voltage
0
VDDIO × 0.3
V
Δt/Δv
Input transition rise or fall rate
Operating free-air temperature
5
ns/V
TA
–40
85
°C
(1) All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
10
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SCES823 –FEBRUARY 2011
ELECTRICAL CHARACTERISTICS
Level Translator
over recommended operating free-air temperature range (unless otherwise noted)
TYP(
PARAMETER
TEST CONDITIONS
VDDIO
VSIM1
VSIM2
MIN
MAX
UNIT
1)
SIM1RST
SIM1CLK
VSIM1 × 0.8
VSIM1 × 0.8
IOH = –100 µA
Push-Pull
IOH = –10 µA
Open-Drain
SIM1IO
VSIM1 × 0.8
1.8 V / 2.95 1.8 V / 2.95
SIM2RST
1.7 V to
3.3 V
V
V
VSIM2 × 0.8
VSIM2 × 0.8
IOH = –100 µA
Push-Pull
VOH
V
(Supplied
by LDO)
(Supplied by
LDO)
SIM2CLK
IOH = –10 µA
Open-Drain
SIM2IO
VSIM2 × 0.8
VDDIO × 0.8
IOH = –10 µA
Open-Drain
SIMIO
SIM1RST
SIM1CLK
SIM1IO
IOL = 1 mA
Push-Pull
VSIM1 × 0.2
VSIM1 × 0.2
0.3
IOL = 1 mA
Push-Pull
IOL = 1 mA
Open-Drain
1.8 V / 2.95 1.8 V / 2.95
IOL = 1 mA
Push-Pull
1.7 V to
3.3 V
V
V
VOL SIM2RST
SIM2CLK
SIM2IO
VSIM2 × 0.2
VSIM2 × 0.2
0.3
V
(Supplied
by LDO)
(Supplied by
LDO)
IOL = 1 mA
Push-Pull
IOL = 1 mA
Open-Drain
IOL = 1 mA
Open-Drain
SIMIO
0.3
1.8 V / 2.95 1.8 V / 2.95
Control
inputs
1.7 V to
3.3 V
V
V
II
VI = OE
±1
±5
µA
µA
(Supplied
by LDO)
(Supplied by
LDO)
1.8 V / 2.95 1.8 V / 2.95
VI = VCCI
IO = 0
1.7 V to
3.3 V
V
V
ICC I/O
(Supplied
by LDO)
(Supplied by
LDO)
SIM_I/O
port
7
4
Cio
Ci
pF
pF
SIMx port
Control
inputs
VI = V_I/O or GND
3
Clock input
(1) All typical values are at TA = 25°C.
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ELECTRICAL CHARACTERISTICS
LDO (Control Input Logic = High)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
2.3
TYP(1)
MAX
5.5
UNIT
VBAT
VOUT
VDO
Input voltage
V
Class-B Mode
Class-C Mode
IOUT = 50 mA
IOUT = 0 mA
2.82
1.65
2.95
1.8
3.18
1.95
100
35
Output voltage
V
Dropout voltage
Ground-pin current
mV
µA
IGND
IOUT = 50 mA
150
VENx ≤ 0.4 V, (VSIMx + VDO) ≤ VBAT ≤ 5.5
ISHDN
Shutdown current (IGND
)
V,
3
µA
TJ = 85°C
IOUT(SC)
COUT
Short-circuit current
Output Capacitor
RL = 0 Ω
400
mA
1
µF
VBAT = 3.25 V,
VSIMx = 1.8 V or 3 V,
COUT = 1 µF, IOUT = 50 mA
f = 1 kHz
50
40
PSRR
Power-supply rejection ratio
dB
f = 10 kHz
VSIMx = 1.8 V or 3 V, IOUT = 10 mA,
COUT = 1 µF
TSTR
TJ
Start-up time
50
85
µS
°C
Operating junction
temperature
–40
(1) All typical values are at TA = 25°C.
GENERAL ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
mV
Hyst
Internal hysteresis of comparator
SIM I/O pull-up
±50
20
RSIMPU
kΩ
Class B
Class C
7.5
4.5
RSIMxPU
RSIMPD
SIMx I/O pull-up
kΩ
kΩ
Active pull-downs are connected to
the VSIM1/2 regulator output to the
SIM1/2 CLK, SIM1/2 RST, SIM1/2
I/O when the respective regulator is
disabled
SIMx I/O pull-down
2
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SWITCHING CHARACTERISTICS
VSIMx = 1.8 V or 2.95 V Supplied by Internal LDO, VBAT = 2.3V to 5.5V
over recommended operating free-air temperature range (unless otherwise noted)
V_I/O = 1.7 V to 3.3 V
TEST
CONDITIONS
PARAMETER
UNIT
TYP
210
4.3
4
SIMIO
SIMRST
SIMCLK
SIMxIO
Open Drain
ns
ns
ns
ns
ns
ns
trA
Push Pull
Push Pull
Open Drain
Push Pull
Push Pull
Baseband side to SIM side
16
4
trA
SIMRST
SIMxCLK
Baseband side to SIM side
5
trB
SIMxIO
SIMxIO
Open Drain
Open Drain
210
6
ns
ns
SIM side to Baseband side
trB
SIM side to Baseband side
fmax
SIMxCLK
Push Pull
Push Pull
Push Pull
Open Drain
Open Drain
Push Pull
Push Pull
Open Drain
Open Drain
5
8
MHz
ns
SIMCLK to SIMxCLK
SIMRST to SIMxRST
SIMIO to SIMxIO
SIMxIO to SIMIO
SIMCLK to SIMxCLK
SIMRST to SIMxRST
SIMIO to SIMxIO
SIMxIO to SIMIO
8
ns
tPLH
260
260
7
ns
ns
ns
7
ns
tPHL
23
23
ns
ns
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TXS02324
SCES823 –FEBRUARY 2011
www.ti.com
OPERATING CHARACTERISTICS
TA = 25°C, VSIMx = 1.8 V for Class C, VSIMx = 2.95 V for Class B
TEST
CONDITIONS
PARAMETER
TYP
UNIT
Class B
Class C
CL = 0,
f = 5 MHz,
tr = tf = 1 ns
11
(1)
Cpd
pF
9.5
(1) Power dissipation capacitance per transceiver
14
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Product Folder Link(s): TXS02324
TXS02324
www.ti.com
SCES823 –FEBRUARY 2011
APPLICATION INFORMATION
The LDO’s included on the TXS02324 achieve ultra-wide bandwidth and high loop gain, resulting in extremely
high PSRR at very low headroom (VBAT – VSIM1/2). The TXS02324 provides fixed regulation at 1.8V or 2.95V.
Low noise, enable (through I2C control), low ground pin current make it ideal for portable applications. The device
offers sub-bandgap output voltages, current limit and thermal protection, and is fully specified from –40°C to
+85°C.
VSIM1
VDDIO
VBAT
TXS02324
0.1μF
VSIM2
GND
0.1μF
0.1μF
0.1μF
Figure 2. Typical Application circuit for TXS02324
Input and Output Capacitor Requirements
It is good analog design practice to connect a 1.0 μF low equivalent series resistance (ESR) capacitor across the
input supply (VBAT) near the regulator. Also, a 0.1uF is required for the logic core supply (VDDIO).
This capacitor will counteract reactive input sources and improve transient response, noise rejection, and ripple
rejection. A higher-value capacitor may be necessary if large, fast rise-time load transients are anticipated or if
the device is located several inches from the power source. The LDO’s are designed to be stable with standard
ceramic capacitors of values 1.0 μF or larger. X5R- and X7R-type capacitors are best because they have
minimal variation in value and ESR over temperature. Maximum ESR should be < 1.0 Ω.
Output Noise
In most LDO’s, the bandgap is the dominant noise source. To improve ac performance such as PSRR, output
noise, and transient response, it is recommended that the board be designed with separate ground planes for VIN
and VOUT, with each ground plane connected only at the GND pin of the device. In addition, the ground
connection for the bypass capacitor should connect directly to the GND pin of the device.
Internal Current Limit
The TXS02324 internal current limit helps protect the regulator during fault conditions. During current limit, the
output sources a fixed amount of current that is largely independent of output voltage. For reliable operation, the
device should not be operated in a current limit state for extended periods of time.
The PMOS pass element in the TXS02324 has a built-in body diode that conducts current when the voltage at
VSIM1/2 exceeds the voltage at VBAT. This current is not limited, so if extended reverse voltage operation is
anticipated, external limiting may be appropriate.
Dropout Voltage
The TXS02324 uses a PMOS pass transistor to achieve low dropout. When (VBAT – VSIM1/2) is less than the
dropout voltage (VDO), the PMOS pass device is in its linear region of operation and the input-to-output
resistance is the RDS(ON) of the PMOS pass element. VDO will approximately scale with output current because
the PMOS device behaves like a resistor in dropout.
Startup
The TXS02324 uses a quick-start circuit which allows the combination of very low output noise and fast start-up
times. Note that for fastest startup, VBATT should be applied first, and then enabled by asserting the I2C register.
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SCES823 –FEBRUARY 2011
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Transient Response
As with any regulator, increasing the size of the output capacitor reduces over/undershoot magnitude but
increases duration of the transient response.
Minimum Load
The TXS02324 is stable and well-behaved with no output load. Traditional PMOS LDO regulators suffer from
lower loop gain at very light output loads. The TXS02324 employs an innovative low-current mode circuit to
increase loop gain under very light or no-load conditions, resulting in improved output voltage regulation
performance down to zero output current.
THERMAL INFORMATION
Thermal Protection
Thermal protection disables the output when the junction temperature rises to approximately +160°C, allowing
the device to cool. When the junction temperature cools to approximately +140°C the output circuitry is again
enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection
circuit may cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage
because of overheating.
Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate
heat sink. For reliable operation, junction temperature should be limited to +85°C maximum. To estimate the
margin of safety in a complete design (including heat sink), increase the ambient temperature until the thermal
protection is triggered; use worst-case loads and signal conditions. For good reliability, thermal protection should
trigger at least +35°C above the maximum expected ambient condition of your particular application. This
configuration produces a worst-case junction temperature of +85°C at the highest expected ambient temperature
and worst-case load.
The internal protection circuitry of the TXS02324 has been designed to protect against overload conditions. It
was not intended to replace proper heat sinking. Continuously running the TXS02324 into thermal shutdown will
degrade device reliability.
TYPICAL CHARACTERISTICS
110
100
90
80
70
60
50
40
30
20
10
0
-90
-80
-70
-60
-50
-40
-30
-20
1.8 V Vsim
85°C Vsim
2.95 V Vsim
-40°C Vsim
25°C Vsim
-10
0
100
1000
10000
100000
1000000
0
5
10 15 20 25 30 35 40 45 50
- Output Current - mA
f - Frequency - Hz
I
OUT
Figure 3. PSRR
Figure 4. Dropout Voltage vs Output Current
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Product Folder Link(s): TXS02324
TXS02324
www.ti.com
SCES823 –FEBRUARY 2011
TYPICAL CHARACTERISTICS (continued)
1
0.8
0.6
0.4
0.2
0
0
I
= 50 mA
O
-0.2
-0.4
-100 mA, Vsim
-0.6
-40°C Vsim
-0.2
-0.4
-0.6
-0.8
-1
85°C Vsim
-0.8
-1
-1.2
-1.2
-1.4
-50 mA, Vsim
-1.4
-1.6
25°C Vsim
-1.6
-1.8
-2
-2.2
-2.4
-1.8
-2
0
5
10 15 20 25 30 35 40 45 50
- Output Current - mA
-40 -30 -20 -10
0
10 20 30 40 50 60 70 80
- Temperature - °C
I
OUT
T
A
Figure 5. Output Voltage vs Temperature, Class-B/C
Figure 6. Load Regulation, Iout = 50 mA, Class-C
0.2
0
0
-0.2
-0.4
-0.6
-0.8
-1
I = 50 mA
O
-40°C Vsim
-0.2
-0.4
-0.6
-40°C Vsim
25°C Vsim
25°C Vsim
-0.8
-1.2
-1.4
-1.6
-1.8
-2
85°C Vsim
-1
-1.2
85°C Vsim
-1.4
-1.6
I
= 50 mA
-1.8
-2
-2.2
-2.4
O
0
5
10 15 20 25 30 35 40 45 50
- Output Current - mA
2.7
3.1
3.5
3.9
V
4.3
- V
4.7
5.1
5.5
I
BAT
OUT
Figure 7. Load Regulation, Iout = 50 mA, Class-B
Figure 8. Line Regulation, Iout = 50 mA, Class-C
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SCES823 –FEBRUARY 2011
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TYPICAL CHARACTERISTICS (continued)
330
0
I
= 50 mA
O
-0.2
-0.4
-0.6
-0.8
-1
300
-40°C Vsim
25°C Vsim
270
240
210
180
150
120
90
-40°C Vsim
25°C Vsim
85°C Vsim
85°C Vsim
-1.2
-1.4
-1.6
-1.8
-2
60
30
-2.2
-2.4
0
2.7
3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5
3.5
3.1
3.9
V
4.3
- V
4.7
5.1
5.5
V
- V
BAT
BAT
Figure 9. Line Regulation, Iout = 50 mA, Class-B
Figure 10. Current Limit vs Input Voltage, Class-B/C
150
-50 mA, Vsim
120
90
60
30
-100 mA, Vsim
0
-40 -30 -20 -10
0
10 20 30 40 50 60 70 80
- ºC
T
A
Figure 11. Ground Current vs Temperature, Class-C
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Product Folder Link(s): TXS02324
PACKAGE OPTION ADDENDUM
www.ti.com
19-Feb-2011
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
TXS02324RUKR
ACTIVE
QFN
RUK
20
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Feb-2011
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TXS02324RUKR
QFN
RUK
20
3000
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Feb-2011
*All dimensions are nominal
Device
Package Type Package Drawing Pins
QFN RUK 20
SPQ
Length (mm) Width (mm) Height (mm)
346.0 346.0 29.0
TXS02324RUKR
3000
Pack Materials-Page 2
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