SI2367DS-T1-GE3 [VISHAY]
P-CH MOSFET SOT-23 20V 66MOHM @ 4.5V - Tape and Reel;型号: | SI2367DS-T1-GE3 |
厂家: | VISHAY |
描述: | P-CH MOSFET SOT-23 20V 66MOHM @ 4.5V - Tape and Reel 开关 光电二极管 晶体管 |
文件: | 总10页 (文件大小:245K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
New Product
Si2367DS
Vishay Siliconix
P-Channel 20-V (D-S) MOSFET
FEATURES
PRODUCT SUMMARY
•
Halogen-free According to IEC 61249-2-21
VDS (V)
RDS(on) (Ω)
Qg (Typ.)
I
D (A)d
Definition
0.066 at VGS = - 4.5 V
0.086 at VGS = - 2.5 V
0.130 at VGS = - 1.8 V
- 3.8
- 3.3
- 2.7
•
•
•
TrenchFET® Power MOSFET
- 20
9 nC
100 % R Tested
g
Compliant to RoHS Directive 2002/95/EC
TO-236
(SOT-23)
APPLICATIONS
•
Load Switch for Portable Devices
•
DC/DC Converter
G
S
1
3
2
S
D
G
Top View
Si2367DS (H7)*
* Marking Code
D
Ordering Information: Si2367DS-T1-GE3 (Lead (Pb)-free and Halogen-free)
P-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS T = 25 °C, unless otherwise noted
A
Parameter
Symbol
Limit
Unit
VDS
Drain-Source Voltage
Gate-Source Voltage
- 20
8
V
VGS
T
C = 25 °C
C = 70 °C
- 3.8
- 3.0
T
ID
Continuous Drain Current (TJ = 150 °C)
- 2.8a, b
- 2.2a, b
- 15
TA = 25 °C
TA = 70 °C
A
IDM
IS
Pulsed Drain Current (10 µs Pulse Width)
Continuous Source-Drain Diode Current
TC = 25 °C
- 1.4
- 0.8a, b
1.7
TA = 25 °C
TC = 25 °C
TC = 70 °C
1.1
PD
W
Maximum Power Dissipation
0.96a, b
T
A = 25 °C
0.62a, b
TA = 70 °C
TJ, Tstg
Operating Junction and Storage Temperature Range
- 55 to 150
°C
THERMAL RESISTANCE RATINGS
Parameter
Maximum Junction-to-Ambienta, c
Symbol
Typical
Maximum
130
Unit
RthJA
t ≤ 5 s
100
60
°C/W
RthJF
Maximum Junction-to-Foot (Drain)
Steady State
75
Notes:
a. Surface Mounted on 1" x 1" FR4 board.
b. t = 5 s.
c. Maximum under Steady State conditions is 175 °C/W.
d. TC = 25 °C.
Document Number: 65015
S09-1218-Rev. A, 29-Jun-09
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1
New Product
Si2367DS
Vishay Siliconix
SPECIFICATIONS T = 25 °C, unless otherwise noted
J
Parameter
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
Static
VDS
ΔVDS/TJ
ΔVGS(th)/TJ
VGS(th)
VGS = 0 V, ID = - 250 µA
ID = - 250 µA
Drain-Source Breakdown Voltage
- 20
V
V
DS Temperature Coefficient
- 20
mV/°C
VGS(th) Temperature Coefficient
- 2.5
VDS = VGS, ID = - 250 µA
Gate-Source Threshold Voltage
Gate-Source Leakage
- 0.4
- 1
100
- 1
V
IGSS
VDS = 0 V, VGS
=
8 V
nA
VDS = - 20 V, VGS = 0 V
DS = - 20 V, VGS = 0 V, TJ = 55 °C
VDS ≤ - 5 V, VGS = - 4.5 V
IDSS
Zero Gate Voltage Drain Current
On-State Drain Currenta
µA
A
V
- 10
ID(on)
- 5
VGS = - 4.5 V, ID = - 2.5 A
0.055
0.071
0.100
7.5
0.066
0.086
0.130
Drain-Source On-State Resistancea
RDS(on)
V
GS = - 2.5 V, ID = - 2.0 A
GS = - 1.8 V, ID = - 1.5 A
Ω
V
Forward Transconductancea
gfs
VDS = - 10 V, ID = - 2.5 A
S
Dynamicb
Ciss
Coss
Crss
Qg
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Gate Resistance
Turn-On Delay Time
Rise Time
561
112
89
15
9
VDS = - 10 V, VGS = 0 V, f = 1 MHz
VDS = - 10 V, VGS = - 8 V, ID = - 2.5 A
VDS = - 10 V, VGS = - 4.5 V, ID = - 2.5 A
f = 1 MHz
pF
23
Qg
13.5
nC
Qgs
Qgd
Rg
1.0
2.5
10
20
20
40
10
8
2
20
40
40
70
20
16
18
65
18
Ω
td(on)
tr
td(off)
tf
td(on)
tr
td(off)
tf
V
DD = - 10 V, RL = 5 Ω
ID ≅ - 2 A, VGEN = - 4.5 V, Rg = 1 Ω
Turn-Off Delay Time
Fall Time
ns
Turn-On Delay Time
Rise Time
9
V
DD = - 10 V, RL = 5 Ω
ID ≅ - 2 A, VGEN = - 8 V, Rg = 1 Ω
Turn-Off Delay Time
Fall Time
35
9
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulse Diode Forward Current
IS
ISM
VSD
trr
TC = 25 °C
- 1.4
- 15
- 1.2
35
A
IS = - 2 A, VGS = 0 V
Body Diode Voltage
- 0.79
21
V
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Reverse Recovery Fall Time
ns
nC
Qrr
ta
15
25
IF = - 2 A, dI/dt = 100 A/µs, TJ = 25 °C
9
ns
tb
Reverse Recovery Rise Time
12
Notes:
a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
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Document Number: 65015
S09-1218-Rev. A, 29-Jun-09
New Product
Si2367DS
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
15
2.5
2.0
1.5
1.0
0.5
0.0
V
GS
= 5 V thru 2.5 V
12
9
V
GS
= 2 V
6
T
C
= 25 °C
V
GS
= 1.5 V
3
T
C
= 125 °C
0.4
V
GS
= 0.5 V, 1 V
1.8
T
C
= - 55 °C
0
0.0
0.6
1.2
2.4
3.0
0.0
0.8
1.2
1.6
2.0
V
DS
- Drain-to-Source Voltage (V)
V
GS
- Gate-to-Source Voltage (V)
Output Characteristics
Transfer Characteristics
0.20
0.16
0.12
0.08
0.04
0.00
1200
960
720
480
240
0
V
GS
= 1.8 V
C
iss
V
GS
= 2.5 V
= 4.5 V
V
GS
C
oss
C
rss
0.0
1.6
3.2
4.8
6.4
8.0
0
4
8
12
16
20
V
DS
- Drain-to-Source Voltage (V)
I
- Drain Current (A)
D
On-Resistance vs. Drain Current and Gate Voltage
Capacitance
8.0
6.4
4.8
3.2
1.6
0.0
1.6
1.4
1.2
1.0
0.8
0.6
I
= 2.5 A
I = - 2.5 A
D
D
V
GS
= - 4.5 V
V
DS
= 5 V
V
= 10 V
DS
V
GS
= - 1.8 V
V
DS
= 15 V
0.0
3.4
6.8
10.2
13.6
17.0
- 50 - 25
0
T
25
50
75
100 125 150
- Junction Temperature (°C)
Q
g
- Total Gate Charge (nC)
J
Gate Charge
On-Resistance vs. Junction Temperature
Document Number: 65015
S09-1218-Rev. A, 29-Jun-09
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New Product
Si2367DS
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
10
0.30
0.24
0.18
0.12
0.06
0.00
I
= 2.5 A
D
1
T
J
= 25 °C
T
J
= 150 °C
0.1
T
J
= 125 °C
0.01
T
J
= 25 °C
4
0.001
0.0
0.2
0.4
0.6
0.8
1.0
1.2
0
1
2
3
5
V
SD
- Source-to-Drain Voltage (V)
V
GS
- Gate-to-Source Voltage (V)
Source-Drain Diode Forward Voltage
On-Resistance vs. Gate-to-Source Voltage
0.4
0.3
30
24
18
12
6
I
= - 250 µA
D
0.2
I
= - 5 mA
D
0.1
0.0
- 0.1
- 0.2
0
- 50 - 25
0
25
50
75
100 125 150
0.001
0.01
0.1
1
10
Time (s)
T
J
- Temperature (°C)
Single Pulse Power, Junction-to-Ambient
Threshold Voltage
100
Limited by R
*
DS(on)
10
1
1 ms
10 ms
100 ms
1 s, 10 s
DC
0.1
T
= 25 °C
A
BVDSS Limited
Single Pulse
0.01
0.01
100
0.1
1
10
V
DS
- Drain-to-Source Voltage (V)
* V > minimum V at which R is specified
DS(on)
GS
GS
Safe Operating Area, Junction-to-Ambient
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Document Number: 65015
S09-1218-Rev. A, 29-Jun-09
New Product
Si2367DS
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
2.0
1.6
1.2
0.8
0.4
0.0
4.5
3.6
2.7
1.8
0.9
0.0
0
25
50
75
100
125
150
0
25
50
75
100
125
150
T
C
- Case Temperature (°C)
T
C
- Case Temperature (°C)
Power Derating, Junction-to-Foot
Current Derating*
1.0
0.8
0.6
0.4
0.2
0.0
0
25
50
75
100
125
150
T
A
- Ambient Temperature (°C)
Power, Junction-to-Ambient
* The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
Document Number: 65015
S09-1218-Rev. A, 29-Jun-09
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5
New Product
Si2367DS
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
1
Duty Cycle = 0.5
0.2
0.1
0.1
Notes:
P
DM
0.05
t
1
0.02
t
2
t
t
1
2
1. Duty Cycle, D =
2. Per Unit Base = R
= 175 °C/W
thJA
(t)
3. T - T = P
Z
JM
A
DM thJA
Single Pulse
4. Surface Mounted
0.01
-4
-3
-2
-1
10
10
10
10
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Ambient
1
100
1000
10
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
-4
-3
-2
-1
10
10
10
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Foot
10
1
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?65015.
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6
Document Number: 65015
S09-1218-Rev. A, 29-Jun-09
Package Information
Vishay Siliconix
SOT-23 (TO-236): 3-LEAD
b
3
E
1
E
1
2
e
S
e
1
D
0.10 mm
0.004"
C
C
0.25 mm
q
A
2
A
Gauge Plane
Seating Plane
Seating Plane
C
A
1
L
L
1
MILLIMETERS
INCHES
Dim
Min
0.89
0.01
Max
1.12
0.10
Min
0.035
0.0004
Max
0.044
0.004
A
A1
A2
0.88
0.35
0.085
2.80
2.10
1.20
1.02
0.50
0.18
3.04
2.64
1.40
0.0346
0.014
0.003
0.110
0.083
0.047
0.040
0.020
0.007
0.120
0.104
0.055
b
c
D
E
E1
e
0.95 BSC
1.90 BSC
0.0374 Ref
e1
0.0748 Ref
L
0.40
0.60
8°
0.016
0.024
8°
L1
0.64 Ref
0.50 Ref
0.025 Ref
0.020 Ref
S
q
3°
3°
ECN: S-03946-Rev. K, 09-Jul-01
DWG: 5479
Document Number: 71196
09-Jul-01
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1
AN807
Vishay Siliconix
Mounting LITTLE FOOTR SOT-23 Power MOSFETs
Wharton McDaniel
Surface-mounted LITTLE FOOT power MOSFETs use integrated
circuit and small-signal packages which have been been modified
to provide the heat transfer capabilities required by power devices.
Leadframe materials and design, molding compounds, and die
attach materials have been changed, while the footprint of the
packages remains the same.
ambient air. This pattern uses all the available area underneath the
body for this purpose.
0.114
2.9
0.081
2.05
See Application Note 826, Recommended Minimum Pad
Patterns With Outline Drawing Access for Vishay Siliconix
MOSFETs, (http://www.vishay.com/doc?72286), for the basis
of the pad design for a LITTLE FOOT SOT-23 power MOSFET
footprint . In converting this footprint to the pad set for a power
device, designers must make two connections: an electrical
connection and a thermal connection, to draw heat away from the
package.
0.150
3.8
0.059
1.5
0.0394
1.0
0.037
0.95
FIGURE 1. Footprint With Copper Spreading
The electrical connections for the SOT-23 are very simple. Pin 1 is
the gate, pin 2 is the source, and pin 3 is the drain. As in the other
LITTLE FOOT packages, the drain pin serves the additional
function of providing the thermal connection from the package to
the PC board. The total cross section of a copper trace connected
to the drain may be adequate to carry the current required for the
application, but it may be inadequate thermally. Also, heat spreads
in a circular fashion from the heat source. In this case the drain pin
is the heat source when looking at heat spread on the PC board.
Since surface-mounted packages are small, and reflow soldering
is the most common way in which these are affixed to the PC
board, “thermal” connections from the planar copper to the pads
have not been used. Even if additional planar copper area is used,
there should be no problems in the soldering process. The actual
solder connections are defined by the solder mask openings. By
combining the basic footprint with the copper plane on the drain
pins, the solder mask generation occurs automatically.
Figure 1 shows the footprint with copper spreading for the SOT-23
package. This pattern shows the starting point for utilizing the
board area available for the heat spreading copper. To create this
pattern, a plane of copper overlies the drain pin and provides
planar copper to draw heat from the drain lead and start the
process of spreading the heat so it can be dissipated into the
A final item to keep in mind is the width of the power traces. The
absolute minimum power trace width must be determined by the
amount of current it has to carry. For thermal reasons, this
minimum width should be at least 0.020 inches. The use of wide
traces connected to the drain plane provides a low-impedance
path for heat to move away from the device.
Document Number: 70739
26-Nov-03
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1
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR SOT-23
0.037
0.022
(0.950)
(0.559)
0.053
(1.341)
0.097
(2.459)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
Document Number: 72609
Revision: 21-Jan-08
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25
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Disclaimer
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RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.
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© 2017 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED
Revision: 08-Feb-17
Document Number: 91000
1
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