SI4230DY-T1-GE3 [VISHAY]

Dual N-Channel 30-V (D-S) MOSFET; 双N通道30 -V (D -S )的MOSFET
SI4230DY-T1-GE3
型号: SI4230DY-T1-GE3
厂家: VISHAY    VISHAY
描述:

Dual N-Channel 30-V (D-S) MOSFET
双N通道30 -V (D -S )的MOSFET

晶体 小信号场效应晶体管 开关 光电二极管
文件: 总10页 (文件大小:261K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Si4230DY  
Vishay Siliconix  
Dual N-Channel 30-V (D-S) MOSFET  
FEATURES  
PRODUCT SUMMARY  
Halogen-free  
TrenchFET® Power MOSFET  
I
D (A)a, e  
VDS (V)  
RDS(on) (Ω)  
Qg (Typ.)  
100 % Rg and UIS Tested  
0.0205 at VGS = 10 V  
0.026 at VGS = 4.5 V  
8
8
30  
7.3  
APPLICATIONS  
Low Current DC/DC  
Notebook PC  
- System Power  
D
1
D
2
SO-8  
S
G
S
D
1
1
2
3
4
8
7
6
5
1
1
2
2
D
1
G
G
2
1
D
2
G
D
2
Top View  
S
1
S
2
N-Channel MOSFET  
N-Channel MOSFET  
Ordering Information: Si4230DY-T1-GE3 (Lead (Pb)-free and Halogen-free)  
ABSOLUTE MAXIMUM RATINGS T = 25 °C, unless otherwise noted  
A
Parameter  
Drain-Source Voltage  
Gate-Source Voltage  
Symbol  
VDS  
Limit  
30  
Unit  
V
VGS  
20  
8e  
TC = 25 °C  
TC = 70 °C  
TA = 25 °C  
TA = 70 °C  
7.5  
Continuous Drain Current (TJ = 150 °C)  
ID  
7.3b, c  
5.8b, c  
30  
2.6  
1.7b, c  
30  
IDM  
IS  
A
Pulsed Drain Current (10 µs Pulse Width)  
Source-Drain Current Diode Current  
TC = 25 °C  
TA = 25 °C  
ISM  
IAS  
Pulsed Source-Drain Current  
Single Pulse Avalanche Current  
Single Pulse Avalanche Energy  
10  
L = 0.1 mH  
EAS  
mJ  
W
5
T
C = 25 °C  
3.2  
TC = 70 °C  
TA = 25 °C  
TA = 70 °C  
2.1  
2b, c  
1.28b, c  
PD  
Maximum Power Dissipation  
TJ, Tstg  
°C  
Operating Junction and Storage Temperature Range  
- 55 to 150  
THERMAL RESISTANCE RATINGS  
Parameter  
Symbol  
RthJA  
RthJF  
Typical  
50  
Maximum  
62.5  
Unit  
Maximum Junction-to-Ambientb, d  
Maximum Junction-to-Foot (Drain)  
t 10 s  
Steady State  
°C/W  
30  
38  
Notes:  
a. Based on TC = 25 °C.  
b. Surface Mounted on 1" x 1" FR4 board.  
c. t = 10 s.  
d. Maximum under Steady State conditions is 110 °C/W.  
e. Package limited.  
Document Number: 68983  
S-82660-Rev. A, 03-Nov-08  
www.vishay.com  
1
Si4230DY  
Vishay Siliconix  
SPECIFICATIONS T = 25 °C, unless otherwise noted  
J
Parameter  
Symbol  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
Static  
VDS  
ΔVDS/TJ  
ΔVGS(th)/TJ  
VGS(th)  
VGS = 0 V, ID = 250 µA  
ID = 250 µA  
Drain-Source Breakdown Voltage  
30  
V
V
DS Temperature Coefficient  
32  
- 6  
mV/°C  
VGS(th) Temperature Coefficient  
Gate Threshold Voltage  
Gate Body Leakage  
VDS = VGS , ID = 250 µA  
1.0  
20  
3.0  
100  
1
V
IGSS  
VDS = 0 V, VGS  
=
20 V  
nA  
VDS = 30 V, VGS = 0 V  
DS = 30 V, VGS = 0 V, TJ = 55 °C  
VDS = 5 V, VGS = 10 V  
VGS = 10 V, ID = 8 A  
IDSS  
ID(on)  
RDS(on)  
gfs  
Zero Gate Voltage Drain Current  
On-State Drain Currentb  
µA  
A
V
10  
0.0172  
0.0205  
29  
0.0205  
0.026  
Drain-Source On-State Resistanceb  
Ω
S
VGS = 4.5 V, ID = 5 A  
Forward Transconductanceb  
VDS = 15 V, ID = 8 A  
Dynamica  
Ciss  
Coss  
Crss  
Input Capacitance  
Output Capacitance  
Reverse Transfer Capacitance  
950  
155  
65  
N-Channel  
VDS = 15 V, VGS = 0 V, f = 1 MHz  
pF  
V
DS = 15 V, VGS = 10 V, ID = 8 A  
N-Channel  
16.5  
7.3  
2.7  
2.1  
1.2  
17  
25  
11  
Qg  
Total Gate Charge  
nC  
Qgs  
Qgd  
Rg  
Gate-Source Charge  
Gate-Drain Charge  
Gate Resistance  
V
DS = 15 V, VGS = 4.5 V, ID = 8 A  
f = 1 MHz  
0.2  
2.4  
35  
24  
35  
20  
18  
20  
35  
16  
Ω
td(on)  
tr  
td(off)  
tf  
td(on)  
tr  
td(off)  
tf  
Turn-On Delay Time  
Rise Time  
N-Channel  
12  
V
DD = 15 V, RL = 3 Ω  
Turn-Off Delay Time  
Fall Time  
18  
ID 5 A, VGEN = 4.5 V, Rg = 1 Ω  
10  
ns  
Turn-On Delay Time  
Rise Time  
9
N-Channel  
11  
V
DD = 15 V, RL = 3 Ω  
Turn-Off Delay Time  
Fall Time  
18  
ID 5 A, VGEN = 10 V, Rg = 1 Ω  
8
Drain-Source Body Diode Characteristics  
Continuous Source-Drain Diode Current  
IS  
ISM  
VSD  
trr  
TC = 25 °C  
IS = 1 A  
2.6  
30  
A
Pulse Diode Forward Currenta  
Body Diode Voltage  
0.74  
17  
9
1.2  
34  
V
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
Reverse Recovery Fall Time  
Reverse Recovery Rise Time  
ns  
nC  
Qrr  
ta  
18  
N-Channel  
IF = 5 A, dI/dt = 100 A/µs, TJ = 25 °C  
10  
7
ns  
tb  
Notes:  
a. Guaranteed by design, not subject to production testing.  
b. Pulse test; pulse width 300 µs, duty cycle 2 %  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation  
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum  
rating conditions for extended periods may affect device reliability.  
www.vishay.com  
2
Document Number: 68983  
S-82660-Rev. A, 03-Nov-08  
Si4230DY  
Vishay Siliconix  
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted  
30  
5
4
3
2
1
0
V
GS  
= 10 thru 4 V  
24  
18  
12  
6
T
C
= 25 °C  
V
GS  
= 3 V  
T
= 125 °C  
2
C
T
C
= - 55 °C  
4
0
0.0  
0.5  
1.0  
1.5  
2.0  
2.5  
0
1
3
5
V
GS  
- Gate-to-Source Voltage (V)  
V
DS  
- Drain-to-Source Voltage (V)  
Output Characteristics  
Transfer Characteristics  
0.024  
0.022  
0.020  
0.018  
0.016  
0.014  
1200  
960  
720  
480  
240  
0
C
iss  
V
V
= 4.5 V  
GS  
= 10 V  
GS  
C
oss  
C
rss  
0
6
12  
18  
24  
30  
0
5
10  
15  
20  
25  
30  
I
- Drain Current (A)  
V
DS  
- Drain-to-Source Voltage (V)  
D
On-Resistance vs. Drain Current  
Capacitance  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
10  
8
I
= 8 A  
I
= 8 A  
D
D
V
GS  
= 10 V  
V
DS  
= 10 V  
6
V
= 15 V  
DS  
V
GS  
= 4.5 V  
4
V
DS  
= 20 V  
2
0
- 50 - 25  
0
T
25  
50  
75  
100 125 150  
0.0  
3.6  
7.2  
10.8  
14.4  
18.0  
- Junction Temperature (°C)  
Q
g
- Total Gate Charge (nC)  
J
On-Resistance vs. Junction Temperature  
Gate Charge  
Document Number: 68983  
S-82660-Rev. A, 03-Nov-08  
www.vishay.com  
3
Si4230DY  
Vishay Siliconix  
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted  
100  
0.10  
0.08  
0.06  
0.04  
0.02  
0.00  
I
= 8 A  
D
T
J
= 150 °C  
10  
1
T
J
= 25 °C  
0.1  
0.01  
T
= 125 °C  
= 25 °C  
J
T
J
0.001  
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
0
1
2
3
4
5
6
7
8
9
10  
V
SD  
- Source-to-Drain Voltage (V)  
V
GS  
- Gate-to-Source Voltage (V)  
Source-Drain Diode Forward Voltage  
On-Resistance vs. Gate-to-Source Voltage  
0.4  
0.2  
60  
48  
36  
24  
12  
0
0.0  
- 0.2  
- 0.4  
- 0.6  
- 0.8  
I
= 5 mA  
D
I
= 250 µA  
D
- 50 - 25  
0
25  
50  
75  
100 125 150  
0.001  
0.01  
0.1  
1
10  
Time (s)  
T
J
- Temperature (°C)  
Single Pulse Power, Junction-to-Ambient  
Threshold Voltage  
100  
Limited by R  
*
DS(on)  
10  
1
1 ms  
10 ms  
100 ms  
1 s  
10 s  
DC  
0.1  
T
= 25 °C  
A
Single Pulse  
BVDSS Limited  
0.01  
0.1  
1
10  
100  
* V > minimum V at which R is specified  
DS(on)  
V
DS  
- Drain-to-Source Voltage (V)  
GS  
GS  
Safe Operating Area  
www.vishay.com  
4
Document Number: 68983  
S-82660-Rev. A, 03-Nov-08  
Si4230DY  
Vishay Siliconix  
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted  
11.0  
8.8  
6.6  
4.4  
2.2  
0.0  
0
25  
50  
75  
100  
125  
150  
T
C
- Case Temperature (°C)  
Current Derating*  
1.5  
1.2  
0.9  
0.6  
0.3  
0.0  
4.0  
3.2  
2.4  
1.6  
0.8  
0.0  
0
25  
50  
75  
100  
125  
150  
0
25  
50  
75  
100  
125  
150  
T
C
- Case Temperature (°C)  
T
A
- Ambient Temperature (°C)  
Power, Junction-to-Foot  
Power Derating, Junction-to-Ambient  
* The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper  
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package  
limit.  
Document Number: 68983  
S-82660-Rev. A, 03-Nov-08  
www.vishay.com  
5
Si4230DY  
Vishay Siliconix  
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted  
1
Duty Cycle = 0.5  
0.2  
0.1  
0.1  
Notes:  
P
DM  
0.05  
t
1
t
2
t
t
1
2
0.02  
1. Duty Cycle, D =  
2. Per Unit Base = R  
= 110 °C/W  
thJA  
(t)  
3. T - T = P  
Z
JM  
A
DM thJA  
Single Pulse  
4. Surface Mounted  
0.01  
-4  
-3  
-2  
-1  
10  
10  
10  
10  
Square Wave Pulse Duration (s)  
Normalized Thermal Transient Impedance, Junction-to-Ambient  
1
100  
1000  
10  
1
Duty Cycle = 0.5  
0.2  
0.1  
0.1  
0.05  
0.02  
Single Pulse  
10  
0.01  
-4  
-3  
-2  
-1  
10  
10  
10  
1
10  
Square Wave Pulse Duration (s)  
Normalized Thermal Transient Impedance, Junction-to-Foot  
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon  
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and  
reliability data, see http://www.vishay.com/ppg?68983.  
www.vishay.com  
6
Document Number: 68983  
S-82660-Rev. A, 03-Nov-08  
Package Information  
Vishay Siliconix  
SOIC (NARROW): 8-LEAD  
JEDEC Part Number: MS-012  
8
6
7
2
5
4
E
H
1
3
S
h x 45  
D
C
0.25 mm (Gage Plane)  
A
All Leads  
0.101 mm  
q
e
B
A
1
L
0.004"  
MILLIMETERS  
Max  
INCHES  
DIM  
A
Min  
Min  
Max  
1.35  
0.10  
0.35  
0.19  
4.80  
3.80  
1.75  
0.20  
0.51  
0.25  
5.00  
4.00  
0.053  
0.004  
0.014  
0.0075  
0.189  
0.150  
0.069  
0.008  
0.020  
0.010  
0.196  
0.157  
A1  
B
C
D
E
e
1.27 BSC  
0.050 BSC  
H
h
5.80  
0.25  
0.50  
0°  
6.20  
0.50  
0.93  
8°  
0.228  
0.010  
0.020  
0°  
0.244  
0.020  
0.037  
8°  
L
q
S
0.44  
0.64  
0.018  
0.026  
ECN: C-06527-Rev. I, 11-Sep-06  
DWG: 5498  
Document Number: 71192  
11-Sep-06  
www.vishay.com  
1
VISHAY SILICONIX  
TrenchFET® Power MOSFETs  
Application Note 808  
Mounting LITTLE FOOT®, SO-8 Power MOSFETs  
Wharton McDaniel  
0.288  
7.3  
Surface-mounted LITTLE FOOT power MOSFETs use  
integrated circuit and small-signal packages which have  
0.050  
1.27  
0.088  
2.25  
been been modified to provide the heat transfer capabilities  
required by power devices. Leadframe materials and  
design, molding compounds, and die attach materials have  
been changed, while the footprint of the packages remains  
the same.  
0.088  
2.25  
0.027  
0.69  
0.078  
1.98  
0.2  
5.07  
See Application Note 826, Recommended Minimum Pad  
Patterns With Outline Drawing Access for Vishay Siliconix  
MOSFETs, (http://www.vishay.com/ppg?72286), for the  
basis of the pad design for a LITTLE FOOT SO-8 power  
MOSFET. In converting this recommended minimum pad  
to the pad set for a power MOSFET, designers must make  
two connections: an electrical connection and a thermal  
connection, to draw heat away from the package.  
Figure 2. Dual MOSFET SO-8 Pad Pattern  
With Copper Spreading  
The minimum recommended pad patterns for the  
single-MOSFET SO-8 with copper spreading (Figure 1) and  
dual-MOSFET SO-8 with copper spreading (Figure 2) show  
the starting point for utilizing the board area available for the  
heat-spreading copper. To create this pattern, a plane of  
copper overlies the drain pins. The copper plane connects  
the drain pins electrically, but more importantly provides  
planar copper to draw heat from the drain leads and start the  
process of spreading the heat so it can be dissipated into the  
ambient air. These patterns use all the available area  
underneath the body for this purpose.  
In the case of the SO-8 package, the thermal connections  
are very simple. Pins 5, 6, 7, and 8 are the drain of the  
MOSFET for a single MOSFET package and are connected  
together. In a dual package, pins 5 and 6 are one drain, and  
pins 7 and 8 are the other drain. For a small-signal device or  
integrated circuit, typical connections would be made with  
traces that are 0.020 inches wide. Since the drain pins serve  
the additional function of providing the thermal connection  
to the package, this level of connection is inadequate. The  
total cross section of the copper may be adequate to carry  
the current required for the application, but it presents a  
large thermal impedance. Also, heat spreads in a circular  
fashion from the heat source. In this case the drain pins are  
the heat sources when looking at heat spread on the PC  
board.  
Since surface-mounted packages are small, and reflow  
soldering is the most common way in which these are  
affixed to the PC board, “thermal” connections from the  
planar copper to the pads have not been used. Even if  
additional planar copper area is used, there should be no  
problems in the soldering process. The actual solder  
connections are defined by the solder mask openings. By  
combining the basic footprint with the copper plane on the  
drain pins, the solder mask generation occurs automatically.  
0.288  
7.3  
0.050  
1.27  
0.196  
5.0  
A final item to keep in mind is the width of the power traces.  
The absolute minimum power trace width must be  
determined by the amount of current it has to carry. For  
thermal reasons, this minimum width should be at least  
0.020 inches. The use of wide traces connected to the drain  
plane provides a low impedance path for heat to move away  
from the device.  
0.027  
0.69  
0.078  
1.98  
0.2  
5.07  
Figure 1. Single MOSFET SO-8 Pad  
Pattern With Copper Spreading  
Document Number: 70740  
Revision: 18-Jun-07  
www.vishay.com  
1
Application Note 826  
Vishay Siliconix  
RECOMMENDED MINIMUM PADS FOR SO-8  
0.172  
(4.369)  
0.028  
(0.711)  
0.022  
0.050  
(0.559)  
(1.270)  
Recommended Minimum Pads  
Dimensions in Inches/(mm)  
Return to Index  
www.vishay.com  
22  
Document Number: 72606  
Revision: 21-Jan-08  
Legal Disclaimer Notice  
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Vishay  
Disclaimer  
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE  
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.  
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,  
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other  
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product with the properties described in the product specification is suitable for use in a particular application. Parameters  
provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All  
operating parameters, including typical parameters, must be validated for each customer application by the customer’s  
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including but not limited to the warranty expressed therein.  
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Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the  
definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council  
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Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that  
all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.  
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free  
requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference  
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Revision: 02-Oct-12  
Document Number: 91000  
1

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