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SI9961CY

更新时间：2024-12-03 13:10:08

品牌：VISHAY

描述：Motion Control Electronic, BCDMOS, PDSO24,

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概述
规格参数
数据手册

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SI9961CY 概述

Motion Control Electronic, BCDMOS, PDSO24, 运动控制电子器件

SI9961CY 规格参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Transferred	零件包装代码：	SOIC
包装说明：	SOP, SOP24,.4	针数：	24
Reach Compliance Code：	unknown	风险等级：	5.71
JESD-30 代码：	R-PDSO-G24	JESD-609代码：	e0
端子数量：	24	最高工作温度：	70 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP	封装等效代码：	SOP24,.4
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
电源：	5,11.6,12 V	认证状态：	Not Qualified
子类别：	Motion Control Electronics	表面贴装：	YES
技术：	BCDMOS	温度等级：	COMMERCIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	GULL WING
端子节距：	1.27 mm	端子位置：	DUAL
Base Number Matches：	1

SI9961CY 数据手册

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Si9961

Vishay Siliconix

12-V Voice Coil Motor Driver

FEATURES

D 1.8-A H-Bridge Output

D Undervoltage Head Retract

D Rail-to-Rail Output Swing

D Class B Linear Operation

D Programmable Retract Current D Single 12-V Supply

D Externally Programmable Gain and

D Low Standby Current

D System Voltage Monitor with Fault Output

Bandwidth

DESCRIPTION

The Si9961 is a linear actuator (voice coil motor) driver suitable

for use in disk drive head positioning systems. The Si9961

contains all of the power and control circuitry necessary to

drive the VCM that is typically found in 3¹/₂-inch hard disk

drives and optical disk drives. The driver is capable of

delivering 1.8 A at a nominal supply of 12 V.

operation during linear tracking. Externally programmable

gain switch at the input summing junction increases the

resolution and dynamic range for a given DAC. The head

retract circuitry can be activated by either an undervoltage

condition or an external command. An external resistor is

required to set the VCM current during retract.

The Si9961 provides all necessary functions including a motor

current sense amplifier, a loop compensation amplifier and a

power amplifier featuring four complementary MOSFETs in a

H-bridge configuration. The output crossover protection

ensures no cross-conducting current and true Class B

The Si9961 is constructed on a self-isolated BiC/DMOS power

IC process. The IC is available in 24-pin SO package for

operation over the commercial, C suffix (0 to 70_C)

temperature range.

FUNCTIONAL BLOCK DIAGRAM

EXT

V+

REF

REF–

FAULT

Voltage

Monitor

8 R

OUTPUT

–

IA2–

OUTPUT

–

RETRACT

Retract

Control

RET

Enable

OA2

–

Acceleration Error

7 R

–

GAIN

SELECT

15 14

16 20

INH

INL

GND

SENSE

OUT

SENSE

IN+

SENSE

IN–

Document Number: 70014

S-20883—Rev. G, 24-Jun-02

www.vishay.com

Si9961

Vishay Siliconix

ABSOLUTE MAXIMUM RATINGS

Voltages Referenced to Common Pin

Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 70_C

V+ Supply Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 16 V

Junction Temperature (T ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150_C

Pin (FAULT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to V + 0.3 V

Power Dissipation (Package)

24-Pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.125 W

Pin (Output A & B, Source A & B) . . . . . . . . . . . . . . . . –0.3 V to V + 0.3 V

Thermal Impedance (

ꢀ

)

Pin (All Others) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to V+ + 0.3 V

24-Pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40_C/W

Maximum Clamp Current

Output A, Output B (Pulsed 10 ms at 10% duty cycle) . . . . . . . . . . . . "1.8 A

Notes

Pin (All Others) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . "20 mA

Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65 to 150_C

a. Device mounted with all leads soldered or welded to PC board.

b. Derate 25 mW/_C above 25_C.

SPECIFICATIONS

Test Conditions

Unless Otherwise Specified

Limits

C Suffix 0 to 70_C

V+ = 12 V "10%, V = 11.6 V "10%

= 5 V "10%, V

= GND = 0 V

REF–

Parameter

Bridge Outputs (A₄, A₅)

High Level Output Voltage

Symbol

Min^b

Typ^a

Max^bUnit

REF

= 5 V "5%

= 1.0 A, V = 10.2 V, OA = V

"1 V

8.0

9.1

0.6

REF

Low Level Output Voltage

Clamp Diode Voltage

Amplifier Gain

= –1.0 A, OA = V

"1 V

1.1

2.5

REF

I = 1.0 A, ENABLE = High

Output V

= V

"2 V

V/V

RANGE

REF

Dynamic Crossover Current

Slew Rate

Measured at V

V/ꢁ S

MHz

Small Signal Bandwidth (–3 dB)

Input Deadband

0.2

–60

A₂, Loop Compensation Amplifier

Input Offset Voltage

Input Bias Current

–8

–

Gain Select = High, IA = 5 V

–50

Unity Gain Bandwidth

Slew Rate

LOAD

= 10 kꢂ, C

= 100 pF to V

MHz

V/ꢁ s

LOAD

REF

Power Supply Rejection Ratio

Open Loop Voltage Gain

PSRR

@ 10 kHz

VOL

Output Voltage Swing

REF

–2

REF

LOAD

= 10 kꢂ to V

REF

A₃, Current Sense Amplifier

Input Offset Voltage

Input Impedance

–5

IN+ to I IN–

SENSE

kꢂ

SENSE

Small Signal Bandwidth (–3 dB)

Common Mode Rejection Ratio

Slew Rate

= 10 kꢂ, C

= 100 pF to V

REF

MHz

LOAD

CMRR

@ 5 kHz

V/ꢁ s

V/V

Gain

3.9

–0.3

4.1

Input Common-Mode Voltage Range

Output Voltage Swing

To GND

= 10 kꢂ, C

= 100 pF to V

–2

LOAD

REF

Supply

0.01

Static, No Load

RETRACT = High

ENABLE = Low

Supply Current (Normal)

V+

Document Number: 70014

www.vishay.com

S-20883—Rev. G, 24-Jun-02

Si9961

Vishay Siliconix

SPECIFICATIONS

Test Conditions

Unless Otherwise Specified

Limits

C Suffix 0 to 70_C

V+ = 12 V "10%, V = 11.6 V "10%

= 5 V "10%, V

= GND = 0 V

REF–

Parameter

Supply

Symbol

Min^b

Typ^a

Max^bUnit

REF

= 5 V "5%

0.01

Static, No Load

RETRACT = High

ENABLE = High

Normal Mode

Supply Current (Standby)

0.2

0.8

0.4

1.6

V+

10.2

2.0

11.6

13.2

Range

Retract Mode

4.5

5.5

V+ Range

V+

10.8

13.2

Gain Select Switch

Switch Resistance

108

135

810

240

300

IA2– = 5 V

ꢂ

Switch Resistance

INH

INL

1800

V_REF(EXT)

Input Current

OA2 = V

0.15

4.75

0.40

0.65

5.25

REF

External Voltage Range

Power Supply Monitor

REF

Undervoltage Threshold

= 5.0 V

3.82

9.1

4.12

4.42

10.6

REF

Hysteresis

V+ Undervoltage Threshold

Hysteresis

9.8

100

REF

Gain Select, RETRACT, ENABLE Input

Input High Voltage

Input Low Voltage

Input High Current

Input Low Current

3.5

1.5

= 5 V

= 0 V

–1

ꢁ

FAULT Output

–0.8

Output High Voltage

= –100 ꢁ A

–0.33

0.25

400

Output Low Voltage

= 1.6 mA

0.50

Output High Sourcing Current

= 0 V

1100

ꢁ

OHS

OUT

RETRACT Current Control (RETRACT = Low, Output Current from A to B)

Bias Voltage

V(I

)

= 10 V, R = 3.74 k

ꢂ

0.66

RET

Retract Output Pull-Up Voltage

= 2.5 V to 14 V, I

= 30 mA

–1

OUT A

OUTB

OUTA

= 10 V, V

= 5 V R

= 3.74 kꢂ

OUTB

RET

Retract Output Pull-Down Current

Maximum Emergency Retract Current

= 0.5 ꢂ, T = 25_C

(Max)

= 2 V, V

= 0.7 V R

= < 10 ꢂ, R = 0.5 ꢂ,

OUTB

RET SB

Retract Current V Supply Rejection Ratio

= 2 V to 14 V, R

= 3.74 k

ꢂ

3.0

%/V

RET

Retract Current Temperature Coefficient

= 10 V, R

= 3.74 k

ꢂ

–0.3

%/_C

RET

Notes

a. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.

b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.

Document Number: 70014

www.vishay.com

S-20883—Rev. G, 24-Jun-02

Si9961

Vishay Siliconix

PIN CONFIGURATION

24-Pin SOIC

(Wide Body)

INH

IA2–

INL

OUT

OA2

SENSE

FAULT

(IN)–

SENSE

SOURCE B

OUTPUT B

RET

EXT V

(Spindle Supply)

REF

V+

OUTPUT A

GND

RETRACT

GAIN SELECT

ENABLE

SOURCE A

GND

Order Number: Si9961ACY

REF–

(IN)

SENSE +

Top View

APPLICATIONS

Introduction

User-Programmable Gains

The Si9961 Voice Coil Motor (VCM) driver integrates the active

feedback and drive components of a head-positioning servo

loop for high-performance hard-disk applications. The Si9961

operates from a 12-V ("10%) power supply and delivers 1 A

of steady-state output current. This device is made possible by

a power IC process which combines bipolar, CMOS and

complimentary DMOS technologies. CMOS logic and linear

components minimize power consumption, bipolar front-ends

on critical amplifiers provide necessary accuracy, and

complimentary (p- and n-channel) DMOS devices allow the

transconductance output amplifier to operate from ground to

V_DD. Two user-programmable, current feedback/input voltage

ratios may be digitally selected to optimize gain for both seek

and track following modes, to maximize system accuracy for

a given DAC resolution. An undervoltage lockout circuit

monitors the V+ supply and generates a fault signal to trigger

an orderly head-retract sequence at a voltage level sufficient

to allow the spindle motor’s back EMF-generated voltage to

supply the necessary head parking energy. Head retract can

also be commanded via a separate RETRACT input. VCM

current during retract can be user programmed with a single

external resistor. External components are limited to R/C filter

components for loop compensation and the resistors that are

required to program gain, retract current, and the load current

sense.

During linear operation, the transconductance amplifiers’

gains (input voltage at V_INvs. VCM current, in Figure 1) are set

by external resistors R₃ꢀ R₅, R_SA, and R_SBand selected by

gain input. After selecting a value for R_SAand R_SBthat will yield

the desired VCM current level, the High and Low feedback

gain ratios may be determined by the following:

R₅

(GAIN SELECT Input = High)

(GAIN SELECT Input = Low)

High Gain +

Low Gain +

ǒ Ǔ_{4 R}

R₃

R₅

ǒ Ǔ_{4 R}

R₄

Where R_S= R_SA= R_SB

Input offset current may then be calculated as:

R_S) R_IN

4 R_S

_IAS3Ǔ

) 5 V

OSA2

I_OS

ǒ Ǔ

R_IN

Where R_IN= R₃or R₄

Document Number: 70014

www.vishay.com

S-20883—Rev. G, 24-Jun-02

Si9961

Vishay Siliconix

Back EMF Supply

12 V

System

Supply

5-V Ref

EXT

V+

REF–

REF

FAULT

OUT

Voltage

Monitor

5 V

VCM

8 R

IA2–

OUTPUT

–

OUTPUT

–

RETRACT

Retract

Control

RET

ENABLE

OA2

–

Acceleration Error

RET

7 R

–

GAIN

SELECT

GND

SENSE SENSE SENSE

OUT

IN+

IN–

INH

INL

15 14

16 20

FIGURE 1. Si9961 Typical Application

Head Retract

eliminate quiescent output current when power is applied but

the head has been parked, such as a sleep mode. A

sleep-mode power down sequence should be preceded by a

retract signal since a power failure during this state may not

provide adequate spindle-motor back EMF to permit head

retraction.

A low on the RETRACT input pin turns output devices Q1 and

Q4 on, and output devices Q2 and Q3 off. Maximum VCM

current can be set during head retract by adding an external

resistor between the IRET pin and ground. Maximum retract

current may be calculated as:

0.66 V

R_ret

Transconductance Amplifier Compensation

I_OUT+ 175 x I_ret+ 175 x

The Si9961CY features an integrated transconductance

amplifier to drive the voice coil motor (VCM). To ensure proper

operation, this amplifier must be compensated specifically for

the VCM being driven. As a first approximation, the torque

constant and inertia of the VCM may be ignored, although they

will have some influence on the final results, especially if large

values are involved. (See Figure 1.)

Head retract can be initiated automatically by an undervoltage

condition (either the 12-V or 5-V supplies on the Si9961) by

connecting the FAULT output to the RETRACT input.

A high ENABLE input puts both driver outputs in a

high-impedance state. The ENABLE function can be used to

Document Number: 70014

www.vishay.com

S-20883—Rev. G, 24-Jun-02

Si9961

Vishay Siliconix

Frequency Compensation:

C_L

16 x R_L/10000

L_v/(R_vx R_L) = 100 x 10^–6/R_Lfarads

The VCM transconductance (in siemens) of this simplified

case may be expressed in the s (Laplace) plane as:

Gain Optimization:

There are three things to consider when optimizing the gain (A)

above. The first is servo bandwidth. The main criterion here is

to avoid having the transconductance amplifier cause an

undue loss of phase margin in the overall servo (mechanical

+ electrical + firmware) loop. The second is to avoid confirguing

a bandwidth that is more than required in view of noise and

stability considerations. The third is to keep the voltage output

g_v

s )

Where R_v= VCM resistance in ohms

L_V= VCM inductance in henrys

s is the Laplace operator

waveform overshoot to

cross-conduction of the output FETs.

a level that will not cause

In this case, the transconductance pole is at –Rv/Lv. It is

desirable to cancel this pole in the interest of stability. To do

this, a compensation amplifier is cascaded with the VCM and

its driver. The transfer function of this amplifier is:

The first two problems can be considered together. Let us

assume a disk drive with a spindle RPM of 4400 and with

50 servo sectors per track. The sample rate is therefore:

ǒ_{s )}

H_c+ A

440

This is a sample frequency of 3667 Hz

f_sĂ + 50Ă Ă

Where R_L

Compensation amplifier feedback

resistor in ohms

Compensation amplifier feedback

capacitor in farads

Compensation amplifier and driver

voltage gain at high frequency

As a rule of thumb, the open loop unity gain crossover

frequency of the entire servo (mechanical + electrical +

firmware) loop should be less than 1/10 of the sample

frequency. In this example, the servo open loop unity gain

crossover frequency would be less than 367 Hz. If we allow

only a 10_ degradation in phase margin due to the

transconductance amplifier, then a phase lag of 10_ at 367 Hz

C_L

If R_Lx C_Lis set equal to L_v/R_v, then the combined open loop

transconductance in siemens becomes:

is acceptable. This results in

transconductance at :

a 3-dB point in the

g_to

367

tan 10

s L_v

f_3db

(

)

In this case, the transconductance has a single pole at the

origin. If this open loop transfer is closed with

or a 3-dB point in the transconductance at 2081 Hz.

transimpedance amplifier having a gain of B ohms, the

resultant closed loop transconducatance stage has the

transfer function (in siemens) of:

The pole in the closed loop transconductance (–A * B / Lv)

should then be 2081 * 2 * ꢃ = 13075. This means that A = 9.8.

From the above equation for A, R_L= 6.2 kꢂ. This sets the

minimum gain limit governed by the servo bandwidth

requirements. The gain should not be much greater than this,

since increased noise will degrade the servo response.

g_tc

A B

s )

Where B = Current feedback transimpedence amplifier gain in

ohms.

The third problem, keeping the transconductance amplifier

voltage output wave form overshoot to a level that will not

cause the wrong output FETs to conduct, can be evaluated by

deriving the voltage transfer function of the closed loop

transconductance amplifier from input voltage to output

voltage (Vin to output A and B on the reference schematic).

The entire transconductance now contains only a single pole

at –A*B/Lv. A and B are chosen to be considerably higher than

the servo bandwidth, to avoid undue phase margin reduction.

As a typical example, in the referenced schematic, assume

that Rsa and Rsb = 0.5 ꢂ, R₅= R₃= 10 kꢂ, VCM inductance

(Lv) = 1.5 mH, VCM resistance (Rv) = 15 ꢂ. Hence:

This is :

s ) p

H_to+ A

s ) x

R_v

L_v

15 ꢂ

1.5 mH

2 ꢂ

Where p = 1/R_Lx C_L) or R_v/L_vComp amplifier

zero/VCM pole

x = A x B/L_vclosed loop pole

Document Number: 70014

www.vishay.com

S-20883—Rev. G, 24-Jun-02

Si9961

Vishay Siliconix

If a unit step voltage is applied to the above transfer function

and the inverse Laplace transform is taken, the output result is:

Result:

In the example for the 2081-Hz roll-off case with 31%

overshoot and proper pole cancellation, the compensation

values are:

*x t

(

)

p ) x * p x e

V_O+ A

Where t = time

R_L

C_L

6.2 kꢂ

0.016 ꢁF

As we can see, if x = p (i.e. if the VCM pole and compensation

amplifier zero = the transconductance closed loop pole), then

Vo reduces to A. In other words, a step input results in a step

output without overshoot. If x < p then a step input results in an

increased rise time output and no overshoot. If x > p, a step

input results in a step output with an overshoot.

In the example for the 1592-Hz roll-off case with no overshoot

and proper pole cancellation, the compensation values are:

R_L

C_L

4.7 kꢂ

0.022 ꢁF

The linearity of the transconductance amplifier (around a

center value of 500 mA/volt) is shown in Figure 2. In this case,

the output current sense resistors (R_SAand R_SB) were "5%

tolerance, 0.5 ꢂ . Any mismatch between R_SAand R_SB

contribute directly to mismatch between the positive and

negative “full-scale”. Including the external resistor mismatch,

the overall loop nonlinearity is approximately 1% maximum

over a "250-mV input voltage range.

If this overshoot is large enough, there may be

cross-conduction condition in the output FETs.

Let us look at the above equation at t = 0 and t >> 0, expressed

in terms of the open loop high frequency voltage gain, A.

V_O+ A

At t = 0

p L_v

At t uu 0

V_O

In the example shown above, p = 10,000 and A = 9.8. This

means that there is some overshoot. At t = 0, the output voltage

is 9.8 V per volt of input. At some later time, it has dropped to

7.5 V per volt of input. An overshoot of 31 % is thus produced.

= 12 V

–1

–2

–3

–4

–5

= R = 0.5 ꢂ ”5%

The maximum overshoot voltage requires careful

consideration, since it constitutes a potentially catastrophic

problem area. If we had decided to optimize for no overshoot,

A would equal 7.5, and hence the closed loop pole (A * B / Lv)

would be 10,000, which is a frequency of 1.592 kHz. This

would have resulted in a phase margin degradation of 13_ at

the 367-Hz frequency desired. This may or may not be

acceptable. One must weigh the servo bandwidth, phase

margin degradation, and maximum voltage at the VCM for

each individual case.

= 52

ꢂ

= 500 mA/V

–300 –200 –100

100

200

300

in mV

FIGURE 2. Si9961 Transconductance

End Point Non-Linearity

Document Number: 70014

www.vishay.com

S-20883—Rev. G, 24-Jun-02

Si9961

Vishay Siliconix

6.2 k

ꢂ

0.016 ꢁ F

8 R

–

OUT

Cross-Over

Protection

–

10 k

VCM

1.5 mH

ꢂ

Cross-Over

Protection

10 k

–

Gain +

ꢂ

7 R

–

(4 x Gain)

0.5

ꢂ

0.5 ꢂ

FIGURE 3. Transconductance Amplifier

= 6.2 kꢂ , C = 0.016 ꢁ F

R = 6.2 kꢂ , C = 0.016 ꢁ F

L L

–20

–40

–60

–80

–5

–8

–11

–14

–17

–20

100

1000

10000

100

1000

10000

Frequency (Hz)

FIGURE 4.

FIGURE 5.

Document Number: 70014

www.vishay.com

S-20883—Rev. G, 24-Jun-02

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