AOB442 [AOS]
40V N-Channel MOSFET; 40V N沟道MOSFET型号: | AOB442 |
厂家: | ALPHA & OMEGA SEMICONDUCTORS |
描述: | 40V N-Channel MOSFET |
文件: | 总7页 (文件大小:681K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
AOB442
40V N-Channel MOSFET
SDMOSTM
General Description
Product Summary
The AOB442 is fabricated with SDMOSTM trench
technology that combines excellent RDS(ON) with low gate
charge and low Qrr.The result is outstanding efficiency
with controlled switching behavior. This universal
technology is well suited for PWM, load switching and
general purpose applications.
VDS
40V
105A
ID (at VGS=10V)
< 4.2mΩ
< 5.3mΩ
RDS(ON) (at VGS=10V)
RDS(ON) (at VGS = 4.5V)
100% UIS Tested
TO-263
D2PAK
Bottom View
Top View
D
D
G
D
S
G
S
G
S
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
Maximum
Units
VDS
Drain-Source Voltage
40
V
V
VGS
ID
IDM
IDSM
Gate-Source Voltage
Continuous Drain
Current G
±20
105
82
TC=25°C
TC=100°C
A
A
Pulsed Drain Current C
380
21
TA=25°C
TA=70°C
Continuous Drain
Current
Avalanche Current C
Avalanche energy L=0.1mH C
17
IAS, IAR
40
A
EAS, EAR
80
mJ
TC=25°C
150
75
PD
W
Power Dissipation B
Power Dissipation A
TC=100°C
TA=25°C
TA=70°C
3.5
PDSM
W
2.2
TJ, TSTG
Junction and Storage Temperature Range
-55 to 175
°C
Thermal Characteristics
Parameter
Symbol
Typ
7
Max
9
Units
°C/W
°C/W
°C/W
Maximum Junction-to-Ambient A
t ≤ 10s
RθJA
Maximum Junction-to-Ambient A D
Maximum Junction-to-Case
30
0.7
36
1
Steady-State
Steady-State
RθJC
Rev 0: June 2009
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Page 1 of 1
AOB442
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
ID=250µA, VGS=0V
40
V
VDS=40V, VGS=0V
10
50
IDSS
Zero Gate Voltage Drain Current
µA
TJ=55°C
IGSS
Gate-Body leakage current
Gate Threshold Voltage
On state drain current
VDS=0V, VGS= ±20V
VDS=5V ID=250µA
VGS=10V, VDS=5V
100
2.3
nA
V
VGS(th)
ID(ON)
1.3
1.8
380
3.4
A
VGS=10V, ID=20A
4.2
6.4
5.3
mΩ
mΩ
RDS(ON)
TJ=125°C
Static Drain-Source On-Resistance
5.3
VGS=4.5V, ID=20A
VDS=5V, ID=20A
IS=1A,VGS=0V
4.2
gFS
VSD
IS
Forward Transconductance
Diode Forward Voltage
95
S
V
A
0.65
105
1
Maximum Body-Diode Continuous Current
DYNAMIC PARAMETERS
Ciss
Coss
Crss
Rg
Input Capacitance
3730 4666 5600
pF
pF
pF
Ω
VGS=0V, VDS=20V, f=1MHz
VGS=0V, VDS=0V, f=1MHz
Output Capacitance
Reverse Transfer Capacitance
Gate resistance
520
160
0.5
744
269
1
970
375
1.5
SWITCHING PARAMETERS
Qg(10V)
Total Gate Charge
Total Gate Charge
Gate Source Charge
Gate Drain Charge
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
Turn-Off Fall Time
60
28
8.5
10
75
36
90
45
nC
nC
nC
nC
ns
Qg(4.5V)
Qgs
Qgd
tD(on)
tr
V
GS=10V, VDS=20V, ID=20A
10.5
17
12.5
25
15
VGS=10V, VDS=20V, RL=1Ω,
18
ns
R
GEN=3Ω
tD(off)
tf
52
ns
23
ns
trr
IF=20A, dI/dt=500A/µs
IF=20A, dI/dt=500A/µs
13
30
16
19
45
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
ns
Qrr
38
nC
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on
the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and duty cycles to keep initial
TJ =25°C.
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of TJ(MAX)=175°C. The SOA curve provides a single pulse rating.
G. The maximum current rating is limited by bond-wires.
H. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev 0: June 2009
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Page 2 of 7
AOB442
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
150
120
90
60
30
0
150
120
90
60
30
0
10V
4V
5V
VDS=5V
3.5V
VGS=3V
4
6V
125°C
25°C
0
1
2
3
4
5
0
1
2
3
5
VDS (Volts)
VGS(Volts)
Fig 1: On-Region Characteristics (Note E)
Figure 2: Transfer Characteristics (Note E)
6
2
1.8
1.6
1.4
1.2
1
VGS=10V
ID=20A
5
4
3
2
1
VGS=4.5V
VGS=10V
VGS=4.5V
ID=20A
0.8
0
25
50
75
100 125 150 175 200
0
5
10
15
20
25
30
I
D (A)
Temperature (°C)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage (Note E)
Figure 4: On-Resistance vs. Junction
Temperature (Note E)
10
8
1.0E+02
1.0E+01
ID=20A
125°C
1.0E+00
125°C
6
1.0E-01
1.0E-02
1.0E-03
1.0E-04
1.0E-05
25°C
4
25°C
2
0
2
4
6
8
10
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS (Volts)
VSD (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
Figure 6: Body-Diode Characteristics (Note E)
Rev 0: June 2009
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Page 3 of 7
AOB442
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
7000
6000
5000
4000
3000
2000
1000
0
10
VDS=20V
ID=20A
8
Ciss
6
4
Coss
2
Crss
0
0
10
20
VDS (Volts)
30
40
0
20
40
Qg (nC)
60
80
Figure 8: Capacitance Characteristics
Figure 7: Gate-Charge Characteristics
1000
1000.0
100.0
10.0
1.0
10µs
800
600
400
200
0
RDS(ON)
TJ(Max)=175°C
TC=25°C
limited
100µs
1ms
DC
10ms
TJ(Max)=175°C
TC=25°C
0.1
0.0
0.01
0.1
1
10
100
0.0001
0.001
0.01
0.1
1
10
VDS (Volts)
Pulse Width (s)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
Figure 10: Single Pulse Power Rating Junction-to-
Case (Note F)
10
1
D=Ton/T
J,PK=TC+PDM.ZθJC.RθJC
RθJC=1°C/W
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
T
0.1
PD
Single Pulse
0.01
0.001
Ton
T
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Rev 0: June 2009
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Page 4 of 7
AOB442
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
1000
100
10
180
150
120
90
TA=25°C
TA=100°C
60
TA=150°C
TA=125°C
30
0
1
0
25
50
75
100
125
150
1
10
100
1000
Time in avalanche, tA (µs)
TCASE (°C)
Figure 12: Single Pulse Avalanche capability
(Note C)
Figure 13: Power De-rating (Note F)
10000
1000
100
10
120
100
80
60
40
20
0
TA=25°C
1
0.0001
0.01
1
100
10000
0
25
50
75
TCASE (°C)
Figure 14: Current De-rating (Note F)
100
125
150
175
Pulse Width (s)
Figure 15: Single Pulse Power Rating Junction-to-
Ambient (Note H)
10
1
D=Ton/T
J,PK=TA+PDM.ZθJA.RθJA
RθJA=36°C/W
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
T
0.1
PD
0.01
0.001
Single Pulse
0.1
Ton
T
0.0001
0.001
0.01
1
10
100
1000
10000
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)
Rev 0: June 2009
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Page 5 of 7
AOB442
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
70
60
50
40
30
20
10
0
12
10
8
18
16
14
12
10
8
2.5
2
di/dt=800A/µs
125ºC
25ºC
125ºC
di/dt=800A/µs
Qrr
25ºC
1.5
1
trr
125ºC
25ºC
6
S
Irm
6
4
0.5
0
125ºC
20
25ºC
20
2
4
0
0
5
10
15
S (A)
25
30
0
5
10
15
25
30
I
IS (A)
Figure 17: Diode Reverse Recovery Charge and
Peak Current vs. Conduction Current
Figure 18: Diode Reverse Recovery Time and
Softness Factor vs. Conduction Current
70
60
50
40
30
20
10
0
15
12
9
25
2.5
2
Is=20A
125ºC
Is=20A
20
15
10
5
125ºC
trr
1.5
1
25ºC
25ºC
125ºC
Qrr
6
25ºC
S
25ºC
3
0.5
125ºC
Irm
0
0
0
0
200
400
600
800
1000
0
200
400
600
800
1000
di/dt (A/µs)
di/dt (A/µs)
Figure 19: Diode Reverse Recovery Charge and
Peak Current vs. di/dt
Figure 20: Diode Reverse Recovery Time and
Softness Factor vs. di/dt
Rev 0: June 2009
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Page 6 of 7
AOB442
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
VDC
+
Qgs
Qgd
Vds
VDC
-
-
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
90%
10%
+
DUT
Vdd
Vgs
VDC
Rg
-
Vgs
Vgs
td(on)
t
r
td(off)
t
f
ton
toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
EAR= 1/2 LIA2R
BVDSS
Vds
Id
Vgs
Vds
+
Vgs
Vdd
I AR
VDC
Id
Rg
-
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Qrr = - Idt
Vds +
Vds -
Ig
DUT
Vgs
trr
L
Isd
I F
Isd
Vgs
dI/dt
I RM
+
Vdd
VDC
Vdd
-
Vds
Rev 0: June 2009
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Page 7 of 7
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