AOD4124 [AOS]
100V N-Channel MOSFET; 100V N沟道MOSFET
| 型号： | AOD4124 |
| 厂家： | 
ALPHA & OMEGA SEMICONDUCTORS |
| 描述： | 100V N-Channel MOSFET |
| 文件： | 总7页 (文件大小：268K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AOD4124
100V N-Channel MOSFET
SDMOSTM
General Description
Product Summary
The AOD4124 is fabricated with SDMOSTM trench
technology that combines excellent RDS(ON) with low gate
charge and low Qrr.The result is outstanding efficiency
with controlled switching behavior. This universal
technology is well suited for PWM, load switching and
general purpose applications.
VDS
100V
54A
ID (at VGS=10V)
< 21mΩ
< 25mΩ
RDS(ON) (at VGS=10V)
RDS(ON) (at VGS = 7V)
100% UIS Tested
100% Rg Tested
TO252
DPAK
D
Top View
Bottom View
D
D
G
S
G
S
S
G
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
VDS
Maximum
100
Units
Drain-Source Voltage
V
VGS
ID
IDM
IDSM
±25
Gate-Source Voltage
Continuous Drain
CurrentG
V
A
TC=25°C
54
TC=100°C
38
Pulsed Drain Current C
130
TA=25°C
TA=70°C
7.5
Continuous Drain
Current
Avalanche Current C
Avalanche energy L=0.1mH C
A
6
IAS, IAR
35
A
EAS, EAR
60
mJ
TC=25°C
150
PD
W
Power Dissipation B
Power Dissipation A
TC=100°C
TA=25°C
TA=70°C
75
3.1
PDSM
W
2
TJ, TSTG
Junction and Storage Temperature Range
-55 to 175
°C
Thermal Characteristics
Parameter
Symbol
Typ
12
Max
15
40
1
Units
°C/W
°C/W
°C/W
Maximum Junction-to-Ambient A
t ≤ 10s
RθJA
Maximum Junction-to-Ambient A D
Maximum Junction-to-Case
33
Steady-State
Steady-State
RθJC
0.8
Rev0: May 2010
www.aosmd.com
Page 1 of 7
AOD4124
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max Units
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
ID=250µA, VGS=0V
100
V
VDS=100V, VGS=0V
10
µA
50
IDSS
Zero Gate Voltage Drain Current
TJ=55°C
IGSS
Gate-Body leakage current
Gate Threshold Voltage
On state drain current
VDS=0V, VGS= ±25V
VDS=VGS ID=250µA
VGS=10V, VDS=5V
100
4
nA
V
VGS(th)
ID(ON)
2.8
3.4
130
A
V
GS=10V, ID=20A
16.7
31.4
19.8
33
21
38
25
mΩ
mΩ
RDS(ON)
TJ=125°C
Static Drain-Source On-Resistance
VGS=7V, ID=20A
VDS=5V, ID=20A
IS=1A,VGS=0V
gFS
VSD
IS
Forward Transconductance
Diode Forward Voltage
S
V
A
0.66
1
Maximum Body-Diode Continuous CurrentG
54
DYNAMIC PARAMETERS
Ciss
Coss
Crss
Rg
Input Capacitance
1600 2006 2420
pF
pF
pF
Ω
V
GS=0V, VDS=50V, f=1MHz
Output Capacitance
Reverse Transfer Capacitance
Gate resistance
110
30
164
58
230
90
VGS=0V, VDS=0V, f=1MHz
0.35
0.7
1.1
SWITCHING PARAMETERS
Qg(10V)
Qgs
Qgd
tD(on)
tr
Total Gate Charge
Gate Source Charge
Gate Drain Charge
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
Turn-Off Fall Time
24
7.5
6.5
31
9.4
11
14
9
38
11.5
16
nC
nC
nC
ns
ns
ns
ns
V
GS=10V, VDS=50V, ID=20A
VGS=10V, VDS=50V, RL=2.5Ω,
R
GEN=3Ω
tD(off)
tf
21
6
trr
IF=20A, dI/dt=500A/µs
IF=20A, dI/dt=500A/µs
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
16
60
23
91
30
ns
Qrr
nC
120
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on
the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and duty cycles to keep initial
TJ =25°C.
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of TJ(MAX)=175°C. The SOA curve provides a single pulse rating.
G. The maximum current rating is package limited.
H. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev0: May 2010
www.aosmd.com
Page 2 of 7
AOD4124
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
80
60
40
20
0
80
60
40
20
0
10V
VDS=5V
7V
6V
125°C
VGS=5V
5.5V
25°C
0
1
2
3
DS (Volts)
4
5
0
2
4
6
8
10
V
V
GS(Volts)
Fig 1: On-Region Characteristics (Note E)
Figure 2: Transfer Characteristics (Note E)
30
2.6
2.4
2.2
2
25
20
15
10
5
VGS=10V
ID=20A
VGS=7V
1.8
1.6
1.4
1.2
1
VGS=10V
VGS=7V
ID=20A
0
0.8
0
5
10
15
20
25
30
0
25
50
75
100 125 150 175 200
I
D (A)
Temperature (°C)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage (Note E)
Figure 4: On-Resistance vs. Junction
Temperature (Note E)
40
35
30
25
20
15
10
1.0E+02
1.0E+01
ID=20A
125°C
1.0E+00
1.0E-01
1.0E-02
1.0E-03
1.0E-04
1.0E-05
125°C
25°C
25°C
0.0
0.2
0.4
0.6
0.8
1.0
5
6
7
8
9
10
VSD (Volts)
VGS (Volts)
Figure 6: Body-Diode Characteristics (Note E)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
Rev0: May 2010
www.aosmd.com
Page 3 of 7
AOD4124
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
3000
10
VDS=50V
ID=20A
2500
2000
1500
1000
500
8
Ciss
6
4
Coss
2
Crss
0
0
0
20
40
60
DS (Volts)
80
100
0
5
10
15
20
25
30
35
V
Qg (nC)
Figure 8: Capacitance Characteristics
Figure 7: Gate-Charge Characteristics
2000
1000.0
100.0
10.0
1.0
1600
1200
800
400
0
10µs
TJ(Max)=175°C
TC=25°C
RDS(ON)
100µs
1ms
10ms
DC
TJ(Max)=175°C
TC=25°C
0.1
0.0
0.01
0.1
1
10
100
1000
1E-05 0.0001 0.001 0.01
0.1
1
10
VDS (Volts)
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-to-
Case (Note F)
Figure 9: Maximum Forward Biased
Safe Operating Area (Note F)
10
1
D=Ton/T
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
TJ,PK=TC+PDM.ZθJC.RθJC
RθJC=1°C/W
0.1
PD
0.01
0.001
Ton
Single Pulse
T
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Rev0: May 2010
www.aosmd.com
Page 4 of 7
AOD4124
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
100
10
1
175
150
125
100
75
TA=25°C
TA=100°C
TA=150°C
TA=125°C
50
25
0
1
10
100
1000
0
25
50
75
100
125
150
175
Time in avalanche, tA (µs)
Figure 12: Single Pulse Avalanche capability
(Note C)
TCASE (°C)
Figure 13: Power De-rating (Note F)
10000
1000
100
10
60
50
40
30
20
10
0
TA=25°C
1
0
25
50
75
CASE (°C)
Figure 14: Current De-rating (Note F)
100
125
150
175
0.0001
0.01
1
100
10000
T
Pulse Width (s)
Figure 15: Single Pulse Power Rating Junction-to-
Ambient (Note H)
10
1
D=Ton/T
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
TJ,PK=TA+PDM.ZθJA.RθJA
RθJA=40°C/W
0.1
PD
0.01
0.001
Single Pulse
Ton
T
0.0001
0.001
0.01
0.1
1
10
100
1000
10000
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)
Rev0: May 2010
www.aosmd.com
Page 5 of 7
AOD4124
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
160
140
120
100
80
40
30
20
10
0
30
25
20
15
10
5
6
5
4
3
2
1
125ºC
di/dt=800A/µs
di/dt=800A/µs
125ºC
Qrr
25ºC
trr
25ºC
60
125ºC
125ºC
40
Irm
25ºC
20
S
25ºC
0
0
0
0
5
10
15
S (A)
20
25
30
0
5
10
15
20
25
30
I
IS (A)
Figure 17: Diode Reverse Recovery Charge and
Peak Current vs. Conduction Current
Figure 18: Diode Reverse Recovery Time and
Softness Factor vs. Conduction Current
150
120
90
60
30
0
40
30
20
10
0
40
3
Is=20A
125ºC
Is=20A
125ºC
35
30
25
20
15
10
5
2.5
2
25ºC
25ºC
trr
1.5
1
Qrr
125º
125º
S
0.5
0
Irm
25ºC
600
25ºC
400
di/dt (A/µs)
0
0
200
400
800
1000
0
200
600
800
1000
di/dt (A/µs)
Figure 20: Diode Reverse Recovery Time and
Softness Factor vs. di/dt
Figure 19: Diode Reverse Recovery Charge and
Peak Current vs. di/dt
Rev0: May 2010
www.aosmd.com
Page 6 of 7
AOD4124
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
VDC
+
Qgs
Qgd
Vds
VDC
-
-
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
90%
10%
+
DUT
Vdd
Vgs
VDC
Rg
-
Vgs
Vgs
td(on)
t
r
td(off)
t
f
ton
toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
EAR= 1/2 LIA2R
BVDSS
Vds
Id
Vgs
Vds
+
Vgs
Vdd
I AR
VDC
Id
Rg
-
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
Vds -
Ig
DUT
Vgs
trr
L
Isd
I F
Isd
Vgs
dI/dt
I RM
+
Vdd
VDC
Vdd
-
Vds
Rev0: May 2010
www.aosmd.com
Page 7 of 7
相关型号：
©2020 ICPDF网 联系我们和版权申明