MTA040P02KN3-0-T1-G [CYSTEKEC]
-20V P-Channel Enhancement Mode MOSFET;
| 型号： | MTA040P02KN3-0-T1-G |
| 厂家： | 
CYSTECH ELECTONICS CORP. |
| 描述： | -20V P-Channel Enhancement Mode MOSFET |
| 文件： | 总9页 (文件大小：451K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Spec. No. : C064N3
Issued Date : 2016.08.16
Revised Date :
CYStech Electronics Corp.
Page No. : 1/9
-20V P-Channel Enhancement Mode MOSFET
BVDSS
ID @ VGS=-4.5V, T =25°C
RDSON@VGS=-4.5V, ID=-4A
RDSON@VGS=-2.5V,ID=-4A
RDSON@VGS=-1.8V,ID=-2A
-20V
-4.3A
MTA040P02KN3
A
37.5mΩ(typ)
52.4mΩ(typ)
76.6mΩ(typ)
Features
• For load switch application only
• Compact and low profile SOT-23 package
• Advanced trench process technology
• High density cell design for ultra low on resistance
• ESD protected gate
• Pb-free lead plating package
Symbol
Outline
SOT-23
MTA040P02KN3
D
G：Gate
S
S：Source
D：Drain
G
Ordering Information
Device
Package
Shipping
SOT-23
MTA040P02KN3-0-T1-G
3000 pcs / tape & reel
(Pb-free lead plating and halogen-free package)
Environment friendly grade : S for RoHS compliant products, G for RoHS compliant
and green compound products
Packing spec, T1 : 3000 pcs / tape & reel, 7” reel
Product rank, zero for no rank products
Product name
MTA040P02KN3
CYStek Product Specification
Spec. No. : C064N3
Issued Date : 2016.08.16
Revised Date :
CYStech Electronics Corp.
Page No. : 2/9
Absolute Maximum Ratings (Ta=25°C)
Parameter
Symbol
VDS
Limits
-20
±8
Unit
V
Drain-Source Voltage
Gate-Source Voltage
VGS
-4.3
-3.4
-30
Continuous Drain Current @ TA=25°C , VGS=-4.5V (Note 4)
Continuous Drain Current @ TA=70°C, VGS=-4.5V (Note 4)
Pulsed Drain Current (Notes 1, 2)
ID
A
IDM
ESD susceptibility
(Note 3)
VESD
1500
V
PD
1.25
W
Maximum Power Dissipation (Note 4)
Linear Derating Factor
0.01
W/°C
°C
Operating Junction and Storage Temperature Range
Tj ; Tstg
-55~+150
Note : 1. Pulse width limited by maximum junction temperature.
2. Pulse width≤ 300μs, duty cycle≤2%.
3. Human body model, 1.5kΩ in series with 100pF
4. Surface mounted on 1 in² copper pad of FR-4 board; 270°C/W when mounted on minimum copper pad
Thermal Performance
Parameter
Symbol
Limit
100
Unit
Thermal Resistance, Junction-to-Ambient(PCB mounted)
RθJA
°C/W
Note : Surface mounted on 1 in² copper pad of FR-4 board; 270°C/W when mounted on minimum copper pad
Electrical Characteristics (Tj=25°C, unless otherwise noted)
Symbol
Min.
Typ.
Max.
Unit
Test Conditions
Static
BVDSS
∆BVDSS/∆Tj
VGS(th)
-20
-
-0.5
-
-
-
V
V/°C
V
VGS=0V, ID=-250μA
Reference to 25°C, ID=-250μA
VDS=VGS, ID=-250μA
0.01
-
-1.0
±
±
IGSS
-
-
-
-
-
-
-
-
10
VGS= 8V, VDS=0V
μA
-1
-10
50
VDS=-16V, VGS=0V
VDS=-16V, VGS=0V (Tj=70°C)
ID=-4A, VGS=-4.5V
IDSS
37.5
52.4
75
ID=-4A, VGS=-2.5V
*RDS(ON)
mΩ
-
-
76.6
8.4
155
-
ID=-2A, VGS=-1.8V
VDS=-10V, ID=-4A
*GFS
S
Source-Drain Diode
*VSD
Trr
Qrr
-
-
-
-0.79
8.6
3.1
-1
-
-
V
ns
nC
VGS=0V, IS=-1A
VGS=0V, IF=-4A, dIF/dt=100A/μs
*Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2%
MTA040P02KN3
CYStek Product Specification
Spec. No. : C064N3
Issued Date : 2016.08.16
Revised Date :
CYStech Electronics Corp.
Page No. : 3/9
Recommended Soldering Footprint
MTA040P02KN3
CYStek Product Specification
Spec. No. : C064N3
Issued Date : 2016.08.16
Revised Date :
CYStech Electronics Corp.
Page No. : 4/9
Typical Characteristics
Brekdown Voltage vs Ambient Temperature
Typical Output Characteristics
1.4
1.2
1.0
0.8
0.6
0.4
30
25
20
15
10
5
10V,9V,8V,7V,6V,5V,4.5V,4V,3.5V
2.5V
2V
μ
ID=-250 A,
-VGS=1.5V
VGS=0V
0
-75 -50 -25
0 25 50 75 100 125 150 175
Tj, Junction Temperature(°C)
0
1
2
3
4
5
-VDS, Drain-Source Voltage(V)
Static Drain-Source On-State resistance vs Drain Current
Reverse Drain Current vs Source-Drain Voltage
100
90
80
70
60
50
40
30
20
10
0
1.2
Tj=25°C
VGS=0V
1.0
0.8
0.6
0.4
0.2
VGS=-2.5V
VGS=-3V
Tj=150°C
VGS=-4.5V
0
2
4
6
8
10
0.01
0.1
1
10
-ID, Drain Current(A)
-IDR, Reverse Drain Current(A)
Drain-Source On-State Resistance vs Junction Tempearture
Static Drain-Source On-State Resistance vs Gate-Source
Voltage
500
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
VGS=-4.5V, ID=-4A
ID=-4A
400
300
200
100
0
RDS(ON)@Tj=25°C : 37.5mΩ typ
-75 -50 -25
0
25 50 75 100 125 150 175
0
2
4
6
8
10
-VGS, Gate-Source Voltage(V)
Tj, Junction Temperature(°C)
MTA040P02KN3
CYStek Product Specification
Spec. No. : C064N3
Issued Date : 2016.08.16
Revised Date :
CYStech Electronics Corp.
Page No. : 5/9
Typical Characteristics(Cont.)
Threshold Voltage vs Junction Tempearture
Maximum Safe Operating Area
1.4
1.2
1.0
0.8
0.6
0.4
0.2
100
10
RDS(ON)
Limited
ID=-1mA
100μs
1ms
1
10ms
100ms
1s
TA=25°C, Tj=150°C,
VGS=-4.5V, R JA=100°C/W,
single pulse
0.1
0.01
θ
DC
ID=-250μA
-75 -50 -25
0
25 50 75 100 125 150 175
0.1
1
10
100
Tj, Junction Temperature(°C)
-VDS, Drain-Source Voltage(V)
Maximum Drain Current vs Junction Temperature
Typical Transfer Characteristics
30
25
20
15
10
5
5
VDS=-5V
4.5
4
3.5
3
2.5
2
1.5
1
VGS=-4.5V, Tj(max)=150°C,
JA
R
=100°C/W, single pulse
θ
0.5
0
0
25
50
75
Tj, Junction Temperature(°C)
100
125
150
175
0
1
2
-VGS, Gate-Source Voltage(V)
3
4
5
Forward Transfer Admittance vs Drain Current
Single Pulse Power Rating, Junction to Case
10
300
250
200
150
100
50
TJ(MAX)=150°C
TA=25°C
1
0.1
RθJA=100°C/W
VDS=-10V
Pulsed
Ta=25°C
0
0.01
0.0001 0.001
0.01
0.1
1
10
100
0.001
0.01
0.1
-ID, Drain Current(A)
1
10
Pulse Width(s)
MTA040P02KN3
CYStek Product Specification
Spec. No. : C064N3
Issued Date : 2016.08.16
Revised Date :
CYStech Electronics Corp.
Page No. : 6/9
Typical Characteristics(Cont.)
Power Derating Curve
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
0
25
50
75
100
125
150
175
TA, Ambient Temperature(℃)
Transient Thermal Response Curves
1
D=0.5
0.2
JA
1.RθJA(t)=r(t)*Rθ
0.1
0.1
1
2.Duty Factor, D=t /t
2
0.05
JM
A
DM
JA
3.T -T =P *Rθ (t)
JA=100°C/W
4.Rθ
0.02
0.01
0.01
Single Pulse
0.001
1.E-04
1.E-03
1.E-02
1.E-01
1.E+00
1.E+01
1.E+02
1.E+03
t1, Square Wave Pulse Duration(s)
MTA040P02KN3
CYStek Product Specification
Spec. No. : C064N3
Issued Date : 2016.08.16
Revised Date :
CYStech Electronics Corp.
Page No. : 7/9
Reel Dimension
Carrier Tape Dimension
MTA040P02KN3
CYStek Product Specification
Spec. No. : C064N3
Issued Date : 2016.08.16
Revised Date :
CYStech Electronics Corp.
Page No. : 8/9
Recommended wave soldering condition
Product
Peak Temperature
Soldering Time
5 +1/-1 seconds
Pb-free devices
260 +0/-5 °C
Recommended temperature profile for IR reflow
Profile feature
Average ramp-up rate
(Tsmax to Tp)
Sn-Pb eutectic Assembly
Pb-free Assembly
3°C/second max.
3°C/second max.
Preheat
−Temperature Min(TS min)
−Temperature Max(TS max)
−Time(ts min to ts max)
100°C
150°C
60-120 seconds
150°C
200°C
60-180 seconds
Time maintained above:
−Temperature (TL)
− Time (tL)
183°C
60-150 seconds
240 +0/-5 °C
217°C
60-150 seconds
260 +0/-5 °C
Peak Temperature(TP)
Time within 5°C of actual peak
temperature(tp)
10-30 seconds
20-40 seconds
Ramp down rate
6°C/second max.
6°C/second max.
8 minutes max.
6 minutes max.
Time 25 °C to peak temperature
Note : All temperatures refer to topside of the package, measured on the package body surface.
MTA040P02KN3
CYStek Product Specification
Spec. No. : C064N3
Issued Date : 2016.08.16
Revised Date :
CYStech Electronics Corp.
Page No. : 9/9
SOT-23 Dimension
Marking:
Date Code
A4P2
Device Code
3-Lead SOT-23 Plastic
Surface Mounted Package
CYStek Package Code: N3
Style: Pin 1.Gate 2.Source 3.Drain
Inches
DIM
Millimeters
Inches
Millimeters
DIM
Min.
Max.
Min.
Max.
3.04
1.70
1.30
0.50
2.30
0.10
Min.
Max.
Min.
Max.
0.20
0.67
1.15
2.95
0.65
0.50
A
B
C
D
G
H
0.1102 0.1204
0.0472 0.0669
0.0335 0.0512
0.0118 0.0197
0.0669 0.0910
0.0000 0.0040
2.80
1.20
0.89
0.30
1.70
0.00
J
K
L
S
V
0.0032
0.0118
0.0335
0.0830
0.0098
0.0118
0.0079
0.0266
0.0453
0.1161
0.0256
0.0197
0.08
0.30
0.85
2.10
0.25
0.30
L1
Notes: 1.Controlling dimension: millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material:
• Lead: Pure tin plated.
• Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0.
Important Notice:
• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
• CYStek reserves the right to make changes to its products without notice.
• CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
• CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
MTA040P02KN3
CYStek Product Specification
相关型号：
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