FDMA1027PT [FAIRCHILD]
Dual P-Channel PowerTrench㈢ MOSFET -20 V, -3 A, 120 mヘ; 双P沟道MOSFET PowerTrench㈢ -20 V， -3 A ， 120米ヘ
| 型号： | FDMA1027PT |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Dual P-Channel PowerTrench㈢ MOSFET -20 V, -3 A, 120 mヘ |
| 文件： | 总6页 (文件大小：296K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
September 2008
FDMA1027PT
Dual P-Channel PowerTrench® MOSFET
tm
–20 V, –3 A, 120 mΩ
Features
General Description
This device is designed specifically as a single package solution
for the battery charge switch in cellular handset and other
ultra-portable applications. It features two independent
P-Channel MOSFETs with low on-state resistance for minimum
conduction losses. When connected in the typical common
source configuration, bi-directional current flow is possible.
Max rDS(on) = 120 mΩ at VGS = -4.5 V, ID = -3.0 A
Max rDS(on) = 160 mΩ at VGS = -2.5 V, ID = -2.5 A
Max rDS(on) = 240 mΩ at VGS = -1.8 V, ID = -1.0 A
Low profile - 0.55 mm maximum - in the new package
MicroFET 2x2 Thin
The MicroFET 2x2 Thin package offers exceptional thermal
performance for it's physical size and is well suited to linear
mode applications.
RoHS Compliant
Applications
Battery management
Load switch
Battery protection
PIN 1
S1 G1 D2
1
2
3
6
5
6
5
4
1
S1
G1
D2
D1
D1
D2
G2
2
4
S2
3
D1 G2 S2
MicroFET 2X2 Thin
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
Parameter
Ratings
Units
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Pulsed
-20
V
V
VGS
ID
±8
TA = 25 °C
(Note 1a)
-3
A
-6
1.4
Power Dissipation for Single Operation
Power Dissipation for Single Operation
TA = 25 °C
TA = 25 °C
(Note 1a)
(Note 1b)
PD
W
0.7
TJ, TSTG
Operating and Storage Junction Temperature Range
-55 to +150
°C
Thermal Characteristics
RθJA
RθJA
RθJA
RθJA
Thermal Resistance, Junction to Ambient (Single Operation)
(Note 1a)
(Note 1b)
86
173
69
Thermal Resistance, Junction to Ambient (Single Operation)
Thermal Resistance, Junction to Ambient (Dual Operation)
Thermal Resistance, Junction to Ambient (Dual Operation)
°C/W
151
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
7 ’’
Tape Width
8 mm
Quantity
27
FDMA1027PT
MicroFET 2x2 Thin
3000 units
©2008 Fairchild Semiconductor Corporation
FDMA1027PT Rev.B1
www.fairchildsemi.com
1
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = -250 µA, VGS = 0 V
-20
V
∆BVDSS
∆TJ
Breakdown Voltage Temperature
Coefficient
I
D = -250 µA, referenced to 25 °C
-12
mV/°C
IDSS
IGSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
VDS = -16 V, VGS = 0 V
VGS = ±8 V, VDS = 0 V
-1
µA
±100
nA
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = -250 µA
-0.4
-0.7
2
-1.3
V
∆VGS(th)
∆TJ
Gate to Source Threshold Voltage
Temperature Coefficient
I
D = -250 µA, referenced to 25 °C
mV/°C
VGS = -4.5 V, ID = -3.0 A
VGS = -2.5 V, ID = -2.5 A
VGS = -1.8 V, ID = -1.0 A
90
120
160
240
120
172
rDS(on)
Drain to Source On Resistance
mΩ
VGS = -4.5 V, ID = -3.0 A ,
TJ = 125 °C
118
160
ID(on)
gFS
On to State Drain Current
Forward Transconductance
VGS = -4.5 V, VDS = -5 V
VDS = -5 V, ID = -3.0 A
-20
A
S
7
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
435
80
pF
pF
pF
VDS = -10 V, VGS = 0 V,
f = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
45
Switching Characteristics
td(on)
tr
td(off)
tf
Turn-On Delay Time
Rise Time
9
11
15
6
18
19
27
12
6
ns
ns
V
V
DD = -10 V, ID = -1.0 A
GS = -4.5 V, RGEN = 6 Ω
Turn-Off Delay Time
Fall Time
ns
ns
Qg
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
4
nC
nC
nC
VDD = -10 V, ID = -3.0 A
GS = -4.5 V
Qgs
Qgd
0.8
0.9
V
Drain-Source Diode Characteristics
IS
Maximum continuous Drain-Source Diode Forward Current
-1.1
-1.2
A
V
VSD
trr
Source to Drain Diode Forward Voltage
Reverse Recovery Time
VGS = 0 V, IS = -1.1 A (Note 2)
-0.8
17
6
ns
nC
IF = -3.0 A, di/dt = 100 A/µs
Qrr
Reverse Recovery Charge
Notes:
2
1. R
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
is guaranteed by design while R
is determined by
θCA
θJA
θJC
the user's board design.
a. 86 °C/W when mounted on
a 1 in pad of 2 oz copper.
b. 173 °C/W when mounted on a
minimum pad of 2 oz copper.
2
2. Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%.
©2008 Fairchild Semiconductor Corporation
FDMA1027PT Rev.B1
2
www.fairchildsemi.com
Typical Characteristics TJ = 25 °C unless otherwise noted
6
3.0
2.5
2.0
1.5
1.0
0.5
VGS = -4.5 V
PULSE DURATION = 300
DUTY CYCLE = 2%MAX
µs
5
VGS = -1.5 V
VGS = -2 V
VGS = -3.5 V
4
VGS = -1.8 V
VGS = -2 V
VGS = -1.8 V
3
2
1
0
VGS = -3 V
VGS = -2.5 V
VGS = -2.5 V
VGS = -1.5 V
PULSE DURATION = 300
DUTY CYCLE = 2% MAX
µs
VGS = -4.5 V
5
VGS = -3.5 V
4
VGS = -3 V
0
0.5
1.0
1.5
2.0
2.5
0
1
2
3
6
-ID, DRAIN CURRENT (A)
-VDS DRAIN TO SOURCE VOLTAGE (V)
,
Figure2. N o r m a l i z e d O n - R e s i s t a n c e
vs Drain Current and Gate Voltage
Figure 1. On Region Characteristics
1.4
0.28
ID = -3 A
GS = -4.5 V
PULSE DURATION = 300
DUTY CYCLE = 2% MAX
µs
V
1.3
1.2
1.1
1.0
0.9
0.8
0.24
0.20
0.16
0.12
0.08
0.04
ID = -1.5 A
TJ = 125 o
C
TJ = 25 o
C
-50 -25
0
25
50
75
100 125 150
0
2
4
6
8
10
TJ,
JUNCTION TEMPERATURE ( )
oC
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure4. On-Resistance vs Gate to
Source Voltage
Figure 3. Normalized On Resistance
vs Junction Temperature
6
10
PULSE DURATION = 300
DUTY CYCLE = 2% MAX
µs
VGS = 0 V
TJ = 125 o
5
4
3
2
1
0
1
0.1
VDS = -5 V
C
TJ = 25 o
C
0.01
TJ = 125 oC
TJ = 25 o
C
0.001
0.0001
TJ = -55 o
C
TJ = -55 o
C
0
0.5
1.0
1.5
2.0
2.5
0
0.2
0.4
0.6
0.8
1.0
1.2
-VSD, BODY DIODE FORWARD VOLTAGE (V)
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure6. Source to Drain Diode
Forward Voltage vs Source Current
©2008 Fairchild Semiconductor Corporation
FDMA1027PT Rev.B1
3
www.fairchildsemi.com
Typical Characteristics TJ = 25 °C unless otherwise noted
5
700
600
500
400
300
200
100
0
ID = -3 A
4
VDD = -5 V
Ciss
3
VDD = -10 V
2
VDD = -15 V
f = 1 MHz
= 0 V
Coss
1
0
V
GS
Crss
0
1
2
3
4
5
0
4
8
12
16
20
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Q , GATE CHARGE (nC)
g
Figure 7. Gate Charge Characteristics
Figure8. C a p a c i t a n c e v s D r a i n
to Source Voltage
100
1000
100
10
THIS AREA IS
LIMITED BY r
DS(on)
10
1
VGS = -10 V
100 us
1 ms
SINGLE PULSE
RθJA = 173 oC/W
TA = 25 oC
10 ms
SINGLE PULSE
TJ = MAX RATED
RθJA = 173 oC/W
100 ms
1 s
10 s
DC
0.1
1
T
A = 25 oC
0.01
0.2
10-4
10-3
10-2
t, PULSE WIDTH (sec)
10-1
1
10
0.1
1
10
100
100 1000
-VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 9. Forward Bias Safe
Operating Area
Figure10. Single Pulse Maximum
Power Dissipation
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.05
0.02
0.01
P
DM
0.1
t
1
t
2
NOTES:
DUTY FACTOR: D = t /t
SINGLE PULSE
RθJA = 173 oC/W
1
2
PEAK T = P
J
x Z
x R
+ T
DM
θJA
θJA A
0.01
10-4
10-3
10-2
10-1
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 11. Junction-to-Ambient Transient Thermal Response Curve
©2008 Fairchild Semiconductor Corporation
FDMA1027PT Rev.B1
4
www.fairchildsemi.com
Dimensional Outline and Pad Layout
©2008 Fairchild Semiconductor Corporation
FDMA1027PT Rev.B1
5
www.fairchildsemi.com
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®
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IntelliMAX™
ISOPLANAR™
MegaBuck™
MICROCOUPLER™
MicroFET™
MicroPak™
PowerTrench
The Power Franchise
®
Programmable Active Droop™
SM
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QFET
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TinyBoost™
TinyBuck™
Quiet Series™
RapidConfigure™
Current Transfer Logic™
®
TinyLogic
®
EcoSPARK
TINYOPTO™
TinyPower™
TinyPWM™
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µSerDes™
EfficentMax™
™
EZSWITCH™ *
Saving our world, 1mW /W /kW at a time™
™
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®
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®
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tm
®
*
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®
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Definition of Terms
Datasheet Identification
Product Status
Definition
Datasheet contains the design specifications for product development. Specifications may
change in any manner without notice.
Advance Information
Formative / In Design
Datasheet contains preliminary data; supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make changes at any time without notice to
improve design.
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First Production
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
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Full Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Not In Production
Rev. I36
www.fairchildsemi.com
©2008 Fairchild Semiconductor Corporation
FDMA1027PT Rev.B1
6
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