FDMA1029PZ [ONSEMI]
双 P 沟道，PowerTrench® MOSFET，-20V，-3.1A，95mΩ;
| 型号： | FDMA1029PZ |
| 厂家： | 
ONSEMI |
| 描述： | 双 P 沟道，PowerTrench® MOSFET，-20V，-3.1A，95mΩ PC 开关 光电二极管 晶体管 |
| 文件： | 总7页 (文件大小：173K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
MOSFET – Dual, P-Channel,
POWERTRENCH)
V
R
MAX
I MAX
D
DS
DS(ON)
−20 V
95 mW @ −4.5 V
141 mW @ −2.5 V
−3.1 A
-20 V, -3.1 A, 95 W
FDMA1029PZ
PIN 1
S1 G1 D2
General Description
This device is designed specifically as a single package solution for
the battery charge switch in cellular handset and other ultra−portable
applications. It features two independent P−Channel MOSFETs with
low on−state resistance for minimum conduction losses. When
connected in the typical common source configuration, bi−directional
current flow is possible.
D1
D2
D1 G2 S2
WDFN6 2x2, 0.65P
(MicroFET 2x2)
CASE 511DA
The MicroFET t 2x2 package offers exceptional thermal
performance for its physical size and is well suited to linear mode
applications
Features
MARKING DIAGRAM
• –3.1 A, –20 V
♦ R
♦ R
= 95 mW @ V = –4.5 V
GS
DS(ON)
&Z&2&K
029
= 141 mW @ V = –2.5 V
DS(ON)
GS
• Low Profile – 0.8 mm maximum – in the New Package MicroFET
2x2 mm
&Z = Assembly Plant Code
&2 = 2−Digit Date Code
&K = 2−Digits Lot Run Traceability Code
029 = Specific Device Code
• HBM ESD Protection Level > 2.5 kV (Note 3)
• Free from halogenated compounds and antimony oxides
• This Device is Pb−Free, Halide Free and is RoHS Compliant
MOSFET MAXIMUM RATINGS (T = 25°C, unless otherwise noted)
A
Symbol
Parameter
Drain−Source Voltage
Ratings
−20
Unit
V
PIN ASSIGNMENT
V
DS
GS
V
Gate−Source Voltage
12
V
S1
G1
D2
1
2
3
6
5
4
D1
G2
S2
I
Drain Current
− Continuous (Note 1a)
− Pulsed
A
D
−3.1
−6
P
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
W
D
1.4
0.7
T , T
Operating and Storage Junction
Temperature Range
−55 to +150
°C
J
STG
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
See detailed ordering and shipping information on page 5 of
this data sheet.
THERMAL CHARACTERISTICS (T = 25°C, unless otherwise noted)
A
Symbol
Parameter
Ratings
Unit
R
Thermal Resistance, Junction to Ambient
(Note 1a)
86 (Single
Operation)
°C/W
q
q
q
q
JA
JA
JA
JA
R
R
R
Thermal Resistance, Junction to Ambient 173 (Single
(Note 1b)
Operation)
Thermal Resistance, Junction to Ambient
(Note 1c)
69 (Dual
Operation)
°C/W
Thermal Resistance, Junction to Ambient
(Note 1d)
151 (Dual
Operation)
© Semiconductor Components Industries, LLC, 2009
1
Publication Order Number:
March, 2023 − Rev. 3
FDMA1029PZ/D
FDMA1029PZ
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain–Source Breakdown Voltage
V
I
= 0 V, I = –250 mA
–20
−
−
−
−
V
DSS
GS
D
Breakdown Voltage Temperature
Coefficient
= –250 mA, Referenced to 25°C
–12
mV/°C
DBVDSS
DTJ
D
I
Zero Gate Voltage Drain Current
Gate–Body Leakage
V
V
= –16 V, V = 0 V
−
−
−
−
–1
10
mA
mA
DSS
GSS
DS
GS
I
= 12 V, V = 0 V
DS
GS
ON CHARACTERISTICS
V
Gate Threshold Voltage
V
I
= V I = –250 mA
GS, D
–0.6
−
–1.0
4
–1.5
−
V
GS(th)
DS
Gate Threshold Voltage Temperature
Coefficient
= –250 mA, Referenced to 25°C
mV/°C
DVGS(th)
DTJ
D
R
DS(on)
Static Drain–Source On–Resistance
V
GS
V
GS
V
GS
= –4.5 V, I = –3.1 A
−
−
−
60
88
87
95
141
140
mW
D
= –2.5 V, I = –2.5 A
D
= –4.5 V, I = –3.1 A, T = 125°C
D
J
g
FS
Forward Transconductance
V
DS
= –10 V, I = –3.1 A
−
–11
−
S
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
DS
= –10 V, V
= V, f = 1.0 MHz
0
−
−
−
540
120
100
−
−
−
pF
pF
pF
iss
GS
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS
t
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
V
R
= –10 V, I = –1 A, V = –4.5 V,
−
−
−
−
−
−
−
13
11
24
20
59
58
10
−
ns
ns
d(on)
DD
D
GS
= 6 W
GEN
t
r
t
37
ns
d(off)
t
f
36
ns
Q
g
V
DS
= –10 V, I = –3.1 A, V = –4.5 V
7.0
1.1
2.4
nC
nC
nC
D
GS
Q
gs
gd
Q
−
DRAIN−SOURCE CHARACTERISTICS
Maximum Continuous Source–Drain Diode Forward Current
I
S
−
−
−
−
−
–0.8
25
9
−1.1
–1.2
−
A
V
V
SD
Source–Drain Diode Forward Voltage
Diode Reverse Recovery Time
Diode Reverse Recovery Charge
V = 0 V, I = –1.1 A (Note 2)
GS S
t
rr
I = –3.1 A, dI /dt = 100 A/ms
ns
nC
F
F
Q
rr
−
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2
1. R
is determined with the device mounted on a 1 in oz. copper pad on a 1.5 x 1.5 in. board of FR−4 material. R
is guaranteed by design
JC
q
q
JA
while R
(a) R
is determined by the user’s board design.
q
JA
JA
JA
JA
2
= 86°C/W when mounted on a 1 in pad of 2 oz copper, 1.5” x 1.5” x 0.062” thick PCB. For single operation.
q
q
(b) R
(c) R
= 173°C/W when mounted on a minimum pad of 2 oz copper. For single operation.
2
= 69°C/W when mounted on a 1 in pad of 2 oz copper, 1.5” x 1.5” x 0.062” thick PCB. For dual operation.
q
(d) R
= 151°C/W when mounted on a minimum pad of 2 oz copper. For dual operation.
q
JA
a. 86°C/W when
b. 173°C/W when
mounted on a
minimum pad
of 2 oz copper.
c. 69°C/W when
d. 151°C/W when
mounted on a
minimum pad
of 2 oz copper.
mounted on a
mounted on a
2
2
1 in pad of
1 in pad of
2 oz copper.
2 oz copper.
2. Pulse Test: Pulse Width < 300 ms, Duty Cycle < 2.0%.
3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
www.onsemi.com
2
FDMA1029PZ
TYPICAL CHARACTERISTICS (T = 25°C, unless otherwise noted)
J
6
5
4
3
2
1
0
2.6
V
= 4.5 V
GS
3.5 V
3.0 V
2.5 V
V
= −2.0 V
GS
2.2
1.8
1.4
1
2.0 V
−2.5 V
−3.0 V
−4.5 V
−3.5 V −4.0 V
4
1.5 V
0.6
0
0.4
0.8
1.2
1.6
2
0
1
2
3
5
6
−V , DRAIN−SOURCE VOLTAGE (V)
DS
−I , DRAIN CURRENT (A)
D
Figure 1. On−Region Characteristics
Figure 2. On−Resistance Variation with
Drain Current and Gate Voltage
1.5
1.4
1.3
1.2
1.1
1
0.2
0.16
0.12
0.08
0.04
I
V
= −3.1 A
I = −3.1 A
D
D
= −4.5 V
GS
T = 125°C
A
0.9
0.8
0.7
T = 25°C
A
−50 −25
0
25
50
75
100 125 150
0
2
4
6
8
10
T , JUNCTION TEMPERATURE (°C)
J
−V , GATE TO SOURCE VOLTAGE (V)
GS
Figure 3. On−Resistance Variation with Temperature
Figure 4. On−Resistance Variation with
Gate−to−Source Voltage
6
100
10
V
DS
= −5 V
V
= 0 V
GS
5
4
3
2
1
0
1
T = 125°C
A
0.1
0.01
0.001
0.0001
25°C
−55°C
T = 125°C
A
−55°C
25°C
0
0.5
1
1.5
2
2.5
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
−V , GATE TO SOURCE VOLTAGE (V)
GS
−V , BODY DIODE FORWARD VOLTAGE (V)
SD
Figure 5. Transfer Characteristics
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature
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3
FDMA1029PZ
TYPICAL CHARACTERISTICS (T = 25°C, unless otherwise noted) (continued)
J
10
8
1000
800
I
D
= −3.1 A
f = 1 MHz
= 0 V
V
GS
V
DS
= −5 V
−15 V
600
400
200
0
6
C
iss
−10 V
4
C
oss
2
C
rss
0
0
2
4
6
8
10
12
14
0
4
8
12
16
18
Q , GATE CHARGE (nC)
g
−V , DRAIN TO SOURCE VOLTAGE (V)
DS
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance Characteristics
100
10
50
40
30
20
10
0
SINGLE PULSE
= 173°C/W
T = 25°C
A
R
q
JA
R
LIMIT
DS(ON)
100 ms
1 ms
10 ms
100 ms
1 s
10 s
DC
V
= −4.5 V
GS
0.1
SINGLE PULSE
R
T = 25°C
= 173°C/W
q
JA
A
0.01
0.1
1
10
100
0.0001 0.001 0.01
0.1
1
10
100
1000
−V , DRAIN−SOURCE VOLTAGE (V)
DS
Figure 9. Maximum Safe Operating Area
Figure 10. Single Pulse Maximum Power Dissipation
1
D = 0.5
R
R
(t) = r(t) x R
=173°C/W
q
q
q
JA
JA
JA
0.2
0.1
0.05
0.02
0.01
0.1
P(pk)
t
1
t
2
SINGLE PULSE
T − T = P x R (t)
q
JA
J
A
Duty Cycle, D = t / t
1
2
0.01
0.0001
0.001
0.01
0.1
1
10
100
1000
t , TIME (s)
1
Figure 11. Transient Thermal Response Curve
(Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.)
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4
FDMA1029PZ
PACKAGE MARKING AND ORDERING INFORMATION
†
Device
Device Marking
Package
Reel Size
Tape Width
Shipping
FDMA1029PZ
029
WDFN6 2x2, 0.65P
(MicroFET 2x2)
7”
8 mm
3000 / Tape & Reel
(Pb−Free, Halide Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States
and/or other countries.
MicroFET is trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other
countries.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WDFN6 2x2, 0.65P
CASE 511DA
ISSUE O
DATE 31 JUL 2016
0.05
C
2.0
A
2X
B
1.80
1.72
2.0
0.80(2X)
1.00(2X)
0.21
1.41
0.05
C
2.25
TOP VIEW
2X
0.42(6X)
PIN#1 IDENT
0.42(6X)
(0.10)
0.65
0.75 0.05
RECOMMENDED
LAND PATTERN
0.10
C
0.20 0.05
C
0.08
C
0.025 0.025
SEATING
PLANE
SIDE VIEW
NOTES:
A. CONFORM TO JADEC REGISTRATIONS MO−229,
VARIATION VCCC, EXCEPT WHERE NOTED.
2.00 0.05
1.64 0.05
B. DIMENSIONS ARE IN MILLIMETERS.
0.645 0.05
0.350
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 2009.
PIN#1 IDENT
(0.185)4X
D. LAND PATTERN RECOMMENDATION IS
EXISTING INDUSTRY LAND PATTERN.
1
3
0.275 0.05
(6X)
F. NON−JEDEC DUAL DAP
0.86 0.05
2.00 0.05
(0.57)
F
6
4
0.33 0.05
(6X)
0.65
0.10
0.05
C A B
1.30
C
BOTTOM VIEW
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13615G
WDFN6 2X2, 0.65P
PAGE 1 OF 1
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