IRDC3637EVAL [INFINEON]

IR3637 EVALUATION BOARD USER GUIDE; IR3637评估板操作指南
IRDC3637EVAL
型号: IRDC3637EVAL
厂家: Infineon    Infineon
描述:

IR3637 EVALUATION BOARD USER GUIDE
IR3637评估板操作指南

文件: 总8页 (文件大小:753K)
中文:  中文翻译
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IRDC3637EVAL  
IR3637 EVALUATION BOARD USER GUIDE  
DESCRIPTION  
The IR3637 controller IC is designed to  
provide a low cost synchronous Buck  
regulator for on-board DC to DC  
applications in a small 8-pin SOIC. The  
output voltage can be precisely regulated  
using the internal 0.8V reference voltage  
for low voltage applications.  
The IR3637 operates at a fixed internal  
400KHz switching frequency to reduce the  
component size.  
The reference board is designed for  
1.8V output using +5V and +12V  
supplies. This will demonstrate the  
main features of IC.  
This user guide contains the schematic  
and bill of materials, the design  
guidelines are described in data sheet.  
SPECIFICATION DATA  
Vc = 12V  
The device features under-voltage lockout  
for both input supplies, an external  
programmable soft-start function as well as  
output under-voltage detection that latches  
off the device when an output short is  
detected.  
Vcc=Vin=5V  
Vout=1.8V  
Iout =7A  
Output Ripple = 50mV  
Fs = 400KHz  
INPUT / OUTPUT CONNECTIONS  
The connection points are shown in  
Figure1. Connect the power supply  
cables according to this figure,  
minimizing wire lengths to reduce  
losses in the wire. Test points J1 and  
J2 provide easy connection for  
oscilloscope voltage probe to monitor  
the inductor points and output voltage.  
The following is the input / output connections:  
Inputs:  
JP1: Input (+5V) and GND  
JU1: Vc  
Outputs:  
JP2: Vout (+1.8V) and GND  
Other Connections:  
J1: Scope connection for Vout  
J2: Scope connection for Inductor Point  
PACKAGE INFORMATION  
1
2
3
4
8
7
6
5
Fb  
Vcc  
SS/SD  
Comp  
Vc  
LDrv  
Gnd  
HDrv  
Rev1.0  
4/29/2005  
1
IRDC3637EVAL  
CONNECTION DIAGRAM  
+12V  
Supply  
+5V  
7A  
Supply  
Load  
Figure 1 – Connection diagram of evaluation board for IR3637  
Rev1.0  
4/29/2005  
2
IRDC3637EVAL  
LAYOUT  
The top side (component) layer for  
IR3637 Eval board is shown in Figure  
2. The input capacitors are all located  
close to the MOSFETs. All the  
decoupling capacitors, and feedback  
components are located close to IC.  
The feedback resistors are tied to the  
output voltage at the point of  
regulation.  
The PCB is 4-layers board, one  
layer is dedicated to Power GND  
and the analog GND is kept  
separated from the PGND and it is  
connected at a single point.  
Figure 2 – Top layer of evaluation board for IR3637  
Rev1.0  
4/29/2005  
3
IRDC3637EVAL  
SCHEMATIC  
1
2
3
4
JP1  
VIN  
VIN  
D
C
B
A
D
C
B
A
INPUT  
GND  
R4  
C8  
C9  
D1  
VC  
VC/VCC  
JU1  
BAT54SCT  
C6  
R5  
C10  
C1  
C5  
Q1  
S1  
J2  
J1  
D1  
C2  
R6  
SS 8  
COM7 P  
1
5HDRV  
VGH  
G1  
SS  
HDRV  
LDR V  
GND  
D1  
L1  
JP2  
D3  
U1  
IR3637  
+
VO  
N25  
D2  
LX  
VO  
3
COMP  
FB  
S2  
C11  
OUTPUT  
C12  
+
C13  
+
R7  
LDR V  
4
VGL  
G2  
D2  
GND  
MOSFET N_DUAL  
R1  
C3  
R8  
C4  
R9  
C7  
N40  
R10  
R3  
R2  
Title  
Si ze  
IR3637 - DUAL SO8 MOSFET  
Number  
Revision  
JE3637S-V1R0  
Orcad A  
Date:  
File:  
10-Mar-2005  
Sheet of  
Drawn By:  
C:\PCB2\PCB_last6.ddb  
1
2
3
4
Figure 3 – Schematic of the evaluation board  
Rev1.0  
4/29/2005  
4
IRDC3637EVAL  
BILL OF MATERIAL  
Ref Desig  
Description  
Value  
Qty  
Part#  
Manuf  
Q1  
Dual MOSFET  
20V, 13.4mOhm  
1
IRF8910  
IR  
U1  
D3  
Controller  
Diode  
Synchronous PWM  
Fast Switching  
1
1
1
4
IR3637  
BAT54A  
IR  
IR  
L1  
Inductor  
1.5uH, 8A, 10 mOhm  
150uF, 6.3V, 40mOhm  
DO3316P-152  
6TPC150M  
Coilcraft  
Sanyo  
C8,9,12,13  
Cap, Poscap  
C2,C5  
Cap, Ceramic  
Cap, Ceramic  
0.1uF, X7R, 16V  
1uF, X5R, 6.3V  
2
3
ECJ-1VB1C104K  
ECJ-1VB0J105K  
Panasonic  
Panasonic  
C1,10,11  
C3  
C4  
Cap, Ceramic  
Cap, Ceramic  
Resistor  
Resistor  
Resistor  
Resistor  
Resistor  
Capacitor  
Diode  
22pF, NPO, 100V  
1800pF, X7R, 50V  
16K, 1%  
1
1
1
1
1
4
3
2
1
2
2
1
ECJ-1VC2A220J  
Panasonic  
Panasonic  
ECJ-1VB1H182K  
R3  
Any  
Any  
Any  
Any  
R8  
1.24K, 1%  
R9  
1K, 1%  
R2,4,6,7  
R1,5,10  
C6,7  
D1  
0 Ohm  
Not Used  
Not Used  
Not Used  
J1,J2  
JP1,JP2  
JU1  
Socket  
Scope probe  
Wire Connect  
2-Pin Header  
131-5031-00  
ED1973-ND  
S1012-02-ND  
Tektronix  
Digi-Key  
Digi-Key  
Terminal  
Terminal  
Rev1.0  
4/29/2005  
5
IRDC3637EVAL  
TYPICAL OPERATING WAVEFORMS  
Test Conditions:  
Vcc=Vin=5V, Vc=12V, Vout=1.8V, Iout=0-7A, Ta=Room Temp, No Air Flow.  
Unless otherwise specified.  
Figure 5 - Start up waveforms  
Ch1: Vin=Vcc, Ch2: Vc, Ch3: Vss, Ch4: Vout  
Figure 4 - Start up waveforms  
Ch1: Vin=Vcc, Ch2: Vc, Ch3: Vss, Ch4: Vout  
Figure 7 - Gates waveforms  
Ch1: Hdrv, Ch2Ldrv,, Ch3:Inductor Point  
ILoad=5A  
Figure 6 - Gates waveforms  
Ch1: Hdrv, Ch2Ldrv,, Ch4:Inductor Current  
ILoad=5A  
Rev1.0  
4/29/2005  
6
IRDC3637EVAL  
TYPICAL OPERATING WAVEFORMS  
Test Conditions:  
Vcc=Vin=5V, Vc=12V, Vout=1.8V, Iout=0-7A, Ta=Room Temp, No Air Flow.  
Unless otherwise specified.  
Figure 8 - Shutdown by shorting the SS pin  
Figure 9 - Output Voltage Ripple  
Ch1: Hdrv, Ch2Ldrv,, Ch3:SS  
Ch1: Vout, Ch4: Inductor Current  
ILoad=5A  
ILoad=5A  
Figure 10 - Load Transient (0-5A)  
Ch1: Vout, Ch4: Step Load Current  
Figure 11 - Load Transient (5-0A)  
Ch1: Vout, Ch4: Step Load Current  
Rev1.0  
4/29/2005  
IRDC3637EVAL  
TYPICAL PERFORMANMCE CURVES  
Test Conditions:  
Vcc=Vin=5V, Vc=12V, Vout=1.8V, Iout=0-7A, Ta=Room Temp, No Air Flow.  
Unless otherwise specified.  
Efficiency  
Vc=12V, Vcc=Vbus=5V, Iout=0-8A, Fs=400KHz  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
0
1
2
3
4
5
6
7
8
9
Iout (A)  
Figure 12 - Efficiency using IRF8910 Dual MOSFET  
This product has been designed and qualified for the Industrial market.  
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310)252-7105  
TAC FAX: (310) 252-7903  
Visit us at www.irf.com for sales contact information  
Data and specification subject to change without notice. 02/01  
Rev1.0  
4/29/2005  

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