IRFB3607GPBF [INFINEON]
Power Field-Effect Transistor, 80A I(D), 75V, 0.009ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-220AB, HALOGEN FREE AND LEAD FREE, PLASTIC PACKAGE-3;
| 型号： | IRFB3607GPBF |
| 厂家： | 
Infineon |
| 描述： | Power Field-Effect Transistor, 80A I(D), 75V, 0.009ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-220AB, HALOGEN FREE AND LEAD FREE, PLASTIC PACKAGE-3 局域网 开关 脉冲 晶体管 |
| 文件： | 总8页 (文件大小：285K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 96329
IRFB3607GPbF
Applications
l High Efficiency Synchronous Rectification in
HEXFET® Power MOSFET
SMPS
l Uninterruptible Power Supply
l High Speed Power Switching
l Hard Switched and High Frequency Circuits
D
S
VDSS
75V
RDS(on) typ.
max.
ID
7.34m
9.0m
80A
G
Benefits
l Improved Gate, Avalanche and Dynamic
dv/dt Ruggedness
D
l Fully Characterized Capacitance and
Avalanche SOA
l Enhanced body diode dV/dt and dI/dt
Capability
l Lead-Free
S
D
G
l Halogen-Free
TO-220AB
IRFB3607GPbF
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
Parameter
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Max.
80
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
56
A
310
PD @TC = 25°C
W
140
Maximum Power Dissipation
Linear Derating Factor
0.96
W/°C
V
VGS
± 20
Gate-to-Source Voltage
27
Peak Diode Recovery
dv/dt
TJ
V/ns
°C
-55 to + 175
Operating Junction and
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
300
10lb in (1.1N m)
Mounting torque, 6-32 or M3 screw
Avalanche Characteristics
Single Pulse Avalanche Energy
EAS (Thermally limited)
120
46
mJ
A
Avalanche Current
IAR
Repetitive Avalanche Energy
EAR
mJ
14
Thermal Resistance
Symbol
Parameter
Typ.
–––
Max.
Units
RθJC
Junction-to-Case
1.045
–––
62
RθCS
RθJA
0.50
–––
°C/W
Case-to-Sink, Flat Greased Surface, TO-220
Junction-to-Ambient, TO-220
www.irf.com
1
08/12/10
IRFB3607GPbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
∆V(BR)DSS/∆TJ
RDS(on)
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Min. Typ. Max. Units
75 ––– –––
––– 0.096 ––– V/°C Reference to 25°C, ID = 5mA
Conditions
VGS = 0V, ID = 250µA
V
––– 7.34 9.0
VGS = 10V, ID = 46A
mΩ
VGS(th)
2.0
–––
4.0
20
V
VDS = VGS, ID = 100µA
IDSS
Drain-to-Source Leakage Current
––– –––
µA VDS = 75V, VGS = 0V
VDS = 60V, VGS = 0V, TJ = 125°C
nA VGS = 20V
––– ––– 250
––– ––– 100
––– ––– -100
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
VGS = -20V
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
Conditions
VDS = 50V, ID = 46A
nC ID = 46A
DS = 38V
VGS = 10V
ID = 46A, VDS =0V, VGS = 10V
115 ––– –––
S
–––
–––
–––
–––
56
13
16
40
84
Qgs
Qgd
Qsync
Gate-to-Source Charge
–––
–––
–––
V
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
RG(int)
td(on)
tr
Internal Gate Resistance
Turn-On Delay Time
Rise Time
––– 0.55 –––
––– 16 –––
––– 110 –––
Ω
ns VDD = 49V
ID = 46A
td(off)
tf
Turn-Off Delay Time
Fall Time
–––
–––
43
96
–––
–––
RG = 6.8Ω
VGS = 10V
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
––– 3070 –––
––– 280 –––
––– 130 –––
––– 380 –––
––– 610 –––
pF VGS = 0V
VDS = 50V
ƒ = 1.0MHz
Coss eff. (ER)
VGS = 0V, VDS = 0V to 60V
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
Coss eff. (TR)
VGS = 0V, VDS = 0V to 60V
Diode Characteristics
Symbol
Parameter
Min. Typ. Max. Units
Conditions
MOSFET symbol
IS
Continuous Source Current
––– –––
A
D
S
80
(Body Diode)
Pulsed Source Current
(Body Diode)
showing the
integral reverse
G
ISM
––– ––– 310
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
––– –––
1.3
50
V
TJ = 25°C, IS = 46A, VGS = 0V
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
TJ = 25°C
VR = 64V,
–––
–––
–––
–––
–––
33
39
32
47
1.9
ns
IF = 46A
di/dt = 100A/µs
59
Qrr
Reverse Recovery Charge
48
nC
A
71
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
–––
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
ISD ≤ 46A, di/dt ≤ 1920A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
ꢀ Pulse width ≤ 400µs; duty cycle ≤ 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time
Calculated continuous current based on maximum allowable junction
temperature. Note that current limitations arising from heating of the
device leads may occur with some lead mounting arrangements.
Repetitive rating; pulse width limited by max. junction
temperature.
as Coss while VDS is rising from 0 to 80% VDSS
.
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS
.
Limited by TJmax, starting TJ = 25°C, L = 0.12mH
Rθ is measured at TJ approximately 90°C.
RG = 25Ω, IAS = 46A, VGS =10V. Part not recommended for use
above this value.
2
www.irf.com
IRFB3607GPbF
1000
100
10
1000
100
10
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
TOP
TOP
BOTTOM
BOTTOM
4.5V
4.5V
60µs PULSE WIDTH
≤
60µs PULSE WIDTH
Tj = 25°C
≤
Tj = 175°C
1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
100
10
3.0
2.5
2.0
1.5
1.0
0.5
I
= 80A
D
V
= 10V
GS
T
= 175°C
J
T
= 25°C
J
1
V
= 25V
DS
60µs PULSE WIDTH
≤
0.1
2
3
4
5
6
7
8
-60 -40 -20 0 20 40 60 80 100120140160180
, Junction Temperature (°C)
T
J
V
, Gate-to-Source Voltage (V)
GS
Fig 4. Normalized On-Resistance vs. Temperature
Fig 3. Typical Transfer Characteristics
12.0
100000
10000
1000
V
C
= 0V,
f = 1 MHZ
GS
I
= 46A
D
= C + C , C SHORTED
iss
gs gd ds
C
= C
10.0
8.0
6.0
4.0
2.0
0.0
rss
gd
V
V
= 24V
= 15V
DS
DS
C
= C + C
ds gd
oss
C
C
iss
oss
C
rss
100
0
10
Q
20
30
40
50
60
1
10
, Drain-to-Source Voltage (V)
100
, Total Gate Charge (nC)
V
DS
G
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
www.irf.com
3
IRFB3607GPbF
1000
100
10
1000
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
100
100µsec
T
= 175°C
J
1msec
10
1
T
= 25°C
J
10msec
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
DC
GS
1
0.1
1
10
100
0.0
0.5
1.0
1.5
2.0
V
, Drain-to-Source Voltage (V)
V
, Source-to-Drain Voltage (V)
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode Forward Voltage
100
95
90
85
80
75
70
80
70
60
50
40
30
20
10
0
Id = 5mA
25
50
75
100
125
150
175
-60 -40 -20 0 20 40 60 80 100120140160180
T
, Case Temperature (°C)
T , Temperature ( °C )
C
J
Fig 10. Drain-to-Source Breakdown Voltage
Fig 9. Maximum Drain Current vs. Case Temperature
1.20
500
I
D
450
400
350
300
250
200
150
100
50
TOP
5.6A
11A
BOTTOM 46A
1.00
0.80
0.60
0.40
0.20
0.00
0
-10
0
10 20 30 40 50 60 70 80
Drain-to-Source Voltage (V)
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
V
DS,
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
Fig 11. Typical COSS Stored Energy
4
www.irf.com
IRFB3607GPbF
10.00
1.00
0.10
0.01
0.00
D = 0.50
0.20
0.10
0.05
R1
R1
R2
R2
R3
R3
R4
R4
Ri (°C/W) τi (sec)
0.01109 0.000003
0.26925 0.000130
0.49731 0.001301
0.26766 0.008693
τ
τ
J τJ
τ
Cτ
1τ1
Ci= τi/Ri
τ
0.02
0.01
τ
τ
2 τ2
3τ3
4τ4
Notes:
SINGLE PULSE
( THERMAL RESPONSE )
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
100
10
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
∆
Tstart =25°C (Single Pulse)
0.01
0.05
0.10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
Tstart = 150°C.
j = 25°C and
∆Τ
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
150
125
100
75
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
TOP
BOTTOM 1.0% Duty Cycle
= 46A
Single Pulse
I
D
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
50
tav = Average time in avalanche.
25
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
0
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
25
50
75
100
125
150
175
Iav = 2DT/ [1.3·BV·Zth]
Starting T , Junction Temperature (°C)
EAS (AR) = PD (ave)·tav
J
Fig 15. Maximum Avalanche Energy vs. Temperature
www.irf.com
5
IRFB3607GPbF
4.5
4.0
3.5
3.0
20
15
10
5
I = 31A
F
V
= 64V
R
T = 25°C
J
T = 125°C
J
I
I
I
I
= 100µA
= 250µA
= 1.0mA
= 1.0A
2.5
2.0
1.5
1.0
D
D
D
D
0
-75 -50 -25
0
25 50 75 100125 150175 200
, Temperature ( °C )
0
200
400
600
800
1000
T
di /dt (A/µs)
J
F
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
560
20
I = 46A
I = 31A
F
F
480
400
320
240
160
80
V
= 64V
V
= 64V
R
R
T = 25°C
T = 25°C
J
J
15
10
5
T = 125°C
J
T = 125°C
J
0
0
0
200
400
600
800
1000
0
200
400
600
800
1000
di /dt (A/µs)
di /dt (A/µs)
F
F
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig. 19 - Typical Stored Charge vs. dif/dt
560
I = 46A
F
V
480
400
320
240
160
80
= 64V
R
T = 25°C
J
T = 125°C
J
0
0
200
400
600
800
1000
di /dt (A/µs)
F
Fig. 20 - Typical Stored Charge vs. dif/dt
6
www.irf.com
IRFB3607GPbF
Driver Gate Drive
P.W.
P.W.
Period
D.U.T
Period
D =
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dt controlled by RG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Inductor Current
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 20. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V
(BR)DSS
15V
t
p
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
V
2
GS
Ω
0.01
t
p
I
AS
Fig 21b. Unclamped Inductive Waveforms
Fig 21a. Unclamped Inductive Test Circuit
LD
VDS
VDS
90%
+
-
VDD
10%
VGS
D.U.T
VGS
Pulse Width < 1µs
Duty Factor < 0.1%
td(on)
td(off)
tr
tf
Fig 22a. Switching Time Test Circuit
Fig 22b. Switching Time Waveforms
Id
Vds
Vgs
L
VCC
DUT
Vgs(th)
0
1K
Qgs1
Qgs2
Qgd
Qgodr
Fig 23a. Gate Charge Test Circuit
Fig 23b. Gate Charge Waveform
www.irf.com
7
IRFB3607GPbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
TO-220AB Part Marking Information
EXAMPLE: THIS IS AN IRFB4310GPBF
PART NUMBER
DAT E CODE:
INTERNATIONAL
RECTIFIER
LOGO
Note: "G" suffix in part number
indicates "Halogen - F ree"
Y= LAST DIGIT OF
CAL E NDAR YE AR
Note: "P" in assembly lineposition
indicates "Lead - F ree"
ASSEMBLY
LOT CODE
WW= WORK WE E K
X= FACTORY CODE
TO-220AB packages are not recommended for Surface Mount Application.
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 08/2010
8
www.irf.com
相关型号：
IRFB3806
The IR MOSFET™ family of power MOSFETs utilizes proven silicon processes offering designers a wide portfolio of devices to support various applications such as DC motors, inverters, SMPS, lighting, load switches as well as battery powered applications. The devices are available in a variety of surface mount and through-hole packages with industry standard footprints for ease of design. The optimized gate drive options enables designers the flexibility of selecting super, logic or normal level drives.
INFINEON
IRFB4020
The StrongIRFET™ power MOSFET family is optimized for low RDS(on) and high current capability. The devices are ideal for low frequency applications requiring performance and ruggedness. The comprehensive portfolio addresses a broad range of applications including DC motors, battery management systems, inverters, and DC-DC converters.
INFINEON
IRFB4110
The StrongIRFET™ power MOSFET family is optimized for low RDS(on) and high current capability. The devices are ideal for low frequency applications requiring performance and ruggedness. The comprehensive portfolio addresses a broad range of applications including DC motors, battery management systems, inverters, and DC-DC converters.
INFINEON
©2020 ICPDF网 联系我们和版权申明