IRFP17N50L [INFINEON]
Power MOSFET(Vdss=500V, Rds(on)typ.=0.28ohm, Id=16A); 功率MOSFET （ VDSS = 500V ， RDS（ON） （典型值） = 0.28ohm ，ID = 16A）
| 型号： | IRFP17N50L |
| 厂家： | 
Infineon |
| 描述： | Power MOSFET(Vdss=500V, Rds(on)typ.=0.28ohm, Id=16A) |
| 文件： | 总8页 (文件大小：93K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 94322
IRFP17N50L
SMPS MOSFET
HEXFET® Power MOSFET
Applications
l Switch Mode Power Supply (SMPS)
l Zero Voltage Switching (ZVS) and High
Frequency Circuit
RDS(on) typ. Trr typ.
ID
VDSS
0.28Ω
500V
170ns
16A
l Uninterruptible Power Supply
l High Speed Power Switching
l PWM Inverters
Benefits
l Low Gate Charge Qg results in Simple Drive Requirement
l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness
l Fully Characterized Capacitance and Avalanche Voltage
and Current
TO-247AC
l Low Trr and Soft Diode Recovery
l High Performance Optimised Anti-parallel Diode
Absolute Maximum Ratings
Parameter
Max.
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
16
11
A
64
220
PD @TC = 25°C
Power Dissipation
W
W/°C
V
Linear Derating Factor
1.8
VGS
dv/dt
TJ
Gate-to-Source Voltage
± 30
Peak Diode Recovery dv/dt
Operating Junction and
13
V/ns
-55 to + 150
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case )
300
10
°C
Mounting Torque, 6-32 or M3 screw
lbft.in(N.m)
Diode Characteristics
Symbol
Parameter
Min. Typ. Max. Units
Conditions
D
IS
Continuous Source Current
(Body Diode)
16
MOSFET symbol
showing the
––– –––
––– –––
A
G
ISM
Pulsed Source Current
(Body Diode)
64
integral reverse
p-n junction diode.
S
VSD
trr
Diode Forward Voltage
––– ––– 1.5
––– 170 250
––– 220 330
––– 470 710
––– 810 1210
V
TJ = 25°C, IS = 16A, VGS = 0V
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
IF = 16A
di/dt = 100A/µs
ns
Reverse Recovery Time
Reverse Recovery Charge
Qrr
nC
A
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
––– 7.3
11
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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1
09/20/01
IRFP17N50L
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
500 ––– –––
0.6 ––– V/°C Reference to 25°C, ID = 1mA
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient –––
RDS(on)
VGS(th)
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
––– 0.28 0.32
3.0 ––– 5.0
Ω
V
VGS = 10V, ID = 9.9A
VDS = VGS, ID = 250µA
––– ––– 50
––– ––– 2.0
––– ––– 100
––– ––– -100
µA
VDS = 500V, VGS = 0V
IDSS
IGSS
Drain-to-Source Leakage Current
mA VDS = 400V, VGS = 0V, TJ = 125°C
GS = 30V
VGS = -30V
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
V
nA
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
Conditions
gfs
11 ––– –––
S
VDS = 50V, ID = 9.9A
ID = 16A
Qg
––– ––– 130
––– ––– 33
––– ––– 59
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = 400V
VGS = 10V
VDD = 250V
–––
–––
–––
–––
21 –––
51 –––
50 –––
28 –––
ID = 16A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
RG = 7.5Ω
VGS = 10V
VGS = 0V
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Input Capacitance
––– 2760 –––
––– 325 –––
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
VDS = 25V
–––
––– 3690 –––
––– 84 –––
––– 159 –––
37 –––
pF
ƒ = 1.0MHz
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 400V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 400V ꢀ
Avalanche Characteristics
Symbol
EAS
Parameter
Single Pulse Avalanche Energy
Avalanche Current
Typ.
–––
–––
–––
Max.
390
16
Units
mJ
IAR
A
EAR
Repetitive Avalanche Energy
22
mJ
Thermal Resistance
Symbol
Parameter
Junction-to-Case
Typ.
–––
Max.
0.56
–––
62
Units
RθJC
RθCS
RθJA
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
0.50
–––
°C/W
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature.
Starting TJ = 25°C, L = 3.0mH, RG = 25Ω,
IAS = 16A.
ISD ≤ 16A, di/dt ≤ 347A/µs, VDD ≤ V(BR)DSS
TJ ≤ 150°C
,
2
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IRFP17N50L
100
10
100
10
1
VGS
15V
12V
VGS
15V
12V
TOP
TOP
10V
10V
8.0V
7.0V
6.0V
5.5V
8.0V
7.0V
6.0V
5.5V
BOTTOM 5.0V
BOTTOM 5.0V
5.0V
1
5.0V
0.1
0.01
20µs PULSE WIDTH
Tj = 150°C
20µs PULSE WIDTH
Tj = 25°C
0.1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
3.0
16A
=
I
D
°
T = 150 C
J
2.5
2.0
1.5
1.0
0.5
0.0
10
°
T = 25 C
J
1
V
= 50V
DS
20µs PULSE WIDTH
V
=10V
GS
0.1
4.0
5.0
V
6.0
7.0
8.0 9.0 10.0
-60 -40 -20
0
20 40 60 80 100 120 140 160
°
, Gate-to-Source Voltage (V)
T , Junction Temperature ( C)
J
GS
Fig 4. Normalized On-Resistance
Fig 3. Typical Transfer Characteristics
Vs. Temperature
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3
IRFP17N50L
20
16
12
8
100000
I
D
=
16A
V
= 0V,
f = 1 MHZ
, C SHORTED
gd ds
GS
V
V
V
= 400V
= 250V
= 100V
C
= C + C
DS
DS
DS
iss
gs
C
= C
gd
rss
C
= C + C
oss
ds gd
10000
1000
100
Ciss
Coss
Crss
4
10
0
0
30
60
90
120
150
1
10
100
1000
Q
, Total Gate Charge (nC)
G
V
, Drain-to-Source Voltage (V)
DS
Fig 5. Typical Capacitance Vs.
Fig 6. Typical Gate Charge Vs.
Drain-to-Source Voltage
Gate-to-Source Voltage
1000
100
10
100
10
1
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
°
T = 150 C
J
10us
100us
°
T = 25 C
J
1ms
1
10ms
°
T = 25 C
C
°
T = 150 C
Single Pulse
J
V
= 0 V
GS
0.1
0.1
0.2
10
100
1000
10000
0.6
0.9
1.3
1.6
V
, Drain-to-Source Voltage (V)
V
,Source-to-Drain Voltage (V)
DS
SD
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
Forward Voltage
4
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IRFP17N50L
RD
20
16
12
8
VDS
VGS
10V
D.U.T.
RG
+VDD
-
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
4
V
DS
90%
0
25
50
T
75
100
125
°
150
, Case Temperature ( C)
C
10%
V
GS
t
t
r
t
t
f
Fig 9. Maximum Drain Current Vs.
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
1
D = 0.50
0.20
0.1
0.10
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
P
2
DM
0.01
t
1
t
2
Notes:
1. Duty factor D =t / t
1
2. Peak T =P
x Z
+ T
thJC C
J
DM
0.001
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFP17N50L
800
640
480
320
160
0
I
D
TOP
7A
10A
BOTTOM 16A
1 5V
DRIVER
L
V
G
DS
D.U.T
AS
R
+
V
D D
-
I
A
20V
0.01
t
Ω
p
Fig 12c. Unclamped Inductive Test Circuit
25
50
75
100
125
150
°
Starting T , Junction Temperature ( C)
J
Fig 12a. Maximum Avalanche Energy
V
(BR)DSS
Vs. Drain Current
t
p
I
AS
Fig 12d. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
Q
G
50KΩ
.2µF
12V
VGS
.3µF
Q
Q
GD
GS
+
V
DS
D.U.T.
-
V
V
GS
G
3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 13b. Basic Gate Charge Waveform
Fig 13a. Gate Charge Test Circuit
6
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IRFP17N50L
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
-
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
Period
Period
D =
P.W.
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
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7
IRFP17N50L
TO - 247 Package Outline
Dimensions are shown in millimeters (inches)
- D -
3.65 (.143)
3.55 (.140)
5.30 (.209)
4.70 (.185)
15.90 (.626)
15.30 (.602)
0.25 (.010)
D
M
B
M
2.50 (.089)
- B -
- A -
1.50 (.059)
5.50 (.217)
4
20.30 (.800)
19.70 (.775)
NOTES:
5.50 (.217)
4.50 (.177)
2X
1
DIMENSIONING & TOLERANCING
PER ANSI Y14.5M, 1982.
CONTROLLING DIMENSION : INCH.
CONFORMS TO JEDEC OUTLINE
TO-247-AC.
1
2
3
2
3
- C -
14.80 (.583)
14.20 (.559)
4.30 (.170)
3.70 (.145)
LEAD ASSIGNMENTS
2.40 (.094)
2.00 (.079)
0.80 (.031)
0.40 (.016)
1.40 (.056)
1.00 (.039)
3X
3X
1 - GATE
2 - DRAIN
3 - SOURCE
4 - DRAIN
2X
2.60 (.102)
2.20 (.087)
0.25 (.010)
C
A
S
M
5.45 (.215)
3.40 (.133)
3.00 (.118)
2X
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.09/01
8
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