TLE6284GXT [INFINEON]

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TLE6284GXT
型号: TLE6284GXT
厂家: Infineon    Infineon
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外围驱动器 驱动程序和接口 接口集成电路 光电二极管
文件: 总17页 (文件大小:298K)
中文:  中文翻译
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Data Sheet TLE6284G  
H-Bridge Driver IC  
Features  
Product Summary  
Turn on current  
Compatible to very low ohmic normal  
level input N-Channel MOSFETs  
PWM – DIR - Interface  
IGxx(on)  
IGxx(off)  
VVs  
850  
580  
mA  
mA  
V
Turn off current  
Supply voltage range  
Gate Voltage  
7.5 … 60  
10  
PWM frequency up to 50kHz  
Operates down to 7.5 V  
VGS  
V
Temperature range  
TJ  
-40...+150  
°C  
supply voltage  
Low EMC sensitivity and emission  
Adjustable dead time with shoot through protection  
Deactivation of dead time and shoot through protection possible  
Short circuit protection for each Mosfet can be disabled and adjusted  
Driver undervoltage shut down  
Reverse polarity protection for the driver IC  
Fast disable function / Inhibit for low quiescent current  
Input with TTL characteristics  
2 bit diagnosis  
Thermal overload warning for driver IC  
Shoot through protection  
PG-DSO-20  
Integrated bootstrap diodes  
Marking  
TLE6284G  
Green Product (RoHS compliant)  
AEC Qualified  
Application  
Dedicated for DC-brush high current motor bridges in PWM control mode for 12, 24 and 42V powernet applica-  
tions.  
The input structure allows an easy control of a DC-brush motor  
General Description  
H-bridge driver IC for MOSFET power stages with multiple protection functions. The TLE6184G is very similar to  
the TLE6281G. The major difference is that the Short Circuit protection level of the TLE6284G can be adjusted  
by external resistors or even disabled. The pin outs are different as well.  
Block Diagram  
Charge Pump  
Linear  
BH1  
BH2  
Regulator  
VS  
GND  
Floating HS Driver 1  
+
DH1  
GH1  
VGS limitation HS1  
INH  
INH  
+
Short circuit  
SCD  
detect.  
+
SH1  
Undervoltage  
HS1  
LS1  
HS2  
LS2  
Floating HS Driver 2  
+
PWM  
DIR  
Input control  
Dead time  
DH2  
GH2  
V
GS limitation HS2  
+
Level  
Shift  
Short circuit  
SCD  
detect.  
+
SH2  
Undervoltage  
DT/DIS  
Floating LS Driver 1  
+
DL1  
GL1  
V
GS limitation LS1  
+
Undervoltage HSx  
Undervoltage LSx  
Undervoltage  
OR  
ER1  
ER2  
Short circuit  
SCD  
detect.  
+
Short circuit Detect.  
Overtemp. warning  
Short Circuit Detection  
Undervoltage  
Floating LS Driver 2  
+
DL2  
GL2  
Tj > 170oC typ.  
V
GS limitation LS2  
+
Short circuit  
SCD  
detect.  
+
Undervoltage  
Data Sheet  
1
Rev 2.4 2008-03-18  
Data Sheet TLE6284G  
Application Block Diagram  
Watchdog  
TLE  
Reset  
Q
I
Vs = 12V  
4278G  
R
D
CQ  
47µF  
CD  
47nF  
Cs  
47µF  
10Ω  
Cs  
1µF  
RQ  
47kΩ  
RQ  
47kΩ  
CB  
BH1  
WD  
R
Vcc  
Vs  
220nF  
RSCDH1  
ER1  
DH1  
GH1  
ER2  
INH  
SH1  
BH2  
RSCDH2  
CB  
68kΩ  
BCR192W  
RSCDH3  
220nF  
DH2  
GH2  
SH2  
DT / DIS  
µC  
RSCDH4  
RINH  
RDT  
10kΩ  
220kΩ  
TLE6284G  
M
RSCDL1  
PWM  
DL1  
GL1  
RSCDL3  
DIR  
DL2  
GL2  
RSCDL4  
RSCDL2  
GND  
This application block diagram shows one of the possibilities to use this Driver IC. The volt-  
age divider networks accross the 4 MOSFETs (resistors RSCDxx) allow to increase the current  
limit threshold for Short Circuit protection. The RSCDLx resistors also provide a charge path for  
the bootstrap capacitors. If RSCDLx resistors are not used in the application, a 12k Ohm resis-  
tor should be introduced between SH1 to GND and SH2 to GND.  
Data Sheet  
2
Rev 2.4 2008-03-18  
Data Sheet TLE6284G  
DT/DIS  
ER1  
DIR  
1
2
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
GL2  
SH2  
GH2  
BH2  
DH2  
DH1  
BH1  
GH1  
SH1  
GL1  
3
PWM  
DL2  
ER2  
GND  
VS  
4
5
TLE6284G  
6
7
8
DL1  
INH  
9
10
Pin  
Symbol  
Function  
1
DT / DIS  
a) Set adjustable dead time by external resistor  
b) Reset ERx register  
c) Disable output stages  
2
3
4
5
6
ER1  
DIR  
PWM  
DL2  
Error flag for driver shut down  
Control input for spinning direction of the motor  
Control input for PWM frequency and duty cycle  
Sense contact for short circuit detection low side 2  
Warning flag Temperature / distinguish if short cir-  
cuit or undervoltage lock out occured  
ER2  
7
8
GND  
VS  
Logic Ground  
Voltage supply  
9
10  
DL1  
INH  
Sense contact for short circuit detection low side 1  
Sets complete device to sleep mode to achieve low  
quiescent currents  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
GL1  
SH1  
GH1  
BH1  
DH1  
DH2  
BH2  
GH2  
SH2  
GL2  
Output to gate low side switch 1  
Connection to source high side switch 1  
Output to gate high side switch 1  
Bootstrap supply high side switch 1  
Sense contact for short circuit detection high side 1  
Sense contact for short circuit detection high side 2  
Bootstrap supply high side switch 2  
Output to gate high side switch 2  
Connection to source high side switch 2  
Output to gate low side switch 2  
Data Sheet  
3
Rev 2.4 2008-03-18  
Data Sheet TLE6284G  
Maximum Ratings at Tj=-40…+150°C unless specified otherwise  
Parameter  
Symbol  
Limits Values Unit  
min  
-4  
max  
60  
Supply voltage 1  
Operating temperature range  
Storage temperature range  
VS  
Tj  
Tstg  
V
-40  
150  
°C  
-55  
150  
Max. voltage range at PWM, DIR, DT/DIS  
Max. voltage range at ERx  
Max. voltage range at INH  
-1  
-0.3  
-0.6  
-0.3  
-4  
6
6
V
V
V
V
V
V
V
V
V
V
V
W
W
kV  
VINH  
60  
90  
75  
86  
75  
12  
75  
17  
11  
0.33  
0.85  
2
Max. voltage range at BHx  
VBHx  
Max. voltage range at DHx2  
VDHx  
VGHx  
Max. voltage range at GHx3  
-7  
-7  
-2  
-7  
Max. voltage range at SHx3  
VSHx  
VGLx  
VDLx  
VBHx-VSHx  
VGxx-VSxx  
Ptot  
Ptot  
VESD  
Max. voltage range at GLx  
Max. voltage range at DLx  
Max. voltage difference BHx – SHx  
Max. voltage difference Gxx – Sxx  
Power dissipation (DC) @ TA=125°C / min.footprint  
Power dissipation (DC) @ TA=85°C / min.footprint  
Electrostatic discharge voltage (Human Body Model)  
-0.3  
-0.3  
--  
--  
--  
4
according to MIL STD 883D, method 3015.7 and  
EOS/ESD assn. standard S5.1 – 1993  
Thermal resistance junction - ambient (minimal foot-  
print with thermal vias)  
RthJA  
RthJA  
--  
--  
75  
75  
K/W  
K/W  
Thermal resistance junction - ambient (6 cm2)  
Functional range  
Parameter and Conditions  
Symbol  
Values  
min max  
60  
Unit  
at Tj = –40…+150 °C, unless otherwise specified  
Supply voltage  
VS  
Tj  
7.5  
-40  
-0.3  
-0.3  
-0.6  
-0.3  
-4  
V
°C  
V
V
V
V
V
V
V
Operating temperature range  
Max. voltage range at PWM, DIR, DT/DIS  
Max. voltage range at ERx  
Max. voltage range at INH  
Max. voltage range at BHx  
Max. voltage range at DHx2  
Max. voltage range at GHx3  
Max. voltage range at SHx3  
150  
5.5  
5.5  
60  
VINH  
VBHx  
VDHx  
VGHx  
VSHx  
90  
75  
86  
-7  
-7  
75  
1 With external resistor (10 ) and capacitor  
2 The min value -4V is reduced to –( VBHx - VSHx) in case of bootstrap voltages VBHx-VSHx <4V  
3 The min value -7V is reduced to –(VBHx - VSHx - 1V) in case of bootstrap voltages VBHx-VSHx <8V  
4 All test involving Gxx pins VESD=1 kV!  
Data Sheet  
4
Rev 2.4 2008-03-18  
Data Sheet TLE6284G  
Max. voltage range at DLx3  
Max. voltage range at GLx  
Max. voltage difference BHx - SHx  
Max. voltage difference GHx – SHx  
PWM frequency  
VDLx  
-7  
-2  
75  
12  
12  
11  
50  
2
V
V
V
VGLx  
VBHx-VSHx  
VGxx-VSxx  
FPWM  
-0.3  
-0.3  
0
V
kHz  
µs  
Minimum on time external lowside switch – static con-  
tp(min)  
--  
dition @ 20 kHz; QGate = 200nC  
Electrical Characteristics  
Parameter and Conditions  
Symbol  
Values  
Unit  
at Tj = -40…150°C, unless otherwise specified  
min  
typ  
max  
and supply voltage range VS = 7.5 … 60V; fPWM = 20kHz  
Static Characteristics  
Low level output voltage (VGSxx) @ I=10mA  
VLL  
VHL  
--  
8
60  
10  
150 mV  
High level output voltage (VGSxx) @ I=-10mA;  
11  
V
Vs11.5V  
High level output voltage (VGSxx) @ I=-10mA;  
VHL  
-- Vs-1.5  
--  
V
Vs<11.5V  
Supply current at VS (device disabled)  
@ Vbat= VS =42V RDT=400kΩ  
IVS(dis)42V  
--  
--  
4
8
mA  
Quiescent current at VS (device inhibited)  
@ Vbat= VS =14V RDT=400kΩ  
IVS(inh)14V  
0.6  
1.5 mA  
RSCDL1+RSCDL2 = RSCDL3+RSCDL4 =12kΩ  
Quiescent current at VS (device inhibited)  
@ Vbat= VS =42V RDT=400kΩ  
IVS(inh)42V  
--  
0.6  
1.5 mA  
RSCDL1+RSCDL2 = RSCDL3+RSCDL4 =12kΩ  
Supply current at VS @ Vbat= VS =14V,  
IVS(open)14V  
IVS(open)14V  
IVS(open)42V  
--  
--  
--  
7
7
7
15 mA  
15 mA  
15 mA  
fPWM = 20kHz (Outputs open)  
Supply current at VS @ Vbat= VS =14V,  
fPWM = 50kHz (Outputs open)  
Supply current at VS @ Vbat= VS =42V,  
fPWM = 20kHz (Outputs open)  
Low level input voltage  
High level input voltage  
Input hysteresis  
VIN(LL)  
VIN(HL)  
VIN  
--  
2.0  
100  
1.3  
--  
--  
170  
2
1.0  
--  
V
V
-- mV  
Inhibit trip level  
VINH  
3
V
Data Sheet  
5
Rev 2.4 2008-03-18  
Data Sheet TLE6284G  
Dynamic characteristics (pls. see test circuit and timing diagram)  
Turn on current @ VGxx –VSxx = 0V; Tj=25°C  
@ VGxx –VSxx = 4V; Tj=125°C  
@ CLoad=22nF ; Rload= 0Ω  
Turn off current @ VGxx –VSxx = 10V; Tj=25°C  
@ VGxx –VSxx = 4V; Tj=125°C  
@ CLoad= 22nF ; Rload=0Ω  
Dead time (adjustable) @ RDT = 1 kΩ  
@ RDT = 10 kΩ  
IGxx(on)  
IGxx(off)  
tDT  
--  
--  
850  
700  
-- mA  
--  
--  
--  
580  
300  
-- mA  
--  
--  
0.05  
0.40  
--  
0.01  
--  
µs  
0.20 0.38  
1.0 2.50  
@ RDT = 50 kΩ  
3.1  
--  
@ RDT = 200 kΩ  
@ CLoad=10nF ; Rload=1Ω  
Rise time @ CLoad=10nF ; Rload=1(20% to  
t rise  
tfall  
--  
--  
100  
150  
5
300  
440  
7
ns  
ns  
µs  
80%)  
Fall time @ CLoad=10nF ; Rload=1(80% to  
20%)  
Disable propagation time  
@ CLoad=10nF ; Rload=1Ω  
tP(DIS)  
3.6  
Reset time of diagnosis  
tP(CL)  
tP(ILN)  
tP(ILF)  
tP(IHN)  
tP(IHF)  
tP(Diff)  
tP(Diff)  
tP(Diff)  
tP(Diff)  
tP(Diff)  
tP(Diff)  
1
--  
2
250  
110  
200  
130  
50  
3.1  
500  
500  
500  
500  
70  
µs  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
@ CLoad=10nF ; Rload=1Ω  
Input propagation time  
(low side turns on, 0% to 10%)  
Input propagation time  
(low side turns off, 100% to 90%)  
Input propagation time  
(high side turns on, 0% to 10%)  
Input propagation time  
(high side turns off, 100% to 90%)  
Input propagation time difference  
(all channels turn on)  
Input propagation time difference  
(all channels turn off)  
Input propagation time difference  
(one channel; low on – high off)  
Input propagation time difference  
(one channel; high on – low off)  
Input propagation time difference  
(all channels; low on – high off)  
Input propagation time difference  
(all channels; high on – low off)  
--  
--  
--  
20  
--  
25  
50  
--  
120  
100  
120  
100  
180  
180  
180  
180  
--  
--  
--  
Data Sheet  
6
Rev 2.4 2008-03-18  
Data Sheet TLE6284G  
Test Circuit and Timing Diagram  
PWM  
x2  
GHx  
PWM  
Rload = 1 Ohm  
50%  
VGHX_C  
Cload = 10 nF  
SHx  
GLx  
t
tP(IHN) trise  
tP(IHF) tfall  
Rload = 1 Ohm  
VGHX_C  
90%  
80%  
VGLX_C  
C
load = 10 nF  
SLx  
20%  
10%  
t
tP(ILF) tfall  
tP(ILN) trise  
VGLX_C  
90%  
80%  
Test Conditions :  
Junction temperature Tj = -40 … 150oC  
Supply voltage range Vs = 7.5 … 60V  
PWM frequency fPWM = 20 kHz  
20%  
10%  
t
Diagnosis and Protection Functions  
Parameter and Conditions  
Symbol  
Values  
Unit  
at Tj = -40…150°C, unless otherwise specified  
min  
typ  
max  
and supply voltage range VS = 7.5 … 60V; fPWM = 20kHz  
Overtemperature warning  
Hysteresis for overtemperature warning  
Short circuit protection filter time  
Short circuit criteria (VDS of Mosfets)  
For Low sides  
TJ(OV)  
150  
--  
170  
20  
9
190  
--  
12  
°C  
°C  
µs  
TJ(OV)  
tSCP(off)  
VDS(SCP)  
6
0.5 0.75  
0.45 0.75 1.05  
1.0  
V
For High sides  
Disable input level  
Disable input hysteresis  
Error level @ 1.6mA IERx  
VDIS  
VDIS  
VERx  
3.3  
--  
--  
3.7  
180  
--  
4.0  
--  
1.0  
4.6  
V
mV  
V
Under voltage lock out for highside output – boot- VBHx (uvlo)  
--  
3.7  
V
strap voltage  
Under voltage lock out for lowside output –  
supply voltage  
VVs (uvlo)  
--  
4.8  
5.9  
V
Data Sheet  
7
Rev 2.4 2008-03-18  
Data Sheet TLE6284G  
Remarks:  
Default status of input pins:  
To assure a defined status of the logic input pins in case of disconnection, these pins are  
internally secured by pull up / pull down current sources with approx. 20µA. The high voltage  
proof input INH should be secured by an external pull down resistor close to the device. The  
following table shows the default status of the logic input pins.  
Input pin  
PWM and DIR  
Default status  
Low (= break in high side)  
DT/DIS (active high)  
High  
Definition:  
In this datasheet a duty cycle of 98% means that the GLx pin is 2% of the PWM period in  
high condition.  
Remark: Please consider the influence of the dead time and the propagation time differ-  
ences for the input duty cycle  
Functional description  
Description of Dead Time Pin / Disable Pin / Reset  
This pin allows to adjust the internal generated dead time. The dead time protects the exter-  
nal highside and lowside Mosfets in the same halfbridge against a lowohmic connection be-  
tween battery and GND and the resulting cross current through these Mosfets. The adjust-  
able dead time allows to minimize the power dissipation caused by the current flowing  
through the body diode during switching the halfbridge.  
In addition this pin allows to reset the diagnosis registers without shut down of any output  
stage as well as the possibility to shut down all outputs simultaneously.  
Condition of DT/DIS pin  
Function  
0 - 3.5V  
> 4V  
Adjust dead time between 10ns and 3.1µs  
a) Reset of diagnosis register if DT/DIS voltage is higher than  
4V for a time between 3.1µs and 3.6µs  
b) Shut down of output stages if DT/DIS voltage is higher  
than 4V for a time above 7µs (Active pull down of gate volt-  
age)  
Description of Inhibit functionality  
In automotive applications which are permanently connected to the battery line, it is very im-  
portant to reduce the current consumption of the single devices. Therefore the TLE6284G  
offers an inhibit mode to put the device to sleep and assure very low quiescent currents. To  
deactivate the inhibit mode the INH pin has to be set to high. This can be done by connect-  
ing this pin to voltages between 3.3 and 60V without external protection. An inhibit mode  
means a complete reinitialisation of the device.  
Description of Diagnosis  
The two ERx pins are open collector outputs and have to be pulled up with external pull up  
resistors to 5V. In normal conditions both ERx signals are high. In case of shutdown of any  
Data Sheet  
8
Rev 2.4 2008-03-18  
Data Sheet TLE6284G  
output stage the ER1 is pulled down. This shut down can be caused by undervoltage or  
short circuit. In this condition ER2 indicates the reason for the shut down.  
Condition of  
Condition of  
Function  
ER1 pin  
5V  
ER2 pin  
5V  
no errors  
5V  
0V  
overtemperature warning of driver IC  
Shut down of any output stage caused by short circuit  
0V  
5V  
0V  
0V  
Shut down of any output stage caused by undervoltage  
Recommended Start-up procedure  
The following procedure is recommended whenever the Driver IC is powered up:  
Disable the Driver IC via DT/DIS pin  
Wait until the bootstrap capacitors of High Side MOSFET CBx are charged (the waiting  
time depends on application conditions, e.g. CBx and RBx)  
Enable the Driver IC via DT/DIS pin  
Start the operation by applying the desired pulse patterns. Do not apply any pulse pat-  
terns to the PWM or DIR pin, before the CBx capacitors are charged up.  
Short Circuit protection  
The current threshold limit to activate the Short Circuit protection function can be adjusted to  
larger values, it can not be adjusted to lower values. This can be done by external resistors  
to form voltage dividers across the “sense element” (pls. see Application block diagram on  
pg. 2), consisting of the Drain-Source-Terminals, a fraction of the PCB trace and – in some  
cases – current sense resistors (used by the µC not by the Driver IC).  
The Short Circuit protection can be disabled for the High Side MOSFETs by shorting DH1  
with SH1 and DH2 with SH2 on the PCB; in this case the DHx pins may not be connected to  
the Drains of the associated MOSFETs. To disable Short Circuit protection for the Low Side  
MOSFETs the DL1 and DL2 pin should be connected to the Driver IC´s Ground.  
Shut down of the driver  
A shut down can be caused by undervoltage or short circuit.  
A short circuit will shut down only the affected Mosfet until a reset of the error register by a  
disable of the driver occurs. A shut down due to short circuit will occur only when the Short  
Circuit criteria VDS(SCP) is met for a duration equal to or longer than the Short Circuit filter time  
tSCP(off). Yet, the exposure to or above VDS(SCP) is not counted or accumulated. Hence, repeti-  
tive Short Circuit conditions shorter than tscp(off) will not result in a shut down of the affected  
MOSFET.  
An undervoltage shut down shuts only the affected output down. The affected output will  
auto restart after the undervoltage situation is over.  
Operation at Vs<12V  
If Vs<11.5V the gate voltage will not reach 10V. It will reach approx Vs-1.5V, dependent on  
duty cyle, bootstrap capacitor, total gate charge of the external Mosfet and switching fre-  
quency.  
Data Sheet  
9
Rev 2.4 2008-03-18  
Data Sheet TLE6284G  
Operation at different voltages for Vs, DH1 and DH2  
If DH1 and DH2 are used with a voltage higher than Vs, a duty cycle of 100% can not be  
guaranteed. In this case the driver is acting like a normal driver IC based on the bootstrap  
principle. This means that after a maximum “On” time of the highside switch of more than  
1ms a refresh pulse to charge the bootstrap capacitor of about 1µs is needed to avoid un-  
dervoltage lock out of this output stage.  
Operation at extreme duty cycle:  
The integrated charge pump allows an operation at 100% duty cycle. The charge pump is  
strong enough to replace leakage currents during “on”-phase of the highside switch. The  
gate charge for fast switching of the highside switches is supplied by the bootstrap capaci-  
tors. This means, that the bootstrap capacitor needs a minimum charging time of about 1µs,  
if the highside switch is operated in PWM mode (e.g. with 20kHz a maximum duty cycle of  
96% can be reached). The exact value for the upper limit is given by the RC time formed by  
the impedance of the internal bootstrap diode and the capacitor formed by the external Mos-  
fet (CMosfet=QGate / VGS). The size of the bootstrap capacitor has to be adapted to the external  
MOSFET the driver IC has to drive. Usually the bootstrap capacitor is about 10-20 times big-  
ger than CMosfet. External components at the Vs Pin have to be considered, too.  
The charge pump is active when the highside switch is “ON” and the voltage level at the SHx  
is higher than 4V. Only under these conditions the bootstrap capacitor is charged by the  
charge pump.  
Data Sheet  
10  
Rev 2.4 2008-03-18  
Data Sheet TLE6284G  
Estimation of power loss within the Driver IC  
The power loss within the Driver IC is strongly dependent on the use of the driver and the  
external components. Nevertheless a rough estimation of the worst case power loss is pos-  
sible. Worst case calculation is:  
PLoss = (Qgate*n*const* fPWM + IVS(open))* VVs - PRGate  
With:  
PLoss = Power loss within the Driver IC  
fPWM = Switching freqency  
Qgate = Total gate charge of used MOSFETs at 10V VGS  
n
= Number of switched MOSFETs  
const = Constant considering some leakage current in the driver (about 1.2)  
IVS(open) = Current consumption of driver without connected Mosfets during switching  
VVS = Voltage at Vs  
PRGate = Power dissipation in the external gate resistors  
This value can be reduced dramatically by usage of external gate resistors.  
Estimated Power Loss PLOSS within the Driver IC  
for different supply voltages Vs  
Estimated Power Loss PLOSS within the Driver IC  
for different gate charges QG  
at QG = 100nC @ VGS = 10V  
at supply voltage Vs = 14V  
0,8  
0,7  
0,6  
0,5  
0,4  
0,3  
0,2  
0,1  
0
0,8  
0,7  
0,6  
0,5  
0,4  
0,3  
0,2  
0,1  
0
QG = 50nC  
QG = 100nC  
QG = 200nC  
Vs = 8V  
Vs = 14V  
Vs = 18V  
0
10  
20  
30  
40  
50  
60  
0
10  
20  
30  
40  
50  
60  
PWM Frequency (kHz)  
PWM Frequency (kHz)  
Conditions :  
Junction temperature Tj = 25oC  
Number of switched MOSFET n = 2  
Power dissipation in the external gate resistors PRGate = 0,2*PLoss  
Data Sheet  
11  
Rev 2.4 2008-03-18  
Data Sheet TLE6284G  
Gate Drive characteristics  
VPWM_HS  
iGxx(on)  
iGxx(off)  
iGHx  
BHx  
Vs  
Logic  
+
850 mA Peak  
Level  
DHx  
GHx  
SCD  
Shift  
+
CB  
iGxx(on)  
VGS  
limit  
+
iGxx(off)  
iGHx  
VPWM_HS  
580 mA Peak  
Under  
voltage  
Motor  
SHx  
TLE6284G  
High Side Driver  
Test Conditions :  
- Turn On : VGS = 0V, Tj = 25oC  
- Turn Off : VGS = 10V, Tj = 25oC  
This figure represents the simplified internal  
circuit of one high side gate drive. The drive  
circuit of the low sides look similar.  
This figure illustrates typical voltage and  
current waveforms of the high side gate drive;  
the associated waveforms of the low side  
drives look similar.  
Data Sheet  
12  
Rev 2.4 2008-03-18  
Data Sheet TLE6284G  
Truth Table  
Input  
DIR PWM DT / DIS UV OT SC GH GL GH GL ER ER  
Conditions  
Output driver IC  
Output  
Bridge  
Out1 Out2  
1
1
2
2
1
2
0
0
1
1
<3.5V  
<3.5V  
<3.5V  
<3.5V  
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
0
1
0
0
1
1
1
1
0
0
0
1
0
1
0
5V 5V  
5V 5V  
5V 5V  
5V 5V  
1
0
1
1
1
0 A  
1 A  
1 A  
1 A  
1
0
1
1 A  
1 A  
0 A  
1 A  
0
0
1
1
<3.5V  
<3.5V  
<3.5V  
<3.5V  
1
1
1
1
0
0
0
0
0
0
0
0
B
B
0
0
0
B
0
0
B
0
0
0
1
0
1
0
C
C
C
C
D
D
D
D
B
B
B
B
0
0
1
1
<3.5V  
<3.5V  
<3.5V  
<3.5V  
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
1
0
0
1
0
0
1
1
1
1
0
0
0
1
0
1
0
5V 0V  
5V 0V  
5V 0V  
5V 0V  
1
1
0
1
1 A  
1 A  
0 A  
1 A  
0
1
1
1
0 A  
1 A  
1 A  
1 A  
0
0
1
1
<3.5V  
<3.5V  
<3.5V  
<3.5V  
0
0
0
0
0
0
0
0
1
1
1
1
E
E
0
0
0
E
0
0
E
0
0
0
1
0
1
0
F
F
F
F
5V  
5V  
5V  
5V  
E
E
E
E
X
X
X
>4V  
X
X
X
X
X
X
0
0
0
0
0
0
0
0
X
X
5V 5V  
5V 5V  
T
T
T
T
A) Tristate when affected by undervoltage shut down or short circuit  
B) 0 when affected; 1 when not affected; self recovery  
C) 0V when output does not correspond to input patterns; 5V when output corresponds to  
input patterns  
D) Is an output affected by undervoltage ER2 is 0V  
E) 0 when affected– the outputs of the affected halfbridge are shut down and stay latched  
until reset; 1 when not affected  
F) 0V when output does not correspond to input patterns – the outputs of the affected half-  
bridge are shut down and stay latched until reset; 5V when output corresponds to input  
patterns.  
T) Tristate  
X) Condition has no influence  
Remark: To generate fast decay control mode, set PWM to 1 and send pwm-pattern to DIR  
input.  
Data Sheet  
13  
Rev 2.4 2008-03-18  
Data Sheet TLE6284G  
Data Sheet  
14  
Rev 2.4 2008-03-18  
Data Sheet TLE6284G  
Package Outlines  
(all dimensions in mm)5  
Package  
PG-DSO-20-45  
Green Product (RoHS compliant)  
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with  
government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e  
Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).  
5 More information about packages can be found at our internet page http://www.infineon.com/packages  
Data Sheet  
15  
Rev 2.4 2008-03-18  
Data Sheet TLE6284G  
TLE6284G  
Revision History:  
2008-03-18  
Rev. 2.4  
Previous Version: 2.3  
Green Revision derived from TLE6282G  
Page  
1
Subjects (major changes since last revision)  
AEC Qualified and RoHS compliant logos and features added.  
Package picture updated.  
Marking code added.  
23  
25  
Package outline updated.  
Paragraph RoHS complaint added.  
Legal disclaimer updated.  
Data Sheet  
16  
Rev 2.4 2008-03-18  
Data Sheet TLE6284G  
Edition 2008-03-18  
Published by  
Infineon Technologies AG  
81726 Munich, Germany  
© 4/1/08 Infineon Technologies AG  
All Rights Reserved.  
Legal Disclaimer  
The information given in this document shall in no event be regarded as a guarantee of conditions or character-  
istics. With respect to any examples or hints given herein, any typical values stated herein and/or any information  
regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabili-  
ties of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any  
third party.  
Information  
For further information on technology, delivery terms and conditions and prices, please contact the nearest In-  
fineon Technologies Office (www.infineon.com).  
Warnings  
Due to technical requirements, components may contain dangerous substances. For information on the types in  
question, please contact the nearest Infineon Technologies Office.  
Infineon Technologies components may be used in life-support devices or systems only with the express written  
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the fail-  
ure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life  
support devices or systems are intended to be implanted in the human body or to support and/or maintain and  
sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other per-  
sons may be endangered.  
Data Sheet  
17  
Rev 2.4 2008-03-18  

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