FDB86363-F085 [ONSEMI]
N 沟道，PowerTrench® MOSFET，80V，110A，2.4mΩ;
| 型号： | FDB86363-F085 |
| 厂家： | 
ONSEMI |
| 描述： | N 沟道，PowerTrench® MOSFET，80V，110A，2.4mΩ 开关 晶体管 |
| 文件： | 总8页 (文件大小：273K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MOSFET - POWERTRENCH),
N-Channel
80 V, 110 A, 2.4 mW
FDB86363-F085
Features
• Typical R
• Typical Q
= 2.0 mW at V = 10 V, I = 80 A
GS D
DS(on)
www.onsemi.com
N−Channel
= 131 nC at V = 10 V, I = 80 A
g(tot)
GS
D
• UIS Capability
• AEC−Q101 Qualified and PPAP Capable
• This Device is Pb−Free, Halide Free and is RoHS Compliant
(Pin 2)
D
Applications
• Automotive Engine Control
• Power Train Management
• Solenoid and Motor Drivers
• Integrated Starter/Alternator
• Primary Switch for 12 V Systems
G
(Pin 1)
S
(Pin 3)
D 2
2
1
G
S
3
2
D PAK−3 (TO−263, 3−LEAD)
CASE 418AJ
PIN CONFIGURATION
Position
Designation
Pin 1
Gate
Pin 2 / Tab
Pin 3
Drain
Source
MARKING DIAGRAM
$Y&Z&3&K
FDB86363
$Y
= ON Semiconductor Logo
&Z
&3
&K
= Assembly Plant Code
= Numeric Date Code
= Lot Code
FDB86363
= Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2020
1
Publication Order Number:
January, 2020 − Rev. 4
FDB86363−F085/D
FDB86363−F085
MOSFET MAXIMUM RATINGS (T = 25°C, Unless otherwise noted)
J
Symbol
Parameter
Ratings
Units
V
Drain−to−Source Voltage
Gate−to−Source Voltage
80
V
V
A
DSS
V
20
110
GS
ID
Drain Current
−Continuous (V = 10 V) (Note 1)
T
T
= 25°C
= 25°C
GS
C
−Pulsed
See Figure 4
512
C
E
Single Pulse Avalanche Energy
Power Dissipation
(Note 2)
mJ
W
AS
P
300
D
Derate Above 25°C
2.0
W/°C
°C
TJ, T
Operating and Storage Temperature
Thermal Resistance, Junction to Case
Maximum Thermal Resistance, Junction to Ambient
−55 to +175
0.5
STG
RθJC
RθJA
°C/W
°C/W
(Note 3)
43
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Current is limited by bondwire configuration.
2. Starting T = 25°C, L = 0.25 mH, I = 64 A, V = 80 V during inductor charging and V = 0 V during time in avalanche.
J
AS
DD
DD
3. RθJA is the sum of the junction−to−case and case−to−ambient thermal resistance, where the case thermal reference is defined as the solder
mounting surface of the drain pins. RθJC is guaranteed by design, while R
presented here is based on mounting on a 1 in pad of 2 oz copper.
is determined by the board design. The maximum rating
θ
JA
2
PACKAGE MARKING AND ORDERING INFORMATION
†
Device Marking
Device
Package
Shipping
FDB86363
FDB86363−F085
D2PAK (TO−263)
(Pb−Free/Halide Free)
800 units / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D
www.onsemi.com
2
FDB86363−F085
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
OFF CHARACTERISTICS
B
VDSS
Drain−to−Source Breakdown
Voltage
I
D
= 250 mA, V = 0 V
80
V
GS
I
Drain−to−Source Leakage
Current
V
DS
V
DS
V
GS
= 80 V, V = 0 V, T = 25°C
1
mA
mA
nA
DSS
GS
J
= 80 V, V = 0 V, T = 175°C (Note 4)
1
GS
J
I
Gate−to−Source Leakage
Current
=
20 V
100
GSS
ON CHARACTERISTICS
V
Gate to Source Threshold
Voltage
V
I
= V , I = 250 mA
2.0
3.0
4.0
V
GS(th)
GS
DS
D
R
Drain−to−Source
On−Resistance
= 80 A, V = 10 V, T = 25°C
2.0
3.8
2.4
4.3
mW
DS(on)
D
GS
J
I
D
= 80 A, V = 10 V, T = 175°C (Note 4)
GS J
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= 40 V, V = 0 V, f = 1 MHz
10000
1400
95
pF
pF
pF
W
iss
DS
GS
C
Output Capacitance
oss
C
Reverse Transfer Capacitance
Gate Resistance
rss
R
f = 1 MHz
3.3
g
Q
Total Gate Charge
V
= 0 V to 10 V
= 0 V to 2 V
V
DD
= 64 V, I = 80 A
131
18
150
21
nC
nC
nC
nC
g(TOT)
GS
GS
D
Q
Threshold Gate Charge
Gate−to−Source Gate Charge
Gate−to−Drain “Miller” Charge
V
g(th)
Q
47
gs
Q
24
gd
SWITCHING CHARACTERISTICS
t
Turn−On Time
Turn−On Delay
Rise Time
V
DD
= 40 V, I = 80 A, V = 10V, R = 6 W
GEN
231
135
ns
ns
ns
ns
ns
ns
on
D
GS
t
38
129
64
d(on)
t
r
t
Turn−Off Delay
Fall Time
d(off)
t
f
40
t
Turn−Off Time
off
DRAIN−SOURCE DIODE CHARACTERISTICS
V
SD
Source−to−Drain Diode
Voltage
V
GS
V
GS
= 0 V, I = 80 A
1.25
1.2
V
SD
= 0 V, I = 40 A
SD
t
Reverse−Recovery Time
Reverse−Recovery Charge
I = 80 A, DI /Dt = 100 A/ms, V = 64 V
88
101
157
ns
rr
F
SD
DD
Q
129
nC
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. The maximum value is specified by design at T = 175°C. Product is not tested to this condition in production.
J
www.onsemi.com
3
FDB86363−F085
TYPICAL CHARACTERISTICS
300
250
200
150
100
50
1.2
1.0
0.8
0.6
0.4
0.2
0.0
CURRENT LIMITED
BY PACKAGE
V
GS = 10V
CURRENT LIMITED
BY SILICON
0
25
0
25
50
75 100 125 150 175
50
75
100
125
150
175 200
TC, CASE TEMPERATURE(oC)
TC, CASE TEMPERATURE(oC)
Figure 1. Normalized Power Dissipation vs.
Case Temperature
Figure 2. Maximum Continuous Drain Current
vs. Case Temperature
2
DUTY CYCLE − DESCENDING ORDER
1
D = 0.50
0.20
0.10
P
DM
0.05
0.02
0.01
0.1
t
1
t
2
NOTES:
DUTY FACTOR: D = t /t
1
2
SINGLE PULSE
PEAK T = P x Z
x R
+ T
J
DM
qJA
qJA C
0.01
10−5
10−4
10−3
10−2
10−1
100
101
t, RECTANGULAR PULSE DURATION(s)
Figure 3. Normalized Maximum Transient Thermal Impedance
10000
VGS = 10V
1000
100
10
o
T
= 25 C
C
FOR TEMPERATURES
o
ABOVE 25 C DERATE PEAK
CURRENT AS FOLLOWS:
175 − T
150
C
I = I
2
SINGLE PULSE
1
10−5
10−4
10−3
10−2
10−1
100
101
t, RECTANGULAR PULSE DURATION(s)
Figure 4. Peak Current Capability
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4
FDB86363−F085
TYPICAL CHARACTERISTICS
1000
2000
1000
If R = 0
= (L)(I )/(1.3*RATED BV
t
− V )
DD
AV
AS
DSS
If R 00
t
= (L/R)ln[(I *R)/(1.3*RATED BV
− V ) +1]
DSS DD
AV
AS
100
10
1
100
100us
STARTING T = 25oC
J
OPERATION IN THIS
AREA MAY BE
10
LIMITED BY r
DS(on)
1ms
STARTING TJ = 150oC
SINGLE PULSE
T
10ms
100ms
= MAX RATED
o
J
T
C
= 25 C
1
0.1
0.001 0.01
0.1
1
10
100
1000
1
10
100 200
tAV, TIME IN AVALANCHE (ms)
VDS, DRAIN TO SOURCE VOLTAGE (V)
NOTE: Refer to ON Semiconductor Application Notes
AN7514 and AN7515
Figure 5. Forward Bias Safe Operating Area
Figure 6. Unclamped Inductive Switching
Capability
300
300
PULSE DURATION = 80ms
100
DUTY CYCLE = 0.5% MAX
VGS = 0 V
250
VDD = 5V
200
150
100
50
10
1
TJ = 175 o
C
TJ = 175oC
TJ = 25 oC
TJ = 25oC
o
TJ = −55 C
0.1
0.01
0
2
3
4
5
6
7
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 7. Transfer Characteristics
Figure 8. Forward Diode Characteristics
300
300
250
200
150
100
50
250
200
150
100
50
VGS
15V Top
10V
8V
VGS
15V Top
10V
8V
7V
6V
7V
6V
5.5V
5V Bottom
5.5V
5V Bottom
5V
5V
80ms PULSE WIDTH
80ms PULSE WIDTH
Tj=175oC
Tj=25oC
0
0
0
1
2
3
4
5
0
1
2
3
4
5
VDS, DRAIN TO SOURCE VOLTAGE (V)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 9. Saturation Characteristics
Figure 10. Saturation Characteristics
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5
FDB86363−F085
TYPICAL CHARACTERISTICS
2.0
30
PULSE DURATION = 80ms
DUTY CYCLE = 0.5% MAX
ID = 80A
PULSE DURATION = 80ms
DUTY CYCLE = 0.5% MAX
25
20
15
10
1.6
1.2
0.8
0.4
TJ = 175oC
TJ = 25oC
ID = 80A
5
0
VGS = 10V
2
4
6
8
10
−80 −40
0
40
80 120 160 200
TJ, JUNCTION TEMPERATURE(oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 11. RDSON vs. Gate Voltage
Figure 12. Normalized RDSON vs. Junction
Temperature
1.5
1.2
0.9
0.6
0.3
0.0
1.10
VGS = VDS
ID = 5mA
I
D
= 250mA
1.05
1.00
0.95
0.90
−80 −40
0
40
80
120
160 200
−80 −40
0
40
80
120
160 200
TJ, JUNCTION TEMPERATURE(oC)
TJ, JUNCTION TEMPERATURE (oC)
Figure 13. Normalized Gate Threshold Voltage
vs. Temperature
Figure 14. Normalized Drain to Source Breakdown
Voltage vs. Junction Temperature
100000
10
ID = 80A
V
DD = 32V
Ciss
8
6
4
2
0
10000
1000
100
VDD = 40V
VDD = 48V
Coss
Crss
f = 1MHz
VGS = 0V
10
0.1
1
10
DS, DRAIN TO SOURCE VOLTAGE (V)
100
0
30
60
90
120
150
Qg, GATE CHARGE(nC)
V
Figure 15. Capacitance vs. Drain to Source
Voltage
Figure 16. Gate Charge vs. Gate to Source
Voltage
POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or
other countries.
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
D2PAK−3 (TO−263, 3−LEAD)
CASE 418AJ
ISSUE F
DATE 11 MAR 2021
SCALE 1:1
XXXXXX = Specific Device Code
A
= Assembly Location
WL
Y
= Wafer Lot
= Year
GENERIC MARKING DIAGRAMS*
WW
W
M
G
AKA
= Work Week
= Week Code (SSG)
= Month Code (SSG)
= Pb−Free Package
= Polarity Indicator
XX
AYWW
XXXXXXXXG
AKA
XXXXXXXXG
AYWW
XXXXXX
XXYMW
XXXXXXXXX
AWLYWWG
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
IC
Standard
Rectifier
SSG
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
98AON56370E
D2PAK−3 (TO−263, 3−LEAD)
PAGE 1 OF 1
DESCRIPTION:
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
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© Semiconductor Components Industries, LLC, 2018
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