FDMB3900AN [ONSEMI]
N 沟道，PowerTrench® MOSFET，25V，7.0A，23mΩ;
| 型号： | FDMB3900AN |
| 厂家： | 
ONSEMI |
| 描述： | N 沟道，PowerTrench® MOSFET，25V，7.0A，23mΩ 开关 光电二极管 晶体管 |
| 文件： | 总9页 (文件大小：355K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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June 2013
FDMB3900AN
Dual N-Channel PowerTrench® MOSFET
25 V, 7.0 A, 23 mΩ
Features
General Description
Max rDS(on) = 23 mΩ at VGS = 10 V, ID = 7.0 A
Max rDS(on) = 33 mΩ at VGS = 4.5 V, ID = 5.5 A
Fast switching speed
These N-Channel Logic Level MOSFETs are produced using
Fairchild Semiconductor’s advanced PowerTrench® process
that has been especially tailored to minimize the on-state
resistance and yet maintain superior switching performance.
Low gate charge
These devices are well suited for low voltage and battery
powered applications where the low in-line power loss and fast
switching are required.
High performance trench technology for extremely low rDS(on)
High power and current handling capability
RoHS Compliant
Pin 1
Q2
G2
S2
G1
4
D2
D2
5
6
3
2
1
Q1
D1 7
D1
8
S1
MicroFET 3X1.9
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
Parameter
Ratings
Units
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Pulsed
25
±20
V
V
TA = 25 °C
(Note 1a)
7.0
ID
A
28
Power Dissipation
TA = 25 °C
TA = 25 °C
(Note 1a)
(Note 1b)
1.6
PD
W
Power Dissipation
0.8
TJ, TSTG
Operating and Storage Junction Temperature Range
-55 to +150
°C
Thermal Characteristics
RθJA
RθJA
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
(Note 1a)
(Note 1b)
80
°C/W
165
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
7 ’’
Tape Width
Quantity
3900
FDMB3900AN
MicroFET 3X1.9
8 mm
3000 units
1
©2011 Fairchild Semiconductor Corporation
FDMB3900AN Rev.C3
www.fairchildsemi.com
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
25
V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
I
D = 250 μA, referenced to 25 °C
17
mV/°C
IDSS
IGSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
VDS = 20 V, VGS = 0 V
VGS = ±20 V, VDS = 0 V
1
μA
±100
nA
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
1.0
2.0
-6
3.0
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
I
D = 250 μA, referenced to 25 °C
VGS = 10 V, ID = 7.0 A
GS = 4.5 V, ID = 5.5 A
mV/°C
19
26
23
33
V
rDS(on)
Static Drain to Source On Resistance
Forward Transconductance
mΩ
VGS = 10 V, ID = 7.0 A
TJ = 125 °C
26
27
32
gFS
VDS = 5 V, ID = 7.0 A
S
Dynamic Characteristics
Ciss
Coss
Crss
Rg
Input Capacitance
650
151
141
0.8
890
200
215
pF
pF
pF
Ω
VDS = 13 V, VGS = 0 V
f = 1MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Switching Characteristics
td(on)
tr
td(off)
tf
Turn-On Delay Time
Rise Time
6
3
12
10
26
10
17
10
ns
ns
VDD = 13 V, ID = 7.0 A
V
GS = 10 V, RGEN = 6 Ω
Turn-Off Delay Time
Fall Time
15
3
ns
ns
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
VGS = 0 V to 10 V
VGS = 0 V to 5 V
11
7
nC
nC
nC
nC
Qg(TOT)
VDD = 13 V
D = 7.0 A
I
Qgs
Qgd
2.0
3.0
Drain-Source Diode Characteristics
V
GS = 0 V, IS = 1.25 A
(Note 2)
(Note 2)
0.8
0.9
14
3
1.2
1.2
24
VSD
Source to Drain Diode Forward Voltage
V
VGS = 0 V, IS = 7.0 A
trr
Reverse Recovery Time
ns
IF = 7.0 A, di/dt = 100 A/μs
Qrr
Reverse Recovery Charge
10
nC
NOTES:
2
1. R
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
is guaranteed by design while R
is determined by
θJA
θJC
θCA
the user's board design.
b.165 °C/W when mounted on
a minimum pad of 2 oz copper
a. 80 °C/W when mounted on
a 1 in pad of 2 oz copper
2
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.
2
www.fairchildsemi.com
©2011 Fairchild Semiconductor Corporation
FDMB3900AN Rev.C3
Typical Characteristics TJ = 25°C unless otherwise noted
28
4
3
2
1
0
VGS = 10 V
VGS = 3.5 V
VGS = 6 V
VGS = 4.5 V
VGS = 4 V
VGS = 4 V
21
14
7
VGS = 4.5 V
VGS = 3.5 V
VGS = 6 V
PULSE DURATION = 80μs
DUTY CYCLE = 0.5%MAX
VGS = 10 V
PULSE DURATION = 80μs
DUTY CYCLE = 0.5%MAX
0
0
1
2
3
4
0
7
14
21
28
VDS, DRAIN TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT(A)
Figure 1. On-Region Characteristics
Figure2. N o r m a l i z e d O n - R e s i s ta n c e
vs Drain Current and Gate Voltage
1.6
80
ID = 7 A
GS = 10 V
PULSE DURATION = 80μs
V
DUTY CYCLE = 0.5%MAX
1.4
1.2
1.0
0.8
0.6
60
40
20
0
ID = 7 A
TJ = 125 oC
TJ = 25 o
C
2
4
6
8
10
-75 -50 -25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
F i gu re 3 . N orma li zed On - Res is ta nc e
vs Junction Temperature
Figure4. On-Resistance vs Gate to
Source Voltage
30
28
VGS = 0 V
PULSE DURATION = 80μs
DUTY CYCLE = 0.5%MAX
10
21
14
7
VDS = 5 V
TJ = 150 o
C
TJ = 25 oC
1
TJ = 25 o
C
TJ = 150 o
C
TJ = -55 oC
TJ = -55 oC
4
0.1
0.2
0
0.4
0.6
0.8
1.0
1.2
1.4
1
2
3
5
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure6. Source to Drain Diode
Forward Voltage vs Source Current
3
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©2011 Fairchild Semiconductor Corporation
FDMB3900AN Rev.C3
Typical Characteristics TJ = 25°C unless otherwise noted
900
800
700
600
500
400
300
200
100
10
f = 1 MHz
VGS = 0 V
ID = 7 A
Ciss
8
VDS = 10 V
VDS = 13 V
6
VDS = 15 V
4
Coss
2
0
Crss
25
0.1
1
10
0
3
6
9
12
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE(nC)
Figure 7. Gate Charge Characteristics
Figure8. C a p a c i t a n c e v s D r a i n
to Source Voltage
8
40
10
100 μs
6
4
2
0
VGS = 10 V
1 ms
1
0.1
THIS AREA IS
LIMITED BY rDS(on)
10 ms
VGS = 4.5 V
100 ms
1 s
SINGLE PULSE
TJ = MAX RATED
10 s
DC
RθJA = 165 oC/W
RθJA = 80 oC/W
T
A = 25 oC
0.01
0.01
0.1
1
10
100
25
50
75
100
125
150
TA, AMBIENT TEMPERATURE (oC)
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure9. Maximum Continuous Drain
Current vs Ambient Temperature
Figure 10. Forward Bias Safe
Operating Area
300
100
SINGLE PULSE
RθJA = 165 oC/W
TA = 25 o
C
10
1
0.5
10-4
10-3
10-2
10-1
t, PULSE WIDTH (sec)
1
10
100
1000
Figure 11. Single Pulse Maximum Power Dissipation
4
www.fairchildsemi.com
©2011 Fairchild Semiconductor Corporation
FDMB3900AN Rev.C3
Typical Characteristics TJ = 25°C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.05
0.02
0.01
0.1
0.01
P
DM
t
1
t
2
NOTES:
DUTY FACTOR: D = t /t
SINGLE PULSE
θJA = 165 oC/W
1
2
R
PEAK T = P
J
x Z
x R
+ T
DM
θJA
θJA A
0.001
10-4
10-3
10-2
10-1
t, RECTANGULAR PULSE DURATION (sec)
1
10
100
1000
Figure 12. Junction-to-Ambient Transient Thermal Response Curve
5
www.fairchildsemi.com
©2011 Fairchild Semiconductor Corporation
FDMB3900AN Rev.C3
Dimensional Outline and Pad Layout
6
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©2011 Fairchild Semiconductor Corporation
FDMB3900AN Rev.C3
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intended to be an exhaustive list of all such trademarks.
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DEUXPEED
Dual Cool™
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IntelliMAX™
ISOPLANAR™
Sync-Lock™
®*
®
tm
®
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®
PowerTrench
PowerXS™
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QS™
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®
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TranSiC
®
and Better™
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SmartMax™
TriFault Detect™
TRUECURRENT *
μSerDes™
®
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Product Status
Definition
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Advance Information
Formative / In Design
Datasheet contains preliminary data; supplementary data will be published at a later
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First Production
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
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Full Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Not In Production
Rev. I64
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©2011 Fairchild Semiconductor Corporation
FDMB3900AN Rev.C3
7
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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