FDMC010N08C [ONSEMI]
N 沟道,屏蔽门极,PowerTrench® MOSFET,80 V,51 A,10 mΩ;型号: | FDMC010N08C |
厂家: | ONSEMI |
描述: | N 沟道,屏蔽门极,PowerTrench® MOSFET,80 V,51 A,10 mΩ 开关 脉冲 光电二极管 晶体管 |
文件: | 总8页 (文件大小:564K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DATA SHEET
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MOSFET – N-Channel,
Shielded Gate
POWERTRENCH)
V
R
MAX
I
D
MAX
DS
DS(ON)
80 V
10 mW @ 10 V
25 mW @ 6 V
51 A
Pin 1
Pin 1
S
80 V, 51 A, 10 mW
S
S
G
D
D
D
D
FDMC010N08C
Top
Bottom
General Description
WDFN8 3.3x3.3, 0.65P
(Power 33)
This N−Channel MV MOSFET is produced using onsemi’s
advanced POWERTRENCH process that incorporates Shielded Gate
technology. This process has been optimized to minimise on−state
resistance and yet maintain superior switching performance with best
in class soft body diode.
CASE 483AW
MARKING DIAGRAM
ZXYYKK
FDMC
010N08C
Features
• Shielded Gate MOSFET Technology
• Max R
• Max R
= 10 mW at V = 10 V, I = 16 A
GS D
DS(on)
= 25 mW at V = 6 V, I = 8 A
DS(on)
GS
D
Z
X
YY
KK
= Assembly Plant Code
= Numeric Year Code
= Weekly Date Code
= Numeric Lot Code
• 50% Lower Qrr than Other MOSFET Suppliers
• Lowers Switching Noise/EMI
• MSL1 Robust Package Design
FDMC010N08C = Specific Device Code
• 100% UIL Tested
• This Device is Pb−Free, Halide Free and is RoHS Compliant
PIN ASSIGNMENT
Application
• Primary DC−DC MOSFET
• Synchronous Rectifier in DC−DC and AC−DC
• Motor Drive
S
S
D
D
1
2
8
7
• Solar
3
4
6
5
D
D
S
MOSFET MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
Symbol
VDS
Parameter
Drain to Source Voltage
Ratings Units
G
80
20
V
V
A
N−Channel MOSFET
Gate to Source Voltage
VGS
Drain Current
− Continuous
− Continuous
− Continuous
− Pulsed
ID
ORDERING INFORMATION
T = 25°C (Note 5)
51
32
11
206
C
T = 100°C (Note 5)
C
†
T = 25°C (Note 1a)
Package
A
Shipping
Device
(Note 4)
WDFN8
(Pb−Free,
Halide Free)
FDMC010N08C
3000 /
Tape & Reel
Single Pulse Avalanche Energy
(Note 3)
EAS
PD
96
52
mJ
W
Power Dissipation
Power Dissipation
T = 25°C
A
C
T = 25°C (Note 1a)
2.4
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
TJ, TSTG Operating and Storage Junction Temperature
Range
−55 to
+150
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
March, 2023 − Rev. 2
FDMC010N08C/D
FDMC010N08C
THERMAL CHARACTERISTICS
Symbol
Parameter
Ratings
2.4
Unit
°C/W
°C/W
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
RθJC
(Note 1a)
53
R
θ
JA
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
DBV
Drain to Source Breakdown Voltage
I
I
= 250 mA, V = 0 V
80
−
−
−
V
DSS
D
GS
Breakdown Voltage Temperature Coefficient
= 250 mA, referenced to 25°C
−
75
mV/°C
DBVDSS
DTJ
D
I
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
V
= 64 V, V = 0 V
−
−
−
−
1
mA
DSS
GSS
DS
GS
I
=
20 V, V = 0 V
100
nA
GS
DS
ON CHARACTERISTICS
V
Gate to Source Threshold Voltage
V
I
= V , I = 90 mA
2.0
2.9
4.0
V
GS(th)
GS
DS
D
Gate to Source Threshold Voltage
Temperature Coefficient
= 90 mA, referenced to 25°C
−
−8
−
mV/°C
DVGS(th)
DTJ
D
R
Static Drain to Source On Resistance
Forward Transconductance
V
GS
V
GS
V
GS
V
DS
= 10 V, I = 16 A
−
−
−
−
8.0
12.3
14
10
25
18
−
mW
DS(on)
D
= 6 V, I = 8 A
D
= 10 V, I = 16 A, T = 125°C
D
J
g
FS
= 5 V, I = 16 A
35
S
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= 40 V, V = 0 V,
−
−
1070
381
20
1500
530
30
pF
pF
pF
W
iss
DS
GS
f = 1 MHz
C
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
oss
C
−
rss
R
0.1
0.4
0.7
g
SWITCHING CHARACTERISTICS
t
Turn−On Delay Time
Rise Time
V
V
= 40 V, I = 16 A,
−
−
−
−
−
−
−
−
−
−
9
3
19
10
31
10
22
14
−
ns
ns
d(on)
DD
GS
D
= 10 V, R
= 6 W
GEN
t
r
td(off)
Turn−Off Delay Time
Fall Time
17
5
ns
t
f
ns
Q
g
Q
g
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
Output Charge
V
V
V
= 0 V to 10 V
= 0 V to 6 V
= 40 V
V = 40 V,
DD
15
10
5
nC
nC
nC
nC
nC
nC
GS
GS
DD
I
D
= 16 A
Q
gs
gd
I
= 16 A
D
Q
3
−
Q
V
V
= 40 V, V = 0 V
22.1
13.3
−
oss
DD
GS
Q
Total Gate Charge Sync
= 0 V, I = 16 A
−
sync
DS
D
DRAIN−SOURCE DIODE CHARACTERISTICS
V
Source to Drain Diode Forward Voltage
V
V
= 0 V, I = 2 A (Note 2)
−
−
−
−
−
−
0.7
0.8
17
20
13
45
1.2
1.3
30
33
23
73
V
SD
GS
S
= 0 V, I = 16 A (Note 2)
GS
S
t
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Time
Reverse Recovery Charge
I = 8 A, di/dt = 300 A/ms
F
ns
nC
ns
rr
Q
rr
t
I = 8 A, di/dt = 1000 A/ms
F
rr
Q
nC
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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2
FDMC010N08C
NOTES:
1. R
is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR−4 material. R
is determined
θ
θ
CA
JA
by the user’s board design.
a. 53 °C/W when mounted on
b. 125 °C/W when mounted on
a minimum pad of 2 oz copper.
2
pad of 2 oz copper.
a 1 in
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.
3. E of 96 mJ is based on starting T = 25 °C, L = 3 mH, I = 8 A, V = 72 V, V = 10 V. 100% test at L = 0.1 mH, I = 25 A.
AS
J
AS
DD
GS
AS
4. Pulsed Id please refer to Fig 11 SOA graph for more details.
5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal &
electro−mechanical application board design.
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3
FDMC010N08C
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
5
150
120
V
= 7 V
V
GS
= 10 V
GS
V
= 8 V
= 7 V
GS
V
= 5 V
GS
4
V
V
= 5.5 V
GS
GS
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
90
60
3
2
1
0
V
= 8 V
GS
V
= 6 V
GS
V
= 6 V
GS
GS
V
= 5.5 V
30
0
V
= 10 V
GS
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
V
= 5 V
GS
0
1
2
3
4
5
0
30
60
90
120
150
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
D
Figure 1. On−Region Characteristics
Figure 2. Normalized On−Resistance
vs. Drain Current and Gate Voltage
80
60
40
20
0
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
I
V
= 16 A
D
= 10 V
GS
I
D
= 16 A
T = 125°C
J
T = 25°C
J
−75 −50 −25
0
25 50 75 100 125 150
4
5
6
7
8
9
10
T , JUNCTION TEMPERATURE (°C)
J
V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance vs.
Junction Temperature
Figure 4. On−Resistance vs. Gate to
Source Voltage
150
120
90
60
30
0
150
100
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
V
= 0 V
GS
V
DS
= 5 V
10
T = 25°C
1
J
T = 150°C
J
T = 25°C
J
0.1
0.01
T = 150°C
J
T = −55°C
J
T = −55°C
J
0.001
0.0
2
3
4
5
6
7
8
9
10
0.2
0.4
0.6
0.8
1.0
1.2
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward
Voltage vs. Source Current
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4
FDMC010N08C
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (continued)
J
10
8
10000
I
D
= 16 A
V
= 30 V
DD
C
iss
1000
100
V
DD
= 40 V
C
oss
6
V
DD
= 50 V
4
C
rss
10
1
2
f = 1 MHz
= 0 V
V
GS
0
0
3
6
9
12
15
0.1
1
10
80
18
Q , GATE CHARGE (nC)
g
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs. Drain to
Source Voltage
60
100
R
= 2.4°C/W
q
JC
50
40
30
20
10
0
V
= 10 V
GS
T = 25°C
J
10
T = 100°C
J
V
= 6 V
GS
T = 125°C
J
1
0.001
25
50
75
100
125
150
0.01
0.1
1
10
100
t , TIME IN AVALANCHE (ms)
AV
T , CASE TEMPERATURE (°C)
C
Figure 9. Unclamped Inductive Switching
Capability
Figure 10. Maximum Continuous Drain
Current vs. Case Temperature
300
10000
1000
100
SINGLE PULSE
100
R
= 2.4°C/W
q
JC
10 ms
T
C
= 25°C
10
THIS AREA IS
LIMITED BY R
100 ms
DS(on)
SINGLE PULSE
T = MAX RATED
1
1 ms
J
R
T
= 2.4°C/W
= 25°C
q
JC
10 ms
100 ms/DC
CURVE BENT TO
MEASURED DATA
C
10
10
0.1
−2
−5
−4
−3
−1
0.1
1
10
100
500
10
10
10
10
1
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
t, PULSE WIDTH (s)
Figure 11. Forward Bias Safe Operating
Area
Figure 12. Single Pulse Maximum Power
Dissipation
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5
FDMC010N08C
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (continued)
J
2
1
DUTY CYCLE − DESCENDING ORDER
D = 0.5
0.2
0.1
P
DM
0.05
0.02
0.01
0.1
t
1
t
2
NOTES:
SINGLE PULSE
0.01
Z
q
(t) = r(t) × R
= 2.4°C/W
q
JC
JC
R
q
JC
Peak T = P
× Z (t) + T
q
JC C
J
DM
Duty Cycle, D = t /t
1
2
0.001
−2
10
−5
10
−4
10
−3
10
10−1
1
t, RECTANGULAR PULSE DURATION (s)
Figure 13. Junction−to−Case Transient Thermal Response Curve
POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United
States and/or other countries.
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WDFN8 3.3X3.3, 0.65P
CASE 483AW
ISSUE A
DATE 10 SEP 2019
GENERIC
MARKING DIAGRAM*
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
XXXX = Specific Device Code
A
Y
= Assembly Location
= Year
XXXX
AYWW
WW = Work Week
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13672G
WDFN8 3.3X3.3, 0.65P
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
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© Semiconductor Components Industries, LLC, 2018
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