FDMC008N08C [ONSEMI]
N 沟道，屏蔽门极，PowerTrench® MOSFET，80V，60A，7.8mΩ;
| 型号： | FDMC008N08C |
| 厂家： | 
ONSEMI |
| 描述： | N 沟道，屏蔽门极，PowerTrench® MOSFET，80V，60A，7.8mΩ |
| 文件： | 总8页 (文件大小：553K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
MOSFET – N-Channel,
Shielded Gate,
POWERTRENCH)
V
R
MAX
I
D
MAX
DS
DS(ON)
80 V
7.8 mW @ 10 V
19.3 mW @ 6 V
60 A
80 V, 60 A, 7.8 mW
D
S
8
1
2
3
FDMC008N08C
General Description
S
S
7
6
D
D
This N−Channel MV MOSFET is produced using onsemi’s
advanced POWERTRENCH process that incorporates Shielded Gate
technology. This process has been optimized to minimise on−state
resistance and yet maintain superior switching performance with best
in class soft body diode.
G
4
5
D
N-CHANNEL MOSFET
Pin 1
Features
• Shielded Gate MOSFET Technology
S
S
Pin 1
S
• Max R
• Max R
= 7.8 mW at V = 10 V, I = 21 A
G
DS(on)
GS
D
= 19.3 mW at V = 6 V, I = 10 A
DS(on)
GS
D
D
D
D
D
• 50% Lower Qrr Than Other MOSFET Suppliers
• Lowers Switching Noise/EMI
• MSL1 Robust Package Design
• 100% UIL tested
• Pb−Free, Halide Free and RoHS Compliant
Top
Bottom
WDFN8 3.3 y 3.3, 0.65P
(Power 33)
CASE 483AW
MARKING DIAGRAM
Applications
• Primary DC−DC MOSFET
• Synchronous Rectifier in DC−DC and AC−DC
• Motor Drive
ZXYYKK
FDMC
008N08C
• Solar
MOSFET MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
Z
XYY
KK
= Assembly Plant Code
= 3−Digit Date Code Format
= 2−Alphanumeric Lot Run
Traceability Code
Symbol
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current:
Value
80
Unit
V
V
DS
V
GS
20
V
FDMC008N08C = Specific Device Code
I
D
A
Continuous, T = 25°C (Note 5)
60
38
12
273
C
ORDERING INFORMATION
Continuous, T = 100°C (Note 5)
C
Continuous, T = 25°C (Note 1a)
A
Pulsed (Note 4)
†
Device
Package
Shipping
E
Single Pulse Avalanche Energy
(Note 3)
150
mJ
W
AS
FDMC008N08C
WDFN8
(Pb−Free,
Halide Free)
3000 /
Tape & Reel
P
Power Dissipation:
D
T
A
= 25°C
57
2.3
C
T = 25°C (Note 1a)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
T , T
Operating and Storage Junction
Temperature Range
−55 to +150
°C
J
STG
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
© Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
April, 2023 − Rev. 2
FDMC008N08C/D
FDMC008N08C
THERMAL CHARACTERISTICS
Symbol
Parameter
Value
2.2
Unit
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient (Note 1a)
°C/W
R
q
JC
JA
R
53
q
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
I
I
= 250 mA, V = 0 V
80
−
−
−
V
DSS
D
GS
DBV
Breakdown Voltage Temperature
Coefficient
= 250 mA, referenced to 25°C
−
51
mV/°C
DSS
D
/DT
J
DSS
GSS
I
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
V
= 64 V, V = 0 V
−
−
−
−
1
mA
DS
GS
I
=
20 V, V = 0 V
100
nA
GS
DS
ON CHARACTERISTICS
V
Gate to Source Threshold Voltage
V
I
= V , I = 120 mA
2.0
3.0
4.0
V
GS(th)
GS
DS
D
DV
/DT
Gate to Source Threshold Voltage
Temperature Coefficient
= 120 mA, referenced to 25°C
−
−8.4
−
mV/°C
GS(th)
J
D
R
Static Drain to Source On Resistance
Forward Transconductance
V
GS
V
GS
V
GS
V
DS
= 10 V, I = 21 A
−
−
−
−
6.3
9.6
10.7
50
7.8
19.3
13.5
−
mW
DS(on)
D
= 6 V, I = 10 A
D
= 10 V, I = 21 A, T = 125°C
D
J
g
FS
= 5 V, I = 21 A
S
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
DS
= 40 V, V = 0 V, f = 1 MHz
−
−
1535
517
19
2150
730
30
pF
pF
pF
W
iss
GS
C
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
oss
C
−
rss
R
0.1
0.4
0.8
g
SWITCHING CHARACTERISTICS
t
Turn-On Delay Time
Rise Time
V
= 40 V, I = 21 A, V = 10 V,
GEN
−
−
−
−
−
12
3
22
10
32
10
29
ns
ns
ns
ns
nC
d(on)
DD
D
GS
R
= 6 W
t
r
t
Turn-Off Delay Time
Fall Time
18
3
d(off)
t
f
Q
Total Gate Charge
V
= 0 V to 10 V, V = 40 V,
21
g)
GS
DD
I
= 21 A
D
V
D
= 0 V to 6 V, V = 40 V,
−
13
18
nC
GS
DD
I
= 21 A
Q
Q
Gate to Source Charge
Gate to Drain “Miller” Charge
Output Charge
V
DD
V
DD
V
DD
V
DS
= 40 V, I = 21 A
−
−
−
−
6.7
3.8
28
−
−
−
−
nC
nC
nC
nC
gs
D
= 40 V, I = 21 A
gd
D
Q
= 40 V, V = 0 V
GS
oss
Q
Total Gate Charge Sync.
= 0 V, I = 21 A
18
sync
D
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2
FDMC008N08C
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (continued)
J
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
DRAIN-SOURCE DIODE CHARACTERISTICS
V
Source to Drain Diode Forward Voltage
V
V
= 0 V, I = 2 A (Note 2)
−
−
−
−
−
−
0.7
0.8
19
27
15
65
1.2
1.3
30
V
SD
GS
S
= 0 V, I = 21 A (Note 2)
GS
S
t
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Time
Reverse Recovery Charge
I = 10 A, di/dt = 300 A/ms
F
ns
nC
ns
rr
Q
44
rr
t
I = 10 A, di/dt = 1000 A/ms
F
23
rr
Q
105
nC
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
NOTES:
2
1. R
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR−4 material. R
is determined
CA
q
q
JA
by the user’s board design.
a) 53°C/W when mounted
b) 125°C/W when mounted
on a minimum pad of 2 oz copper.
2
on a 1 in pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%.
3. E of 150 mJ is based on starting T = 25°C; L = 3 mH, I = 10 A, V = 10 V, V = 80 V, 100% test at L = 0.1 mH, I = 33 A.
AS
J
AS
DD
GS
AS
4. Pulsed Id please refer to Fig 11 SOA graph for more details.
5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal & electro−mechanical
application board design.
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3
FDMC008N08C
TYPICAL CHARACTERISTICS
(T = 25°C unless otherwise noted)
J
5
4
3
2
150
120
V
= 5 V
V
V
= 10 V
= 8 V
GS
GS
V
GS
= 5.5 V
GS
V
= 7 V
GS
V
= 6 V
GS
90
60
30
0
V
= 6 V
GS
V
GS
= 7 V
V
= 5.5 V
GS
1
V
GS
= 10 V
V
= 5 V
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
GS
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
V
GS
= 8 V
0
0
1
2
3
4
5
0
30
60
90
120
150
V
DS
, Drain to Source Voltage (V)
I , Drain Current (A)
D
Figure 1. On−Region Characteristics
Figure 2. Normalized On−Resistance vs. Drain
Current and Gate Voltage
50
40
30
20
2.0
1.8
1.6
1.4
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
I
V
= 21 A
D
= 10 V
GS
I
D
= 21 A
1.2
1.0
T = 125°C
J
10
0
0.8
0.6
T = 25°C
J
10
25 50
75 100 125 150
4
5
6
7
8
9
−75 −50 −25
0
T , Junction Temperature (5C)
J
V
GS
, Gate to Source Voltage (V)
Figure 3. Normalized On−Resistance
Figure 4. On−Resistance vs. Gate to Source
vs. Junction Temperature
Voltage
150
100
150
120
V
GS
= 0 V
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
10
1
V
DS
= 5 V
T = 150°C
J
T = 25°C
J
90
60
0.1
T = 150°C
J
T = 25°C
T = −55°C
J
J
30
0
0.01
T = −55°C
J
0.001
4
5
6
7
8
0.0
0.2
0.4
0.6
0.8
1.0
1.2
3
V
SD
, Body Diode Forward Voltage (V)
V
GS
, Gate to Source Voltage (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward Voltage
vs. Source Current
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4
FDMC008N08C
TYPICAL CHARACTERISTICS (continued)
(T = 25°C unless otherwise noted)
J
10
8
10000
1000
I
D
= 21 A
C
iss
V
DD
= 30 V
V
DD
= 40 V
C
oss
6
4
2
0
V
= 50 V
100
10
1
DD
C
rss
f = 1 MHz
= 0 V
V
GS
80
0
5
10
15
20
25
0.1
10
, Drain to Source Voltage (V)
1
Q , Gate Charge (nC)
V
DS
g
Figure 8. Capacitance vs. Drain to Source
Voltage
Figure 7. Gate Charge Characteristics
70
60
50
40
30
100
R
= 2.2°C/W
q
JC
V
GS
= 10 V
T = 25°C
J
10
T = 100°C
J
V
GS
= 6 V
20
10
0
T = 125°C
J
1
0.001
1
25
50
75
100
125
150
0.01
0.1
10
100
t
, Time in Avalanche (ms)
AV
T , Case Temperature (5C)
C
Figure 9. Unclamped Inductive Switching
Capability
Figure 10. Maximum Continuous Drain
Current vs. Case Temperature
500
10000
1000
100
SINGLE PULSE
100
10
R
= 2.2°C/W
q
JC
10 ms
T
C
= 25°C
100 ms
THIS AREA IS
LIMITED BY R
1
0.1
DS(on)
1 ms
SINGLE PULSE
10 ms
T = MAX RATED
J
100 ms/DC
R
T
= 2.2°C/W
= 25°C
CURVE BENT TO
MEASURED DATA
q
JC
C
0.01
10
−5
−4
−3
−2
−1
10
10
10
10
10
10
1
0.1
1
100
500
V
DS
, Drain to Source Voltage (V)
t, Pulse Width (s)
Figure 11. Forward Bias Safe Operating Area
Figure 12. Single Pulse Maximum Power
Dissipation
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5
FDMC008N08C
TYPICAL CHARACTERISTICS (CONTINUED)
(T = 25°C unless otherwise noted)
J
2
1
DUTY CYCLE−DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
P
DM
0.1
0.01
0.02
0.01
t
1
t
2
NOTES:
SINGLE PULSE
Z
q
(t) = r(t) × R
= 2.2°C/W
q
JC
JC
R
q
JC
Peak T = P
× Z (t) + T
q
JC C
J
DM
Duty Cycle, D = t / t
1
2
0.001
−3
−2
−1
−5
−4
10
10
10
1
10
10
t, Rectangular Pulse Duration (s)
Figure 13. Junction−to−Case Transient Thermal Response Curve
POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United
States and/or other countries.
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WDFN8 3.3X3.3, 0.65P
CASE 483AW
ISSUE A
DATE 10 SEP 2019
GENERIC
MARKING DIAGRAM*
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
XXXX = Specific Device Code
A
Y
= Assembly Location
= Year
XXXX
AYWW
WW = Work Week
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13672G
WDFN8 3.3X3.3, 0.65P
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
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© Semiconductor Components Industries, LLC, 2018
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