FDMC4D9P20X8 [ONSEMI]
P 沟道,Power Trench® MOSFET,-20V,-75A,4.9mΩ;型号: | FDMC4D9P20X8 |
厂家: | ONSEMI |
描述: | P 沟道,Power Trench® MOSFET,-20V,-75A,4.9mΩ |
文件: | 总8页 (文件大小:377K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
FDMC4D9P20X8
P‐Channel Power Trench)
MOSFET
−20 V, −75 A, 4.9 mW
General Description
This P−Channel MOSFET is produced using ON Semiconductor’s
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advanced PowerTrench® process that has been optimized for r
,
DS(on)
switching performance and ruggedness.
V
DS
R
MAX
I MAX
D
DS(ON)
4.9 mꢀ @ −4.5 V
6.5 mꢀ @ −2.5 V
16.4 mꢀ @ −1.8 V
Features
−20 V
−75 A
• Max r
• Max r
= 4.9 mꢀ at V = −4.5 V, I = −18 A
GS D
DS(on)
= 16.4 mꢀ at V = −1.8 V, I = −9 A
DS(on)
GS
D
• High Performance Trench Technology for Extremely Low r
DS(on)
• High Power and Current Handling Capability in a Widely Used
D (5−8)
Surface Mount Package
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
G (4)
Applications
• Load Switch
S (1−3)
• Battery Management
• Power Management
• Reverse Polarity Protection
P-Channel MOSFET
Pin 1
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
Symbol
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current:
Ratings
−20
Units
V
DS
V
GS
V
V
A
Top
Bottom
PQFN8
CASE 483AX
12
I
D
Continuous, T = 25°C (Note 5)
−75
−47
−18
C
Continuous, T = 100°C (Note 5)
C
Continuous, T = 25°C (Note 1a)
A
MARKING DIAGRAM
Pulsed (Note 4)
−335
1−S
2−S
8−D
7−D
E
Single Pulse Avalanche Energy
(Note 3)
54
mJ
W
AS
$Y&Z&3&K
FDMC
4D9P20X
P
Power Dissipation:
D
3−S
4−G
6−D
5−D
T
= 25°C
40
2.4
C
T = 25°C (Note 1a)
A
T , T
Operating and Storage Junction
Temperature Range
−55 to +150
°C
J
STG
$Y
&Z
&3
&K
= ON Semiconductor Logo
= Assembly Plant Code
= Data Code (Year & Week)
= Lot
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
FDMC4D9P20X8 = Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 3 of
this data sheet.
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
January, 2018 − Rev. 3
FDMC4D9P20X8/D
FDMC4D9P20X8
THERMAL CHARACTERISTICS
Symbol
Parameter
FDMC4D9P20X8
Unit
R
Thermal Resistance, Junction to Case
3.1
53
_C/W
ꢁ
JC
JA
R
Thermal Resistance, Junction to Ambient (Note 1a)
ꢁ
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
I
I
= −250 ꢂ A, V = 0 V
−20
V
DSS
D
GS
ꢃ BV
/ꢃ T
Breakdown Voltage Temperature
Coefficient
= −250 ꢂ A, Referenced to 25 _C
−15
mV/_C
DSS
J
D
I
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
V
= −16 V, V = 0 V
−1
ꢂ A
DSS
DS
GS
I
=
12 V, V = 0 V
100
nA
GSS
GS
DS
ON CHARACTERISTICS
V
Gate to Source Threshold Voltage
V
I
= V , I = −250 ꢂ A
−0.4
−0.7
4
−1.6
V
GS(th)
GS
DS
D
ꢃ V
ꢃ T
Gate to Source Threshold Voltage
Temperature Coefficient
= −250 ꢂ A, referenced to 25 _C
GS(th)
D
mV/_C
J
r
Static Drain to Source On Resistance
V
GS
V
GS
V
GS
V
GS
V
DS
= −4.5 V, I = −18 A
3.3
4.1
6.2
4.5
113
4.9
6.5
mꢀ
DS(on)
D
= −2.5 V, I = −11 A
D
= − 1.8 V, I = −9 A
16.4
6.8
D
= −4.5 V, I = −18 A, T = 125 _C
D
J
g
FS
Forward Transconductance
= −5 V, I = −18 A
S
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
DS
= −10 V, V = 0 V, f = 1 MHz
7535
1100
1040
4.5
10550
1540
1455
10
pF
pF
pF
ꢀ
iss
GS
C
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
oss
C
rss
R
0.1
g
SWITCHING CHARACTERISTICS
t
Turn-On Delay Time
Rise Time
V
V
= −10 V, I = −18 A,
13
17
23
31
ns
ns
ns
ns
d(on)
DD
GS
D
= −4.5 V, R = 6
ꢀ
G
t
r
t
Turn-Off Delay Time
Fall Time
312
176
78
499
282
109
d(off)
t
f
Q
Total Gate Charge
V
GS
= 0 V to −4.5 V, V = −10 V,
DD
= −18 A
g
nC
nC
I
D
V
GS
= 0 V to −2.5 V, V = −10 V,
50
70
DD
I
D
= −18 A
Q
Gate to Source Charge
V
DD
V
DD
= −10 V, I = −18 A
12
24
nC
nC
gs
D
Q
Gate to Drain “Miller” Charge
= −10 V, I = −18 A
D
gd
DRAIN−SOURCE DIODE CHARACTERISTICS
V
Source to Drain Diode Forward
Voltage
V
V
= 0 V, I = −18 A (Note 2)
−0.7
−0.6
41
−1.2
−1.2
66
V
SD
GS
S
= 0 V, I = −2 A (Note 2)
GS
S
t
Reverse Recovery Time
I
S
= −18 A, di/dt = 100 A/ꢂ s
ns
rr
Q
Reverse Recovery Charge
22
35
nC
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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2
FDMC4D9P20X8
2
1. R
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR−4 material. R
is determined
θ
θ
CA
JA
by the user’s board design.
NOTES:
a) 53 _C/W when mounted on
b) 125 _C/W when mounted on
2
a 1 in pad of 2 oz copper.
a minimum pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 ꢂ s, Duty cycle < 2.0 %
3. E of 54 mJ is based on starting T = 25 C, L = 3 mH, I = −6 A, V = − 20 V, V = −10 V.
AS
J
AS
DD
GS
4. Pulsed Id please refer to Fig 11 SOA graph for more details.
5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal
& electro−mechanical application board design.
PACKAGE MARKING AND ORDERING INFORMATION
Device Marking
Device
Package
Reel Size
Tape Width
Quantity
PQFN8
(Pb Free)
FDMC4D9P20X8
FDMC4D9P20X8
13’’
12 mm
3000 Units
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3
FDMC4D9P20X8
TYPICAL CHARACTERISTICS
(T = 25 °C unless otherwise noted)
J
4
280
210
140
70
PULSE DURATION = 80 ꢂ s
DUTY CYCLE = 0.5% MAX
VGS = −4.5 V
GS = −3 V
VGS = −1.8 V
V
3
2
1
0
VGS = −2 V
VGS = −2.5 V
VGS = −2 V
VGS = −2.5V
VGS = −3 V
VGS = −4.5 V
PULSE DURATION = 80 ꢂ s
DUTY CYCLE = 0.5% MAX
VGS = −1.8 V
0
0
70
140
210
280
0
1
2
3
4
−I , DRAIN CURRENT (A)
D
−VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Normalized On−Resistance
vs Drain Currentand Gate Voltage
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
60
45
30
15
0
ID = −18 A
PULSE DURATION = 80ꢂ s
DUTY CYCLE = 0.5% MAX
VGS = −4.5 V
ID = −18 A
TJ = 25 o
C
TJ = 125 o
C
−75 −50 −25
0
25 50 75 100 125 150
0.0
1.5
3.0
4.5
TJ, JUNCTION TEMPERATUREo(C)
−V
GS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On−Resistance
vs Junction Temperature
Figure 4. On−Resistance vs Gate to Source
Voltage
280
210
140
70
200
100
VGS = 0 V
PULSE DURATION = 80ꢂ s
DUTY CYCLE = 0.5% MAX
10
VDS = −5 V
TJ = 150 o
C
TJ = 150 o
C
TJ = 25 o
C
TJ = 25 o
C
1
0.1
TJ = −55oC
0.01
TJ = −55oC
0
0.001
0
1
2
3
4
0.0
0.2
0.4
0.6
0.8
1.0
1.2
−VGS, GATE TO SOURCE VOLTAGE (V)
−VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward Voltage
vs Source Current
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4
FDMC4D9P20X8
TYPICAL CHARACTERISTICS
(T = 25 °C unless otherwise noted)
J
20000
10000
10
8
ID = −18 A
Ciss
VDD = −10 V
VDD = −12 V
6
Coss
VDD = −8 V
4
Crss
2
f = 1 MHz
VGS = 0 V
1000
600
0
0.1
1
10
20
0
15
30
45
60
75
90
−VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs Drain to Source Voltage
80
10
9
VGS = −4.5 V
60
40
20
0
TJ = 125 o
C
TJ = 100 o
C
VGS = −1.8 V
TJ = 25 o
C
R
ꢁJC = 3.1 oC/W
1
0.001
0.1
1
10
100
25
50
75
100
125
150
TC, CASE TEMPERATUREo(C)
tAV, TIME IN AVALANCHE (ms)
Figure 9. Unclamped Inductive
Switching Capability
Figure 10. Maximum Continuous Drain Current vs
Case Temperature
1000
100
10
10000
THIS AREA IS
LIMITED BY r DS(on)
SINGLE PULSE
ꢁJC = 3.1oC/W
10 ꢂ s
R
T
C = 25oC
1000
100
10
100 ꢂ s
1 ms
10 ms
SINGLE PULSE
TJ = MAX RATED
1
100 ms
R
ꢁJC = 3.1oC/W
C = 25 oC
CURVE BENT TO
MEASURED DATA
T
0.1
0.01
10−5
10−4
10−3
t, PULSE WIDTH (sec)
10−2
10−1
1
0.1
1
10
100
−VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe Operating Area
Figure 12. Single Pulse Maximum Power
Dissipation
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5
FDMC4D9P20X8
TYPICAL CHARACTERISTICS
(T = 25 °C unless otherwise noted)
J
2
1
DUTY CYCLE−DESCENDING ORDER
D = 0.5
0.2
0.1
P
DM
0.1
0.01
0.05
0.02
0.01
t
1
t
2
NOTES:
(t) = r(t) x R
SINGLE PULSE
Z
R
ꢁ JC
ꢁ JC
o
= 3.1 C/W
ꢁ JC
Peak T = P
x Z (t) + T
J
DM
ꢁ
J
C
C
Duty Cycle, D = t / t
1
2
0.001
10−5
10−4
10−3
10−2
10−1
1
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction−to−Case Transient Thermal Response Curve
POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States
and/or other countries.
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PQFN8 3.3X3.3, 0.65P
CASE 483AX
ISSUE B
DATE 24 JUN 2022
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13673G
PQFN8 3.3X3.3, 0.65P
PAGE 1 OF 1
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