FDMC9430L-F085 [ONSEMI]
双 N 沟道，逻辑电平，PowerTrench® MOSFET，40V，12A，8.2mΩ;
| 型号： | FDMC9430L-F085 |
| 厂家： | 
ONSEMI |
| 描述： | 双 N 沟道，逻辑电平，PowerTrench® MOSFET，40V，12A，8.2mΩ 开关 光电二极管 晶体管 |
| 文件： | 总8页 (文件大小：251K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
Pin 1
MOSFET – Dual, N-Channel,
Logic Level,
POWERTRENCH)
G1 S1 S1 S1
D1
D2
40 V, 12 A, 8.2 mW
G2 S2 S2 S2
WDFN8
FDMC9430L-F085
3x3, 0.65P
Features
CASE 511DG
• Typical R
• Typical Q
= 6.3 mW at V = 10 V, I = 12 A
GS D
DS(on)
= 15 nC at V = 10 V, I = 12 A
PIN ASSIGNMENT
g(tot)
GS
D
• UIS Capability
S1
S1
S1
G1
• This Device is Pb−Free, Halide Free and RoHS Compliant
• AEC Qualified AEC−Q101
4
3
1
2
Applications
• Battery Protection
• Load Switching
• Point of Load
Q1
Q2
8
5
7
6
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
S2
S2
S2 G2
Symbol
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Value
40
Unit
V
Dual N−Channel MOSFET
V
DSS
V
GS
12
V
I
D
Drain Current − Continuous (V = 10)
12
A
GS
MARKING DIAGRAM
(Note 1)
T
= 25°C
C
Pulsed Drain Current
T
= 25°C
See Figure 4
C
XXXX
AYWWG
G
E
AS
Single Pulse Avalanche Energy (Note 2)
Power Dissipation
21.6
mJ
W
P
D
11.4
Derate Above 25°C
0.1
−55 to +150
13
W/°C
°C
XXXX = Specific Device Code
A
Y
= Assembly Location
= Year
T , T
Operating and Storage Temperature
Thermal Resistance, Junction−to−Case
J
stg
R
°C/W
°C/W
q
JC
JA
WW = Work Week
G
= Pb−Free Package
R
Maximum Thermal Resistance,
Junction−to−Ambient (Note 3)
65
q
(Note: Microdot may be in either location)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Current is limited by bondwire configuration.
ORDERING INFORMATION
2. Starting T = 25°C, L = 0.3 mH, I = 12 A, V = 40 V during inductor charging
J
AS
DD
†
Shipping
Device
Package
and V = 0 V during time in avalanche.
DD
3. R
is the sum of the junction−to−case and case−to−ambient thermal
q
JA
3000 Tape
& Reel
WDFN8
(Pb−Free,
Halide Free)
FDMC9430L−F085
resistance, where the case thermal reference is defined as the solder
mounting surface of the drain pins. R
is guaranteed by design, while R
q
JA
q
JC
is determined by the board design. The maximum rating presented here is
2
based on mounting on a 1 in pad of 2 oz copper.
†For information on tape and reel specifications, in-
cluding part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
May, 2023 − Rev. 2
FDMC9430L−F085/D
FDMC9430L−F085
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
B
Drain−to−Source Breakdown Voltage
Drain−to−Source Leakage Current
I
= 250 mA, V = 0 V
40
−
−
−
−
−
−
V
VDSS
D
GS
I
V
V
= 40 V,
= 0 V
T = 25°C
1
mA
mA
nA
DSS
DS
GS
J
T = 150°C (Note 4)
J
−
0.2
100
I
Gate−to−Source Leakage Current
V
=
12 V
−
GSS
GS
ON CHARACTERISTICS
V
Gate−to−Source Threshold Voltage
Drain−to−Source On Resistance
V
= V , I = 250 mA
1
−
−
−
1.8
8.9
3
V
GS(th)
DS(on)
GS
DS
D
R
I
I
= 10 A, V = 4.5 V
11.5
8.0
mW
D
GS
= 12 A,
= 10 V
T = 25°C
6.3
D
V
J
GS
T = 150°C (Note 4)
J
10.2
13.0
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= 20 V, V = 0 V,
−
−
−
−
−
−
−
−
984
315
18
−
−
pF
iss
DS
GS
f = 1 MHz
C
Output Capacitance
oss
C
Reverse Transfer Capacitance
Gate Resistance
−
rss
R
V
GS
V
GS
V
GS
= 0.5 V, f = 1 MHz
1.1
15
−
W
g
Q
Total Gate Charge
= 0 to 10 V
= 0 to 1 V
V
D
= 32 V,
= 12 A
22
−
nC
g(ToT)
DD
I
Q
Threshold Gate Charge
Gate−to−Source Gate Charge
Gate−to−Drain “Miller” Charge
0.9
2.6
2.1
g(th)
Q
−
gs
Q
−
gd
SWITCHING CHARACTERISTICS
t
Turn−On Time
Turn−On Delay
Rise Time
V
DD
V
GS
= 20 V, I = 12 A,
−
−
−
−
−
−
−
7
13
−
ns
on
D
= 10 V, R
= 6 W
GEN
t
d(on)
t
r
2
−
t
Turn−Off Delay
Fall Time
17
2
−
d(off)
t
f
−
t
Turn−Off Time
−
28
off
DRAIN−SOURCE DIODE CHARACTERISTICS
V
Source−to−Drain Diode Voltage
I
I
= 12 A, V = 0 V
−
−
−
−
−
−
1.2
1.1
48
V
SD
SD
GS
= 6 A, V = 0 V
SD
GS
t
Reverse−Recovery Time
Reverse−Recovery Charge
V
= 32 V, I = 12 A,
32
16
ns
rr
DD
F
dI /dt = 100 A/ms
SD
Q
24
nC
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. The maximum value is specified by design at T = 150°C. Product is not tested to this condition in production.
J
www.onsemi.com
2
FDMC9430L−F085
TYPICAL CHARACTERISTICS
1.2
1.0
0.8
0.6
0.4
0.2
0.0
35
30
25
20
15
10
CURRENT LIMITED
BY SILICON
V
GS
= 10 V
CURRENT LIMITED
BY PACKAGE
5
0
25
50
75
100
125
150
175
0
25
50
75
100
125
150
T , CASE TEMPERATURE (°C)
C
T , CASE TEMPERATURE (°C)
C
Figure 1. Normalized Power Dissipation vs.
Case Temperature
Figure 2. Maximum Continuous Drain Current
vs. Case Temperature
2
DUTY CYCLE − DESCENDING ORDER
1
D = 0.50
0.20
P
DM
0.10
t
1
0.1
0.05
0.02
0.01
t
2
Notes:
DUTY FACTOR, D = t / t
0.01
1
2
PEAK T = P
* Z
* R (t) +T
q
JA JA C
q
J
DM
Single Pulse
1E−3
−5
−4
10
−3
10
−2
10
−1
0
1
10
10
10
10
t, RECTANGULAR PULSE DURATION(s)
Figure 3. Normalized Maximum Transient Thermal Impedance
10000
T
C
= 25°C
V
GS
= 10 V
FOR TEMPERATURES
ABOVE 25°C DERATE
PEAK CURRENT AS
FOLLOWS:
1000
150 − T
C
I = I
2
125
100
10
Single Pulse
−5
−4
10
−3
10
−2
10
−1
10
0
1
10
10
10
t, RECTANGULAR PULSE DURATION (s)
Figure 4. Peak Current Capability
www.onsemi.com
3
FDMC9430L−F085
TYPICAL CHARACTERISTICS
1000
100
10
100
If R = 0
= (L) (I ) / (1.3 * RATED BV
t
AV
− V )
DD
AS
DSS
If R ≠ 0
= (L / R) ln [(I * R) /
t
AV
AS
100 ms
(1.3 * RATED BV
− V ) +1]
DD
DSS
STARTING
10
1
OPERATION IN
THIS AREA MAY
BE LIMITED
T = 25°C
J
1 ms
1
10 ms
STARTING
T = 125°C
J
BY PACKAGE
SINGLE PULSE
TJ = MAX RATED
100 ms
0.1
0.01
T
C
= 25°C
0.1
1
10
100
0.001 0.01
0.1
1
10
100
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
t , TIME IN AVALANCHE (ms)
AV
NOTE: Refer to onsemi Application Notes AN7514 and AN7515
Figure 5. Forward Bias Safe Operating Area
Figure 6. Unclamped Inductive Switching
Capability
35
35
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5 % MAX
V
GS
= 0 V
30
25
20
15
10
V
DD
= 5 V
10
T = 25°C
J
T = 25°C
J
T = 150°C
J
1
T = −55°C
J
T = 150°C
J
5
0
0.1
0.0
1.0
1.5
2.0
2.5
3.0
3.5
4.0
0.2
0.4
0.6
0.8
1.0
1.2
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 8. Forward Diode Characteristics
Figure 7. Transfer Characteristics
35
30
35
30
25
20
15
10
5
80 μs PULSE WIDTH
T = 25°C
J
80 μs PULSE WIDTH
T = 150°C
J
V
GS
25
20
15
10
10 V Top
5 V
4 V
3.5 V
3 V
V
GS
10 V Top
5 V
4 V
3.5 V
3 V Bottom
3 V Bottom
3 V
5
0
0
0
1
2
3
4
5
0
1
2
3
4
5
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 10. Saturation Characteristics
Figure 9. Saturation Characteristics
www.onsemi.com
4
FDMC9430L−F085
TYPICAL CHARACTERISTICS
70
60
50
2.0
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
ID = 12 A
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
= 12 A
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
I
D
40
30
20
I
D
= 12 A
T = 150°C
J
V
GS
= 10 V
10
0
T = 25°C
J
1
2
3
4
5
6
7
8
9
10
−80
−40
0
40
80
120
160
V
GS
, GATE TO SOURCE VOLTAGE (V)
T , JUNCTION TEMPERATURE (°C)
J
Figure 12. Normalized RDS(on) vs. Junction
Temperature
Figure 11. RDS(on) vs. Gate Voltage
1.4
1.2
1.0
0.8
0.6
0.4
1.10
1.05
1.00
0.95
0.90
V
I
D
= V
DS
= 250 mA
I
= 1 mA
GS
D
−80
−40
0
40
80
120
160
−80
−40
0
40
80
120
160
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 13. Normalized Gate Threshold Voltage
vs. Temperature
Figure 14. Normalized Drain−to−Source
Breakdown Voltage vs. Junction Temperature
10000
10
I
D
= 12 A
V
= 20 V
8
6
4
2
0
DD
C
iss
1000
100
V
DD
= 24 V
C
oss
V
= 16 V
DD
C
rss
10
1
f = 1 MHz
V
GS
= 0 V
0.1
1
10
100
0
4
8
12
16
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Q , GATE CHARGE (nC)
g
Figure 16. Gate Charge vs. Gate−to−Source
Figure 15. Capacitance vs. Drain−to−Source
Voltage
Voltage
www.onsemi.com
5
FDMC9430L−F085
POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United
States and/or other countries.
www.onsemi.com
6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WDFN8 3x3, 0.65P
CASE 511DG
ISSUE A
DATE 12 FEB 2019
GENERIC
MARKING DIAGRAM*
XXXX
AYWWG
G
XXXX = Specific Device Code
A
Y
= Assembly Location
= Year
WW = Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13623G
WDFN8 3x3, 0.65P
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems
or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should
Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
ADDITIONAL INFORMATION
TECHNICAL PUBLICATIONS:
Technical Library: www.onsemi.com/design/resources/technical−documentation
onsemi Website: www.onsemi.com
ONLINE SUPPORT: www.onsemi.com/support
For additional information, please contact your local Sales Representative at
www.onsemi.com/support/sales
相关型号：
©2020 ICPDF网 联系我们和版权申明