NTNS3C68NZT5G [ONSEMI]
Small Signal MOSFET;NTNS3C68NZ
Small Signal MOSFET
12 V, 758 mA, Single N−Channel SOT−883
(XDFN3) 1.0 x 0.6 x 0.4 mm Package
Features
• Single N−Channel MOSFET
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MOSFET
• Ultra Low Profile SOT−883 (XDFN3) 1.0 x 0.6 x 0.4 mm for
Extremely Thin Environments such as Portable Electronics
• Low R
Solution in Ultra Small 1.0 x 0.6 mm Package
DS(on)
V
R
MAX
I MAX
D
(BR)DSS
DS(on)
• 1.8 V Gate Drive
0.160 W @ 4.5 V
0.175 W @ 3.7 V
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
12 V
0.185 W @ 3.3 V
0.230 W @ 2.5 V
0.440 W @ 1.8 V
758 mA
Applications
• Load Switch
• High Speed Interfacing
• Level Shift and Translate
• Optimized for Power Management in Ultra Portable Solutions
N−Channel MOSFET
D (3)
MAXIMUM RATINGS (T = 25°C unless otherwise stated)
J
Parameter
Drain-to-Source Voltage
Gate-to-Source Voltage
Symbol
Value
12
Units
V
G (1)
V
DSS
V
GS
8
V
Continuous Drain
Current (Note 1)
Steady
State
T = 25°C
I
758
547
898
156
mA
A
D
T = 85°C
A
t ≤ 5 s
T = 25°C
A
S (2)
Power Dissipa-
tion (Note 1)
Steady
State
T = 25°C
A
P
mW
D
MARKING
DIAGRAM
t ≤ 5 s
T = 25°C
219
2.2
A
3
SOT−883
(XDFN3)
CASE 506CB
Pulsed Drain Current
t = 10 ms
p
I
A
DM
AC M
Operating Junction and Storage
Temperature
T ,
-55 to
150
°C
1
J
2
T
STG
AC = Specific Device Code
= Date Code
Source Current (Body Diode) (Note 2)
I
223
260
mA
S
M
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
°C
L
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
†
Device
NTNS3C68NZT5G
Package
Shipping
THERMAL RESISTANCE RATINGS
SOT−883
(Pb−Free)
8000 /
Tape & Reel
Parameter
Symbol
Max
800
570
Units
Junction-to-Ambient – Steady State (Note 1)
Junction-to-Ambient – t ≤ 5 s (Note 1)
R
°C/W
θJA
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
R
θJA
1. Surface Mounted on FR4 Board using the minimum recommended pad size,
2
(or 2 mm ), 1 oz Cu.
2. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%.
© Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
June, 2016 − Rev. 0
NTNS3C68NZ/D
NTNS3C68NZ
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
OFF CHARACTERISTICS
Drain-to-Source Breakdown Voltage
V
V
GS
= 0 V, I = 250 mA
12
V
(BR)DSS
D
Drain-to-Source Breakdown Voltage
Temperature Coefficient
V
/T
J
I = 250 mA, ref to 25°C
D
11
mV/°C
(BR)DSS
Zero Gate Voltage Drain Current
I
V
= 0 V,
= 9.6 V
T = 25°C
1.0
10
mA
mA
DSS
GS
J
V
DS
Gate-to-Source Leakage Current
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
I
V
DS
= 0 V, V
= 10 V
GSS
GS
V
V
GS
= V , I = 250 mA
0.4
1.0
V
GS(TH)
DS
D
Negative Gate Threshold
Temperature Coefficient
V
/T
1.1
mV/°C
GS(TH)
J
Drain-to-Source On Resistance
R
W
V
= 4.5 V, I = 100 mA
0.120
0.130
0.135
0.167
0.250
0.44
0.160
0.175
0.185
0.230
0.440
DS(on)
GS
D
V
= 3.7 V, I = 75 mA
D
GS
GS
GS
GS
GS
DS
V
= 3.3 V, I = 75 mA
D
V
V
V
V
= 2.5 V, I = 50 mA
D
= 1.8 V, I = 20 mA
D
= 1.5 V, I = 10 mA
D
Forward Transconductance
Source−Drain Diode Voltage
CHARGES & CAPACITANCES
Input Capacitance
g
= 5 V, I = 100 mA
0.8
S
V
FS
D
V
SD
V
= 0 V, I = 100 mA
0.68
1.1
GS
S
pF
nC
C
67
19
ISS
V
= 0 V, f = 1 MHz,
GS
Output Capacitance
C
C
OSS
RSS
V
DS
= 9.6 V
Reverse Transfer Capacitance
Total Gate Charge
8.5
1.8
0.1
0.3
0.4
Q
G(TOT)
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Q
G(TH)
V
GS
= 4.5 V, V = 9.6 V,
DS
I
D
= 100 mA
Q
GS
GD
Q
SWITCHING CHARACTERISTICS, VGS = 4.5 V (Note 3)
ns
Turn-On Delay Time
Rise Time
t
10.7
19.4
710
310
d(ON)
t
r
V
= 4.5 V, V = 9.6 V,
DD
GS
I
D
= 100 mA, R = 2 W
G
Turn-Off Delay Time
Fall Time
t
d(OFF)
t
f
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Switching characteristics are independent of operating junction temperatures.
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2
NTNS3C68NZ
TYPICAL CHARACTERISTICS
1.20
1.12
1.04
0.96
0.88
0.80
0.72
0.64
0.56
0.48
0.40
0.32
0.24
0.16
0.08
0.00
1.2
V
= 2.0 V to 4.5 V
= 1.8 V
V
DS
= 10 V
GS
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
V
GS
V
= 1.5 V
GS
T = 125°C
J
T = 25°C
J
V
= 1.2 V
GS
0.1
0
T = −55°C
J
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
, GATE−TO−SOURCE VOLTAGE (V)
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
200
190
180
170
160
150
140
130
120
110
100
1000
900
T = 25°C
J
T = 25°C
J
I
D
= 5 A
800
700
600
500
V
= 1.5 V
GS
400
300
200
V
= 1.8 V
GS
V
V
= 2.5 V
= 4.5 V
GS
100
0
90
80
1.0
GS
2.0
3.0
4.0
5.0
6.0
7.0
8.0
0.1 0.2
0.3
0.4
0.5 0.6
0.7
0.8 0.9 1.0
V
GS
, GATE VOLTAGE (V)
I , DRAIN CURRENT (A)
D
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1.6
1.5
1.4
1000
100
V
= 4.5 V
= 0.075 A
GS
I
D
T = 125°C
J
1.3
1.2
1.1
1.0
0.9
0.8
10
1
T = 85°C
J
0.7
0.6
−50 −25
0.1
0
25
50
75
100
125
150
5
6
7
8
9
10
, DRAIN−TO−SOURCE VOLTAGE (V)
DS
11
12
T , JUNCTION TEMPERATURE (°C)
V
J
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
NTNS3C68NZ
TYPICAL CHARACTERISTICS
4.5
1000
100
V
= 0 V
GS
4.0
3.5
3.0
2.5
2.0
1.5
1.0
f = 1 MHz
T = 25°C
J
C
ISS
C
OSS
Q
Q
GS
GD
C
RSS
10
1
V
I
= 9.6 V
= 0.1 A
DS
0.5
0
D
T = 25°C
J
0
2
4
6
8
10
12
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Q , TOTAL GATE CHARGE (nC)
G
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
1
1000
t
d(off)
V
GS
= 0 V
t
f
V
V
= 4.5 V
= 9.6 V
GS
100
DS
I
D
= 0.1 A
t
t
r
T = 25°C
T = 125°C
T = −55°C
J
J
J
d(on)
0.1
0.4
10
1
10
R , GATE RESISTANCE (W)
100
0.5
0.6
0.7
0.8
0.9
1.0
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
10
1
100 ms
1 ms
0.1
0 V ≤ V ≤ 4.5 V
GS
Single Pulse
10 ms
dc
T = 25°C
A
T = 150°C
J
0.01
R
Limit
DS(on)
Thermal Limit
Package Limit
0.001
0.01
0.1
1
10
100
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
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4
NTNS3C68NZ
TYPICAL CHARACTERISTICS
1000
100
Duty Cycle = 0.5
0.2
0.1
0.05
0.02
0.01
10
1
Single Pulse
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
t, TIME (s)
Figure 12. FET Thermal Response
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5
NTNS3C68NZ
PACKAGE DIMENSIONS
SOT−883 (XDFN3), 1.0x0.6, 0.35P
CASE 506CB
ISSUE A
NOTES:
A B
D
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
PIN ONE
REFERENCE
2. CONTROLLING DIMENSION: MILLIMETERS.
3. EXPOSED COPPER ALLOWED AS SHOWN.
E
MILLIMETERS
0.10
0.10
C
C
DIM MIN
0.340 0.440
A1 0.000 0.030
MAX
A
TOP VIEW
b
D
D2
e
0.075 0.200
0.950 1.075
0.620 BSC
0.350 BSC
0.550 0.675
NOTE 3
A
C
0.10
0.10
C
E
E2 0.425 0.550
0.170 0.300
L
C
3X
A1
SIDE VIEW
SEATING
PLANE
RECOMMENDED
SOLDER FOOTPRINT*
1.10
D2
0.41
2X
0.43
1
0.55
E2
e/2
1
e
2X
PACKAGE
OUTLINE
0.20
3X
L
2X
b
DIMENSIONS: MILLIMETERS
M
M
0.10
0.05
C A B
C
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
BOTTOM VIEW
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NTNS3C68NZ/D
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