NVD4C05NT4G [ONSEMI]
单 N 沟道，功率 MOSFET，30V，90A，4.1mΩ;
| 型号： | NVD4C05NT4G |
| 厂家： | 
ONSEMI |
| 描述： | 单 N 沟道，功率 MOSFET，30V，90A，4.1mΩ |
| 文件： | 总7页 (文件大小：228K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NVD4C05N
MOSFET – Power, Single,
N-Channel
30 V, 4.1 mW, 90 A
Features
• Low R
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to Minimize Conduction Losses
DS(on)
• Low Q and Capacitance to Minimize Driver Losses
G
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
V
R
I
D
(BR)DSS
DS(on)
4.1 mW @ 10 V
6.0 mW @ 4.5 V
30 V
90 A
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
D
Parameter
Drain−to−Source Voltage
Symbol
Value
30
Unit
V
V
DSS
Gate−to−Source Voltage
V
GS
20
V
Continuous Drain
Current R
T
= 25°C
= 100°C
= 25°C
I
90
A
C
D
G
q
JC
T
C
64
(Notes 1 & 3)
Steady
State
S
Power Dissipation R
(Note 1)
T
C
P
57
W
A
q
D
JC
JA
N−CHANNEL MOSFET
T
C
= 100°C
28
Continuous Drain
Current R
T = 25°C
A
I
D
22
4
q
JA
T = 100°C
A
16
(Notes 1, 2 & 3)
Steady
State
2
1
Power Dissipation R
(Notes 1 & 2)
T = 25°C
A
P
3.5
1.7
395
W
q
D
3
T = 100°C
A
DPAK
Pulsed Drain Current
T = 25°C, t = 10 ms
I
DM
A
A
p
CASE 369C
STYLE 2
Operating Junction and Storage Temperature
T , T
−55 to
175
°C
J
stg
Source Current (Body Diode)
I
75
A
S
MARKING DIAGRAM
& PIN ASSIGNMENT
Single Pulse Drain−to−Source Avalanche
E
AS
133
mJ
Energy (T = 25°C, I
= 6.9 A)
J
L(pk)
4
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
260
°C
Drain
L
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS
2
Drain
1
3
Parameter
Symbol
Value
2.65
43
Unit
Gate Source
Junction−to−Case (Drain) (Note 1)
Junction−to−Ambient − Steady State (Note 2)
R
°C/W
q
JC
A
Y
= Assembly Location
= Year
R
q
JA
WW
= Work Week
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
4C05N = Device Code
G
2
= Pb−Free Package
2. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
June, 2019 − Rev. 1
NVD4C05N/D
NVD4C05N
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Parameter
OFF CHARACTERISTICS
Symbol
Test Condition
Min
Typ
Max
Unit
Drain−to−Source Breakdown Voltage
V
V
GS
= 0 V, I = 250 mA
30
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
/T
J
14.9
mV/°C
(BR)DSS
Zero Gate Voltage Drain Current
I
T = 25°C
1.0
10
mA
DSS
J
V
= 0 V,
= 24 V
GS
DS
V
T = 125°C
J
Gate−to−Source Leakage Current
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
I
V
V
= 0 V, V
=
20 V
100
nA
GSS
DS
GS
V
= V , I = 250 mA
1.3
2.2
V
GS(TH)
GS
DS
D
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
V
/T
4.7
3.4
4.5
98
mV/°C
mW
GS(TH)
J
R
V
= 10 V, I = 45 A
4.1
6.0
DS(on)
GS
D
V
GS
= 4.5 V, I = 45 A
D
Forward Transconductance
g
FS
V
= 2 V, I = 45 A
S
DS
D
CHARGES, CAPACITANCES AND GATE RESISTANCES
Input Capacitance
C
1970
725
30
pF
iss
V
= 0 V, f = 1.0 MHz,
DS
GS
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
C
oss
V
= 25 V
C
rss
Q
Q
V
GS
= 10 V, V = 24 V,
31
nC
nC
G(TOT)
DS
= 45 A
I
D
Total Gate Charge
14
3.3
6.2
3.2
3.1
1.0
G(TOT)
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Plateau Voltage
Q
G(TH)
V
GS
= 4.5 V, V = 24 V,
DS
Q
GS
GD
GP
I
D
= 45 A
Q
V
V
Gate Resistance
R
W
G
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
t
11
107
17
ns
d(on)
Rise Time
t
r
V
= 4.5 V, V = 24 V,
DS
GS
D
I
= 45 A, R = 0 W
G
Turn−Off Delay Time
t
d(off)
Fall Time
t
f
6.0
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
T = 25°C
0.9
0.8
41
21
20
26
1.2
V
SD
J
V
S
= 0 V,
GS
I
= 45 A
T = 125°C
J
Reverse Recovery Time
Charge Time
t
ns
RR
ta
V
GS
= 0 V, dIs/dt = 100 A/ms,
I
S
= 45 A
Discharge Time
tb
Reverse Recovery Charge
Q
nC
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.
5. Switching characteristics are independent of operating junction temperatures.
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2
NVD4C05N
TYPICAL CHARACTERISTICS
200
180
160
140
120
100
80
200
10 V
4.5 V
V
DS
= 2 V
180
160
140
120
100
80
4.0 V
3.5 V
3.0 V
60
60
T = 25°C
J
40
40
20
0
20
0
V
= 2.5 V
GS
T = 175°C
T = −55°C
J
J
0
1
2
3
4
5
0
1
2
3
4
5
6
7
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
10
9
10
9
I
= 45 A
D
T = 25°C
J
T = 25°C
J
V
GS
= 4.5 V
8
8
7
7
6
6
5
5
V
= 10 V
GS
4
3
4
3
3
4
5
6
7
8
9
10
0
20 40
60 80 100 120 140 160 180 200
I , DRAIN CURRENT (A)
V
, GATE−TO−SOURCE VOLTAGE (V)
GS
D
Figure 3. On−Resistance vs. Gate−to−Source
Figure 4. On−Resistance vs. Drain Current and
Voltage
Gate Voltage
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
100K
10K
1K
T = 175°C
J
I
V
= 45 A
D
= 10 V
GS
T = 150°C
J
T = 125°C
J
T = 100°C
J
100
10
T = 85°C
J
0.8
0.7
−50 −25
0
25
50
75 100 125 150 175
0
5
10
15
20
25
30
T , JUNCTION TEMPERATURE (°C)
J
V
, DRAIN−TO−SOURCE VOLTAGE (V)
DS
Figure 5. On−Resistance Variation with
Figure 6. Drain−to−Source Leakage Current
Temperature
vs. Voltage
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3
NVD4C05N
TYPICAL CHARACTERISTICS
11
10
10K
1K
Q
T
9
8
7
6
5
4
3
C
iss
C
oss
Q
gd
Q
gs
100
10
T = 25°C
GS
f = 1 MHz
V
DS
= 24 V
J
V
C
2
1
0
rss
= 0 V
I = 45 A
D
T = 25°C
J
0
5
10
15
20
25
30
0
5
10
15
20
25
30
35
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Q , TOTAL GATE CHARGE (nC)
g
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source vs. Total Charge
1000
100
10
1000
100
V
= 0 V
GS
t
t
r
T = 175°C
J
d(off)
t
d(on)
10
1
t
f
1
V
V
I
= 4.5 V
= 24 V
= 45 A
GS
DS
T = 25°C
T = −55°C
J
D
J
0.1
1
10
R , GATE RESISTANCE (W)
100
0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3
, SOURCE−TO−DRAIN VOLTAGE (V)
V
SD
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
100
10
10 ms
V
≤ 10 V
GS
0.5 ms
1 ms
Single Pulse
= 25°C
T
C
1
R
Limit
10 ms
DS(on)
Thermal Limit
Package Limit
0.1
0.1
1
10
100
1000
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
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4
NVD4C05N
TYPICAL CHARACTERISTICS
10
1
R
Steady State = 2.65°C/W
q
JC
Duty Cycle = 0.5
0.2
0.1
0.05
0.02
0.1
0.01
Single Pulse
0.01
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
t, TIME (s)
Figure 12. Thermal Impedance (Junction−to−Case)
100
10
1
T
= 25°C
J(initial)
T
= 125°C
J(initial)
0.1
1.00E−05
1.00E−04
1.00E−03
1.00E−02
TIME IN AVALANCHE (s)
Figure 13. Avalanche Characteristics
ORDERING INFORMATION
Order Number
†
Package
Shipping
NVD4C05NT4G
DPAK
(Pb−Free)
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
4
DPAK (SINGLE GAUGE)
CASE 369C
ISSUE G
2
1
DATE 31 MAY 2023
3
SCALE 1:1
GENERIC
MARKING DIAGRAM*
XXXXXXG
ALYWW
AYWW
XXX
XXXXXG
IC
Discrete
XXXXXX = Device Code
A
= Assembly Location
L
= Wafer Lot
STYLE 1:
STYLE 2:
PIN 1. GATE
2. DRAIN
STYLE 3:
STYLE 4:
STYLE 5:
Y
WW
G
= Year
= Work Week
= Pb−Free Package
PIN 1. BASE
PIN 1. ANODE
2. CATHODE
3. ANODE
PIN 1. CATHODE
2. ANODE
3. GATE
PIN 1. GATE
2. ANODE
3. CATHODE
4. ANODE
2. COLLECTOR
3. EMITTER
3. SOURCE
4. DRAIN
4. COLLECTOR
4. CATHODE
4. ANODE
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLE 6:
PIN 1. MT1
2. MT2
STYLE 7:
PIN 1. GATE
STYLE 8:
PIN 1. N/C
STYLE 9:
PIN 1. ANODE
2. CATHODE
STYLE 10:
PIN 1. CATHODE
2. ANODE
2. COLLECTOR
2. CATHODE
3. GATE
4. MT2
3. EMITTER
4. COLLECTOR
3. ANODE
4. CATHODE
3. RESISTOR ADJUST
4. CATHODE
3. CATHODE
4. ANODE
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON10527D
DPAK (SINGLE GAUGE)
PAGE 1 OF 1
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