PCFFS08120AF [ONSEMI]
SiC 二极管，1200V，8A，裸片;
| 型号： | PCFFS08120AF |
| 厂家： | 
ONSEMI |
| 描述： | SiC 二极管，1200V，8A，裸片 二极管 |
| 文件： | 总3页 (文件大小：72K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DIE DATA SHEET
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Silicon Carbide (SiC)
Schottky Diode – EliteSiC,
8 A, 1200 V, D1, Die
Anode
PCFFS08120AF
Description
SiC Schottky Diode has no switching loss, provides improved
system efficiency against Si diodes by utilizing new semiconductor
material − Silicon Carbide, enables higher operating frequency, and
helps increasing power density and reduction of system size/cost. Its
high reliability ensures robust operation during surge or over−voltage
conditions.
DIE LAYOUT
(Dimension: mm, Except S/L)
2040
Features
• Max Junction Temperature 175°C
• Avalanche Rated 80 mJ
• High Surge Current Capacity
• Positive Temperature Coefficient
• Ease of Paralleling
• No Reverse Recovery / No Forward Recovery
Applications
• General Purpose
• SMPS, Solar Inverter, UPS
• Power Switching Circuits
Passivation Information
• Passivation Material: Polyimide (PSPI)
• Passivation Type: Local Passivation
• Passivation Thickness: 90KA
Die Information
• Wafer Diameter: 6 inch
• Die Size: 2,120 x 2,120 mm (Include S/L)
CROSS SECTION
• Metallization
♦ Top: Ti / TiN / AI 4 mm
♦ Back: Ti/ NiV / Ag
• Die Thickness: Typ. 200 mm
• Bonding Pad Size
♦ Anode: 1,540 x 1,540 mm
• Recommended Wire Bond (Note 1)
♦ Anode: 15 mil x 1
NOTE:
1. Based on TO−247 package of onsemi
ORDERING INFORMATION
Part Number
Die Size
Package
2,120 x 2,120 mm
N/A
PCFFS08120AF
(Include S/L)
© Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
January, 2023 − Rev. 2
PCFFS08120AF/D
PCFFS08120AF
ELECTRICAL CHARACTERISTICS ON WAFER (T = 25°C unless otherwise noted)
C
Symbol
Parameter
Reverse Blocking Voltage
Forward Voltage
Test Condition
Min
1230
1.22
−
Typ
−
Max
−
Unit
V
V
R
I
= 200 mA, T = 25°C
R
C
V
F
I = 20 A, T = 25°C
−
1.723
200
V
F
C
I
R
Reverse Current
V
= 1230 V, T = 25°C
−
mA
R
C
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. Tested 100% on wafer
3. F: sawn−on−film frame packing based on wafer tested
For Additional Product Information and Electrical Characteristics on Package
Refer to the FFSH15120ADN−F155 product datasheet.
The Configuration of Chips (Based on 6 Inch Wafer)
chip
chip
Scribe Lane
PSPI Passivation Line
80.0 mm
chip
chip
Sawn−on−film frame packing based on tested wafer
Figure 1. The Configuration of Chips (Based on 6 Inch Wafer)
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2
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