RTQ2132B-QT [RICHTEK]
暂无描述;型号: | RTQ2132B-QT |
厂家: | RICHTEK TECHNOLOGY CORPORATION |
描述: | 暂无描述 |
文件: | 总28页 (文件大小:420K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
®
RTQ2132B-QT
1.2A, 36V, 2.1MHz Synchronous Step-Down Converter
General Description
Features
AEC-Q100 Grade 1 Qualified
Wide Input Voltage Range
3V to 36V
The RTQ2132B is a 1.2A, high-efficiency, current mode
synchronous step-down converter which is optimized for
automotive applications. The device operates with input
voltages from 3V to 36V and is protected from load dump
transients up to 42V, eases input surge protection design.
The device can program the output voltage between 0.8V
to VIN. The integrated low RDS(ON) power MOSFETs
achieves high efficiency over the wide load range. The peak
current mode control with simple external compensation
allows the use of small inductors and results in fast
transient response and good loop stability.
Tight Switching Frequency Variation 2.1MHz 10%
Over Operating Ambient Temperature
Wide Output Voltage Range : 0.8V to VIN
5V Fixed Output Voltage (see Ordering Information
for availability)
Maximum Output Current : 1.2A
Peak Current Mode Control
Integrated 200mΩ Switch and 160mΩ Synchronous
Rectifier
The RTQ2132B provides complete protection functions
such as input under-voltage lockout, output-under voltage
protection, over-current protection, and thermal shutdown.
Cycle-by-cycle current limit provides protection against
shorted outputs and soft-start eliminates input current
surge during start-up. The RTQ2132B is available in
TSSOP-14 (Exposed Pad) package.
Built-In Spread-Spectrum Frequency Modulation for
Low EMI
Externally Adjustable Soft-Start
Power Good Indication
Enable Control
0.8V 1.5% CV Reference Accuracy
Adjacent Pin-Short Protection
Built-In UVLO, UVP, OTP
Ordering Information
(-
)
RTQ2132B
-QT
Applications
Automotive Systems
Grade
QT : AEC-Q100 Qualified
Car Camera Module and Car Cockpit Systems
Connected Car Systems
Package Type
CP : TSSOP-14 (Exposed Pad-Option 2)
Lead Plating System
G : Green (Halogen Free and Pb Free)
Point of Load Regulator in Distributed Power Systems
Digital Set Top Boxes
Fixed Output Voltage
50 : 5V
Broadband Communications
Note :
Richtek products are :
Pin Configuration
(TOP VIEW)
RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
14
VIN
NC
BOOT
SW
NC
PGND
SS
VCC
PGOOD
EN
NC
FB/VS
COMP
AGND
2
3
4
5
6
7
13
12
11
10
9
Suitable for use in SnPb or Pb-free soldering processes.
PAD
15
8
TSSOP-14 (Exposed Pad)
Copyright 2018 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DSQ2132B-QT-01 August 2018
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1
RTQ2132B-QT
Marking Information
RTQ2132BGCP-QT
RTQ2132B-50GCP-QT
RTQ2132B50GCP-QT:ProductNumber
YMDNN:DateCode
RTQ2132BGCP-QT:ProductNumber
YMDNN:DateCode
RTQ2132B50
RTQ2132B
GCP-QTYMDNN
GCP-QTYMDNN
Functional Pin Description
Pin No.
Pin Name
Pin Function
Power input. The input voltage range is from 3V to 36V after soft-start is
finished. Connect input capacitors between this pin and PGND. It is
recommended to use a 2.2F, X7R and a 0.1F, X7R capacitors.
1
VIN
2, 5, 11
3
NC
No internal connection.
Bootstrap capacitor connection node to supply the high-side gate driver.
Connect a 0.1F, X7R ceramic capacitor between this pin and SW pin.
BOOT
Switch node. SW is the switching node that supplies power to the output and
connect the output LC filter from SW to the output load.
4
6
7
8
9
SW
PGND
SS
Power ground.
Soft-start capacitor connection node. Connect an external capacitor between
this pin and ground to set the soft-start time.
AGND
COMP
Analog ground.
Compensation node. Connect external compensation elements to this pin to
stabilize the control loop.
Output voltage sense. There are two output voltage setting options : one is
that trimmed output voltage options for a fixed output voltage are available for
the VS pin, and the other is through a resistive divider to sense the output
voltage at the FB pin. The feedback reference voltage is 0.8V typically.
10
FB/VS
Enable control input. A logic-high enables the converter; a logic-low forces
the device into shutdown mode.
12
13
EN
Open-drain power-good indication output. Once soft-start is finished,
PGOOD will be pulled low to ground if any internal protection is triggered.
PGOOD
Linear regulator output. VCC is the output of the internal 5V linear regulator
powered by VIN. Decouple with a 1F, X7R ceramic capacitor from VCC to
ground for normal operation.
14
VCC
Exposed pad. The exposed pad is internally unconnected and must be
soldered to a large PGND plane. Connect this PGND plane to other layers
with thermal vias to help dissipate heat from the device.
15 (Exposed Pad) PAD
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is a registered trademark of Richtek Technology Corporation.
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DSQ2132B-QT-01 August 2018
RTQ2132B-QT
Functional Block Diagram
Adjustable Output Voltage
VCC
VIN
PGOOD
-
EN
Enable
Threshold
Internal
Regulator
+
UVLO
Enable
Comparator
Current
Sense
BOOT
UVLO
+
BOOT
SW
PGOOD
Threshold
-
Logic &
Protection
Control
PGOOD
Power
Comparator
Stage &
Dead-time
Control
Fold-back
Control
HS Switch
Current
Comparator
Current
Sense
-
FB
LS Switch
Current
Comparator
+
0.8V
EA
+
VCC
PGND
I
Slope
Compensation
SS
Oscillator
AGND
6µA
SS
COMP
Fixed 5V Output Voltage
VCC
VIN
PGOOD
-
+
EN
Enable
Threshold
Internal
Regulator
UVLO
Enable
Comparator
Current
Sense
BOOT
UVLO
+
-
PGOOD
Threshold
BOOT
SW
Logic &
Protection
Control
PGOOD
Power
Stage &
Dead-time
Control
Comparator
Fold-back
Control
VS
HS Switch
Current
Comparator
Current
Sense
-
LS Switch
Current
Comparator
+
0.8V
EA
+
VCC
PGND
I
Slope
Compensation
SS
Oscillator
AGND
6µA
SS
COMP
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RTQ2132B-QT
Operation
Control Loop
VOUT + IOUT_MAX R
+ DCR
DS(ON)_L
V
The RTQ2132B is a high efficiency step down converter
utilizes the peak current mode control. An internal
oscillator initiates turn-on of the high-side MOSFET switch.
At the beginning of each clock cycle, the internal high-
side MOSFET switch turns on, allowing current to ramp-
up in the inductor. The inductor current is internally
monitored during each switching cycle. The output voltage
is sensed on the FB pin via the resistor divider, R1 and
R2, and compared with the internal reference voltage
(VREF) to generate a compensation signal (VCOMP) on the
COMP pin. A control signal derived from the inductor
current is compared to the voltage at the COMP pin,
derived from the feedback voltage. When the inductor
current reaches its threshold, the high-side MOSFET
switch is turned off and inductor current ramps-down. While
the high-side switch is off, inductor current is supplied
through the low-side MOSFET switch. This cycle repeats
at the next clock cycle. In this way, duty-cycle and output
voltage are controlled by regulating inductor current.
IN_MIN
1 tOFF_MIN fsw
+ IOUT_MAX RDS(ON)_H RDS(ON)_L
where the minimum off-time of the RTQ2132B is 65ns
(typically) ; RDS(ON)_H is the on resistance of the high-side
MOSFET switch; RDS(ON)_L is the on resistance of the
low-side MOSFET switch; DCR is the DC resistance of
inductor.
Maximum Duty Cycle Operation
The RTQ2132B is designed to operate in dropout at the
high duty cycle approaching 100%. If the operational duty
cycle is large and the required off time becomes smaller
than minimum off time, the RTQ2132B starts to enable
skip off time function and keeps high-side MOSFET switch
on continuously. The RTQ2132B implements skip off time
function to achieve high duty approaching 100%. Therefore,
the maximum output voltage is near the minimum input
supply voltage of the application. The input voltage at which
the devices enter dropout changes depending on the input
voltage, output voltage, switching frequency, load current,
and the efficiency of the design.
Input Voltage Range
The minimum on-time, tON_MIN, is the smallest duration of
time in which the high-side MOSFET switch can be in its
“on” state. Considering the minimum on-time, the allowed
maximum input voltage, VIN_MAX, is calculated by :
BOOT UVLO
The BOOT UVLO circuit is implemented to ensure a
sufficient voltage of BOOT capacitor for turning on the high-
side MOSFET switch at any condition. The BOOT UVLO
usually actives at extremely high conversion ratio. With
such conditions, the low-side MOSFET switch may not
have sufficient turn-on time to charge the BOOT capacitor.
The device monitors BOOT pin capacitor voltage and force
to turn on the low-side MOSFET switch when the BOOT
to SW voltage falls below VBOOT_UVLO_L (typically, 2.3V).
Meanwhile, the minimum off time is extended to 100ns
(typically) hence prolong the BOOT capacitor charging
time. The BOOT UVLO is sustained until the VBOOT−SW is
higher than VBOOT_UVLO_H (typically, 2.4V).
V
OUT
V
IN_MAX
t
f
ON_MIN SW
where the minimum on-time of the RTQ2132B is 60ns
(typically) ; fSW is the maximum operating frequency. The
maximum operating frequency of the RTQ2132B is
2.3MHz.
In contrast, the minimum off-time determines the allowed
minimum operating input voltage, VIN_MIN, tomaintain the
fixed frequency operation. The minimum off-time, tOFF_MIN
,
is the smallest amount of time that the RTQ2132B is
capable of turning on the low-side MOSFET switch, tripping
the current comparator and turning the MOSFET switch
back off. Below shows minimum off-time calculation that
considers the loss terms,
Internal Regulator
The device integrates a 5V linear regulator (VCC) that is
supplied by VINand provides power to the internal circuitry.
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DSQ2132B-QT-01 August 2018
RTQ2132B-QT
The internal regulator operates in low dropout mode when
VVIN is below 5V. The VCC can be used as the PGOOD
pull-up supply but it is “NOT” allowed to power other
device or circuitry. In many applications, a 1μF, X7R is
recommended and it needs to be placed as close as
possible to the VCC pin. Be careful to account for the
voltage coefficient of ceramic capacitors when choosing
the value and case size. Many ceramic capacitors lose
50% or more of their rated value when used near their
rated voltage.
the converter can have a monotonic smooth start-up. For
soft-start control, the SS pin should never be left
unconnected. After the SS pin voltage rises above 2V
(typically), the PGOODpin will be in high impedance and
VPGOOD will be held high. The typical start-up waveform
shown in Figure 1 indicate the sequence and timing
between the output voltage and related voltage.
VIN = 12V
VIN
VCC = 5V
VCC
Enable Control
The RTQ2132B provides an EN pin, as an external chip
enable control, to enable or disable the device. If VEN is
held below a logic-low threshold voltage (VIL), switching
is inhibited even if the VIN voltage is above VIN under-
voltage lockout threshold (VUVLO). If VEN is held below
0.4V, the converter will enter into shutdown mode, that
is, the converter is disabled. During shutdown mode, the
supply current can be reduced to ISHDN (lower than 10μA).
If the EN voltage rises above the logic-high threshold
EN
SS
0.4 x t
t
SS
0.2ms
SS
2V
90% x V
OUT
VOUT
PGOOD
Figure 1. Start-Up Sequence
Power Good Indication
voltage (VIH) while the VIN voltage is higher than VUVLO
,
the device will be turned on, that is, switching being enabled
and soft-start sequence being initiated. When VCC
exceeds 5V, the current source typically sinks 1.2μA for
VEN < 4V and up to 70μA for VEN > 4V.
The RTQ2132B features an open-drain power-good output
(PGOOD) to monitor the output voltage status. The output
delay of comparator prevents false flag operation for short
excursions in the output voltage, such as during line and
load transients. Pull-up PGOOD with a resistor to VCC or
an external voltage below 5.5V. The power-good function
is activated after soft start is finished and is controlled by
a comparator connected to the feedback signal VFB. If
Soft-Start
The soft-start function is used to prevent large inrush
currents while the converter is being powered up. The
RTQ2132B provides an SS pin so that the soft-start time
can be programmed by selecting the value of the external
soft-start capacitor CSS connected from the SS pin to
AGND. During the start-up sequence, the soft-start
capacitor is charged by an internal current source ISS
(typically, 6μA) to generate a soft-start ramp voltage as a
reference voltage to the PWM comparator. If the output is
for some reasons pre-biased to a certain voltage during
start-up, the device will not start switching until the voltage
difference between SS pin and FB pin is larger than 400mV
( i.e. VSS − VFB > 400mV, typically). And only when this
ramp voltage is higher than the feedback voltage VFB, the
switching will be resumed. The output voltage can then
ramp up smoothly to its targeted regulation voltage, and
VFB rises above a power-good high threshold (VTH_PGLH1
)
(typically 90% of the reference voltage), the PGOOD pin
will be in high impedance and VPGOOD will be held high
after a certain delay elapsed. When VFB fall short of power-
good low threshold (VTH_PGHL2) (typically 85% of the
reference voltage) or exceeds VTH_PGHL1 (typically 120%
of the reference voltage), the PGOOD pin will be pulled
low. For VFB higher than VTH_PGHL1, VPGOOD can be pulled
high again if VFB drops back by a power-good high
threshold (VTH_PGLH2) (typically 117% of the reference
voltage). Once being started-up, if any internal protection
is triggered, PGOODwill be pulled low toGND. The internal
open-drain pull-down device (1kΩ, typically) will pull the
Copyright 2018 Richtek Technology Corporation. All rights reserved.
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RTQ2132B-QT
PGOODpin low. The power good indication profile is shown
in Figure 2.
peak current-limit protection against the condition that
the inductor current increasing abnormally, even over the
inductor saturation current rating. The inductor current
through the high-side MOSFET switch will be measured
after a certain amount of delay when the high-side
MOSFET switch being turned on. If an over-current
condition occurs, the converter will immediately turn off
the high-side MOSFET switch and turn on the low-side
MOSFET switch to prevent the inductor current exceeding
the high-side MOSFET switch peak current limit (ILIM_H).
V
TH_PGHL1
V
TH_PGLH2
V
TH_PGLH1
V
TH_PGHL2
V
FB
Low-Side Switch Current-Limit Protection
V
PGOOD
The RTQ2132B not only implements the high-side switch
peak current limit but also provides the sourcing current
limit and sinking current limit for low-side MOSFET switch.
With these current protections, the IC can easily control
inductor current at both side switch and avoid current
runaway for short-circuit condition.
Figure 2. The Logic of PGOOD
Spread-Spectrum Operation
Due to the periodicity of the switching signals, the energy
concentrates in one particular frequency and also in its
harmonics. These levels or energy is radiated and therefore
this is where a potential EMI issue arises. The RTQ2132B
build-in spread-spectrum frequency modulation further
helping systems designers with better EMC management.
The spread spectrum can be active when soft-start is
finished. The spread-spectrum is implemented by a
pseudo random sequence and uses +6% spread of the
switching frequency, that is, the frequency will vary from
2.1MHz to 2.226MHz. Therefore, the RTQ2132B still
guarantees that the 2.1MHz switching frequency does not
drop into the AM band limit of 1.8MHz.
For the low-side MOSFET switch sourcing current limit,
there is a specific comparator in internal circuitry to
compare the low-side MOSFET switch sourcing current
to the low-side MOSFET switch sourcing current limit at
the end of every clock cycle. When the low-side MOSFET
switch sourcing current is higher than the low-side
MOSFET switch sourcing current limit (typically,1.6A),
the new switching cycle is not initiated until inductor
current drops below the low-side MOSFET switch sourcing
current limit.
For the low-side MOSFET switch sinking current limit
protection, it is implemented by detecting the voltage
across the low-side MOSFET switch. If the low-side
MOSFET switch sinking current exceeds the low-side
MOSFET switch sinking current limit (typically,1A), both
switches are off immediately, and it is held to stop
switching until the beginning of next cycle.
Input Under-Voltage Lockout
In addition to the EN pin, the RTQ2132B also provides
enable control through the VIN pin. If VEN rises above VIH
first, switching will still be inhibited until the VIN voltage
rises above VUVLO. It is to ensure that the internal regulator
is ready so that operation with not-fully-enhanced internal
MOSFET switches can be prevented. After the device is
powered up, if the VIN voltage goes below the UVLO falling
threshold voltage (VUVLO − ΔVUVLO), this switching will be
inhibited; if VIN voltage rises above the UVLO rising
threshold (VUVLO), the device will resume switching.
Output Under-Voltage Protection
The RTQ2132B includes output under-voltage protection
(UVP) against over-load or short-circuited condition by
constantly monitoring the feedback voltage (VFB). If VFB
drops below the under-voltage protection trip threshold
(typically 50% of the internal reference voltage), the UV
comparator will go high to turn off the internal high-side
and keep low-side MOSFET switch turn on until inductor
High-Side Switch Peak Current-Limit Protection
The RTQ2132B includes a cycle-by-cycle high-side switch
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DSQ2132B-QT-01 August 2018
RTQ2132B-QT
current drops to zero. If the output under-voltage condition
continues for a period of time, the RTQ2132B enters output
under-voltage protection with hiccup mode and discharges
the CSS. During hiccup mode, the device remains shut
down. After the SS pin voltage is discharged to less than
200mV (typically), the RT2132B attempts to re-start up
again. The high-side MOSFET switch will start switching
when voltage difference between SS pin and FB pin is
larger than 400mV (i.e. VSS − VFB > 400mV, typically). If
the fault condition is not removed, the high-side MOSFET
switch stop switching when the voltage difference between
SS pin and FB pin is 700mV (i.e. VSS − VFB = 700mV,
typically). Upon completion of the soft-start sequence, if
the fault condition is removed, the converter will resume
normal operation; otherwise, such cycle for auto-recovery
will be repeated until the fault condition is cleared. Hiccup
mode allows the circuit to operate safely with low input
current and power dissipation, and then resume normal
operation as soon as the over-load or short-circuit
condition is removed. A short circuit protection and
recovery profile is shown in Figure 3.
Over-Temperature Protection
The RTQ2132B includes an over temperature protection
(OTP) circuitry to prevent overheating due to excessive
power dissipation. The OTP will shut down switching
operation when junction temperature exceeds a thermal
shutdown threshold TSD. Once the junction temperature
cools down by a thermal shutdown hysteresis (ΔTSD), the
IC will resume normal operation with a complete soft-start.
Pin-Short Protection
The RTQ2132B provides pin-short protection for neighbor
pins. The internal protection fuse will be burned out to
prevent IC smoke, fire and spark when BOOT pin is
shorted to VIN pin. The hiccup mode protection will be
triggered to avoid IC burn-out when SW pin is shorted to
ground during internal high-side MOSFET turns on.
Short
Removed
Output Short
VOUT
2V/DIV
VPGOOD
4V/DIV
VSS, 4V/DIV
ISW, 1A/DIV
Figure 3. Short Circuit Protection and Recovery
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RTQ2132B-QT
Absolute Maximum Ratings (Note 1)
Supply Input Voltage, VIN ---------------------------------------------------------------------------------------- −0.3V to 42V
Switch Voltage, SW ----------------------------------------------------------------------------------------------- −0.3V to 42V
<100ns ---------------------------------------------------------------------------------------------------------------- −5V to 46.3V
BOOT to SW, VBOOT − VSW -------------------------------------------------------------------------------------- −0.3V to 6V
EN, PGOOD,SS Voltage, EN, PGOOD, SS----------------------------------------------------------------- −0.3V to 42V
Other Pins------------------------------------------------------------------------------------------------------------ −0.3V to 6V
Power Dissipation, PD @ TA = 25°C
TSSOP-14 (Exposed Pad) (Option 2) ------------------------------------------------------------------------- 4.17W
Package Thermal Resistance (Note 2)
TSSOP-14 (Exposed Pad) (Option 2), θJA -------------------------------------------------------------------- 30°C/W
TSSOP-14 (Exposed Pad) (Option 2), θJC ------------------------------------------------------------------- 7.5°C/W
Junction Temperature ---------------------------------------------------------------------------------------------- 150°C
Lead Temperature (Soldering, 10 sec.)------------------------------------------------------------------------ 260°C
Storage Temperature Range ------------------------------------------------------------------------------------- −65°C to 150°C
ESD Susceptibility (Note 3)
HBM (Human Body Model)--------------------------------------------------------------------------------------- 2kV
Recommended Operating Conditions (Note 4)
Supply Voltage ------------------------------------------------------------------------------------------------------ 3V to 36V
Output Voltage ------------------------------------------------------------------------------------------------------ 0.8V to VIN
Junction Temperature Range------------------------------------------------------------------------------------- −40°C to 150°C
Ambient Temperature Range------------------------------------------------------------------------------------- −40°C to 125°C
Electrical Characteristics
(VIN = 12V, TA = TJ = −40°C to 125°C, unless otherwise specified)
Parameter
Supply Voltage
Symbol
Test Conditions
Min
Typ
Max
Unit
Input Operating Voltage
VIN
3
--
36
3
V
V
Under-Voltage Lockout
Threshold
VUVLO
VIN rising
VEN = 0V
2.8
2.9
Under-Voltage Lockout
Threshold Hysteresis
VUVLO
--
200
mV
Shutdown Current
Quiescent Current
Enable Voltage
ISHDN
IQ
--
--
--
10
A
VEN = 2V, not switching
1.1
1.3
mA
VIH
VIL
VEN rising
VEN falling
1.3
1.1
1.45
1.25
1.6
1.4
Enable Threshold Voltage
V
Output Voltage
Output Voltage Sense
(Note5)
VS
VS = 5V
4.9
5
5.1
V
V
Reference Voltage
VREF
3V VIN 36V
0.788
0.8
0.812
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DSQ2132B-QT-01 August 2018
RTQ2132B-QT
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Current Limit
High-Side Switch
Current Limit
VBOOT – VSW = 4.8V, minimum duty
cycle
ILIM_H
Isr_L
Isk_L
1.53
1.36
--
1.8
1.6
1
2.07
1.84
--
A
A
A
Low-Side Switch
Sourcing Current Limit
From source to drain
From drain to source
Low-Side Switch
Sinking Current Limit
Switching
Switching Frequency
Minimum On-Time
Internal MOSFET
fSW
1890 2100 2310
kHz
ns
tON_MIN
--
60
80
High-Side On-
Resistance
RDS(ON)_H
RDS(ON)_L
--
--
200
160
360
288
m
A
Low-Side On-
Resistance
Soft-Start
Soft-Start Internal
Charging Current
ISS
4.8
6
7.2
Error Amplifier
Error Amplifier Trans-
Conductance
gm
10A < ICOMP < 10A
665
0.9
950
1.2
1235
1.5
A/V
COMP to Current
Sense Trans-
Conductance
gm_CS
A/V
Over-Temperature Protection
Thermal Shutdown
TSD
--
--
175
15
--
--
°C
Thermal Shutdown
Hysteresis
TSD
Power-Good
VTH_PGLH1
VTH_PGHL1
VTH_PGHL2
VTH_PGLH2
VFB rising, PGOOD from low to high
VFB rising, PGOOD from high to low
VFB falling, PGOOD from high to low
VFB falling, PGOOD from low to high
85
--
90
120
85
95
--
Power-Good Rising
Threshold
%VREF
%VREF
80
--
90
--
Power-Good Falling
Threshold
117
Power-Good Leakage
Current
PGOOD signal good, VFB = VREF
,
--
--
--
0.5
0.3
A
VPGOOD = 5.5V
Power-Good Sink
Current Capability
PGOOD signal fault, IPGOOD sinks
0.2mA
---
V
Spread Spectrum
Spread-Spectrum
Rang
SS
--
+6
--
%
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RTQ2132B-QT
Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation of the device at these or any other conditions beyond those
indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions may affect device reliability.
Note 2. θJA is measured under natural convection (still air) at TA = 25°C with the component mounted on a high effective-
thermal-conductivity four-layer test board on a JEDEC 51-7 thermal measurement standard. The first layer is filled with
copper. θJC is measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. There are two output voltage setting options : one is that trimmed output voltage options for a fixed output voltage are
available for the VS pin, and the other is through a resistive divider to sense the output voltage at the FB pin.
Copyright 2018 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
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10
DSQ2132B-QT-01 August 2018
RTQ2132B-QT
Typical Application Circuit
Adjustable Output Voltage
C4
0.1µF
RTQ2132B
1
3
4
V
IN
L1
4.7µH
VIN
BOOT
7V to 25V
V
OUT
C1
2.2µF
C2
0.1µF
SW
FB
5V
1.2A
C6
10µF
C5
10µF
R3
105k
10
12
13
EN
R4
20k
9
7
PGOOD
COMP
SS
R1
100k
R2
C
37.4k
C7
COMP2
14
C8
0.1µF
VCC
(Option)
C3
1µF
15
1.5nF
PAD
PGND
6
AGND
8
C1 = GCM31CR71H225KA
L1 = WE-74437336047
C5/C6 = GRM31CR71E106KA
C4
0.1µF
RTQ2132B
1
3
4
V
IN
L1
10µH
VIN
BOOT
SW
16V to 36V
V
OUT
C1
2.2µF
C2
0.1µF
12V
1.2A
C6
10µF
C5
10µF
R3
280k
10
12
13
FB
EN
R4
9
7
PGOOD
COMP
SS
20k
R1
R2
100k
C
48.7k
C7
COMP2
14
C8
0.1µF
VCC
(Option)
C3
1µF
15
1.5nF
PAD
PGND
6
AGND
8
C1 = GCM31CR71H225KA
L1 =WE-74437336100
C5/C6 = GRM31CR71E106KA
Fixed 5V Output Voltage
C4
0.1µF
RTQ2132B
1
3
4
V
IN
L1
4.7µH
VIN
BOOT
SW
7V to 25V
V
OUT
C1
2.2µF
C2
0.1µF
5V
1.2A
C6
10µF
C5
10µF
10
12
13
VS
EN
9
7
PGOOD
COMP
SS
R1
R2
37.4k
100k
C
COMP2
14
C8
0.1µF
VCC
(Option)
C7
1.5nF
15
C3
1µF
PAD
AGND PGND
C1 = GCM31CR71H225KA
L1 = WE-74437336047
8
6
C5/C6 = GRM31CR71E106KA
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RTQ2132B-QT
Typical Operating Characteristics
Efficiency vs. Output Current
Efficiency vs. Output Current
100
100
90
80
70
60
50
40
30
20
10
0
90
80
VIN = 12V
VIN = 12V
VIN = 18V
70
60
VIN = 24V
50
40
30
20
10
VOUT = 3.3V, L = WE-74437336033-3.3μH
VOUT = 5V, L = WE-74437336047-4.7μH
0.4 0.6 0.8 1.2
0
0
0
0
0.2
0.4
0.6
0.8
1
1.2
0
0
0
0.2
1
Output Current (A)
Output Current (A)
Efficiency vs. Output Current
Output Voltage vs. Output Current
100
90
80
70
60
50
40
30
20
10
0
3.40
3.35
3.30
3.25
3.20
VIN = 24V
VIN = 36V
VIN = 12V, VOUT = 3.3V
VOUT = 12V, L = WE-74437336100-10μH
0.4 0.6 0.8
0.2
1
1.2
0.2
0.4
0.6
0.8
1
1.2
Output Current (A)
Output Current (A)
Output Voltage vs. Output Current
Output Voltage vs. Output Current
5.15
5.10
5.05
5.00
4.95
4.90
4.85
12.4
12.3
12.2
12.1
12.0
11.9
11.8
11.7
11.6
VIN = 24V, VOUT = 12V
0.8 1.2
VIN = 12V, VOUT = 5V
0.2
0.4
0.6
0.8
1
1.2
0.2
0.4
0.6
1
Output Current (A)
Output Current (A)
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RTQ2132B-QT
Output Voltage vs. Input Voltage
Output Voltage vs. Input Voltage
5.15
5.10
5.05
5.00
4.95
4.90
4.85
12.4
12.3
12.2
12.1
12.0
11.9
11.8
11.7
11.6
VIN = 5.5V to 36V, IOUT = 1.2A
VIN = 12.5V to 36V, IOUT = 1.2A
4
8
12
16
20
24
28
32
36
12
-50
-50
16
20
24
28
32
36
Input Voltage (V)
Input Voltage (V)
UVLO Threshold vs. Temperature
EN Threshold vs. Temperature
3.1
3.0
2.9
2.8
2.7
2.6
2.0
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
Rising
Falling
EN_H
EN_L
VOUT = 1V
VOUT = 1V
100 125
-50
-25
0
25
50
75
100
125
-25
0
25
50
75
Temperature (°C)
Temperature (°C)
Output Voltage vs. Temperature
Current Limit vs. Temperature
5.15
5.10
5.05
5.00
4.95
4.90
4.85
2.5
2.3
2.1
1.9
1.7
1.5
1.3
VIN = 12V
100 125
VIN = 12V, VOUT = 5V, L = 4.7μH
25 50 75 100 125
-50
-25
0
25
50
75
-25
0
Temperature (°C)
Temperature (°C)
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RTQ2132B-QT
Shutdown Current vs. Temperature
Switching Frequency vs. Temperature
2340
2290
2240
2190
2140
2090
2040
1990
1940
1890
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
VIN = 12V, VOUT = 5V, IOUT = 0.5A
0 25 50 75 100 125
VIN = 12V
-50
-25
0
25
50
75
100
125
-50
-25
Temperature (°C)
Temperature (°C)
Load Transient Response
Load Transient Response
VOUT
(100mV/Div)
VOUT
(100mV/Div)
VIN = 12V, VOUT = 3.3V,
IOUT = 0 to 1.2A, TR = TF = 1μs
VIN = 12V, VOUT = 5V,
IOUT = 0 to 1.2A, TR = TF = 1μs
IOUT
(500mA/Div)
IOUT
(500mA/Div)
Time (200μs/Div)
Time (200μs/Div)
Power On from EN
Output Ripple Voltage
VIN = 12V, VOUT = 5V,
I
OUT = 1.2A, CSS = 0.1μF
VOUT
(10mV/Div)
VOUT
(5V/Div)
VIN = 12V, VOUT = 5V,
IOUT = 1.2A
VSW
(10V/Div)
VPGOOD
(5V/Div)
VEN
(3V/Div)
VSW
(5V/Div)
Time (10ms/Div)
Time (500ns/Div)
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DSQ2132B-QT-01 August 2018
RTQ2132B-QT
Power Off from EN
Power On from VIN
VIN = 12V, VOUT = 5V,
VIN = 12V, VOUT = 5V,
IOUT = 1.2A, CSS = 0.1μF
I
OUT = 1.2A, CSS = 0.1μF
VOUT
(5V/Div)
VOUT
(5V/Div)
VSW
VSW
(10V/Div)
(10V/Div)
VPGOOD
(5V/Div)
VPGOOD
(3V/Div)
VEN
(3V/Div)
VIN
(5V/Div)
Time (2ms/Div)
Time (5ms/Div)
Power Off from VIN
Starting Profile III (Cold cranking)
VIN
(5V/Div)
VIN = 12V, VOUT = 5V,
IOUT = 1.2A, CSS = 0.1μF
VOUT
(5V/Div)
VOUT
(1V/Div)
VSW
(10V/Div)
VSW
VPGOOD
(3V/Div)
VPGOOD
(2V/Div)
VPGOOD
VIN
(5V/Div)
VOUT = 5V, RLOAD = 5Ω with external
bootstrap diode
Time (200ms/Div)
Time (2ms/Div)
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RTQ2132B-QT
Application Information
Ageneral RTQ2132B application circuit is shown in typical
application circuit section. External component selection
is largely driven by the load requirement. First of all, the
inductor L is chosen. Then the input capacitor CIN and the
output capacitor COUT can be decided. Next, feedback
resistors and compensation circuit are selected to set
the desired output voltage and crossover frequency.After
that, the internal regulator capacitor CVCC, and the bootstrap
capacitor CBOOT can be selected. Finally, the remaining
external components can be selected for functions such
as the EN, external soft-start and PGOOD.
having the lowest possible DC resistance that fits in the
allotted dimensions. The inductor selected should have a
saturation current rating greater than the peak current limit
of the device. The core must be large enough not to
saturate at the peak inductor current (IL_PEAK) :
V
OUT
(V V
OUT
)
IN
I =
L
V f
L
IN SW
1
2
IL_PEAK = IOUT_MAX
+
IL
The current flowing through the inductor is the inductor
ripple current plus the output current. During power up,
faults or transient load conditions, the inductor current
can increase above the calculated peak inductor current
level calculated above. In transient conditions, the inductor
current can increase up to the high-side switch peak
current limit of the device. For this reason, the most
conservative approach is to specify an inductor with a
saturation current rating equal to or greater than the high-
side switch peak current limit rather than the peak inductor
current. It is recommended to use shielded inductors for
good EMI performance.
Inductor Selection
The inductor selection trade-offs among size, cost,
efficiency, and transient response requirements.Generally,
three key inductor parameters are specified for operation
with the device : inductance value (L), inductor saturation
current (ISAT), andDC resistance (DCR).
Agood compromise between size and loss is a 30% peak-
to-peak ripple current to the IC rated current. The switching
frequency, input voltage, output voltage, and selected
inductor ripple current determines the inductor value as
follows :
Input Capacitor Selection
Input capacitor, CIN, is needed to filter the pulsating current
at the drain of the high-side MOSFET switch. CIN should
be sized to do this without causing a large variation in
input voltage. The peak-to-peak voltage ripple on input
capacitor can be estimated as equation below :
1D
V
(V V
)
OUT
IN
OUT
L =
V f
I
IN SW
L
Larger inductance values result in lower output ripple
voltage and higher efficiency, but a slightly degraded
transient response. This result in additional phase lag in
the loop and reduce the crossover frequency. As the ratio
of the slope-compensation ramp to the sensed-current
ramp increases, the current-mode system tilts towards
voltage-mode control. Lower inductance values allow for
smaller case size, but the increased ripple lowers the
effective current limit threshold, increases the AC losses
in the inductor and may trigger low-side switch sinking
current limit at FPWM. It also causes insufficient slope
compensation and ultimately loop instability as duty cycle
approaches or exceeds 50%. Agood compromise among
size, efficiency, and transient response can be achieved
by setting an inductor current ripple (ΔIL) with about 10%
to 50% of the maximum rated output current (1.2A).
V
= DI
+ ESRI
OUT
CIN
OUT
C
f
IN SW
where
D =
V
OUT
V
IN
Figure 4 shows the CIN ripple current flowing through the
input capacitors and the resulting voltage ripple across
the capacitors. For ceramic capacitors, the equivalent
series resistance (ESR) is very low, the ripple which is
caused by ESR can be ignored, and the minimum value
of effective input capacitance can be estimated as equation
below :
D 1D
C
IN_MIN
= I
OUT_MAX
V
f
CIN_MAX SW
To enhance the efficiency, choose a low-loss inductor
Where VCIN_MAX 200mV
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DSQ2132B-QT-01 August 2018
RTQ2132B-QT
the low ESR ceramic input capacitor in parallel with a
bulk capacitor with higher ESR to damp the voltage ringing.
V
CIN
C
Ripple Voltage
IN
The input capacitor should be placed as close as possible
to the VIN pin, with a low inductance connection to the
PGND of the IC. It is recommended to connect a 2.2μF,
X7R capacitor between VINpin to PGNDpin. For filtering
high frequency noise, additional small capacitor 0.1μF
should be placed close to the part and the capacitor should
be 0402 or 0603 in size. X7R capacitors are recommended
for best performance across temperature and input voltage
variations.
V
= I
OUT
x ESR
ESR
(1-D) x I
D x I
OUT
C
Ripple Current
IN
OUT
D x t
SW (1-D) x tSW
Figure 4. CIN Ripple Voltage and Ripple Current
In addition, the input capacitor needs to have a very low
ESR and must be rated to handle the worst-case RMS
input current. The RMS ripple current (IRMS) of the regulator
can be determined by the input voltage (VIN), output voltage
(VOUT), and rated output current (IOUT) as the following
equation :
Output Capacitor Selection
The selection of COUT is determined by considering to
satisfy the voltage ripple and the transient loads. The peak-
to-peak output ripple, ΔVOUT, is determined by :
I
L
V
=
+ I ESR
L
OUT
8C
f
OUT SW
V
V
V
IN
V
OUT
OUT
Where the ΔIL is the peak-to-peak inductor ripple current.
The output ripple is highest at maximum input voltage
since ΔIL increases with input voltage. Multiple capacitors
placed in parallel may be needed to meet the ESR and
RMS current handling requirements.
I
I
1
RMS
OUT_MAX
IN
From the above, the maximum RMS input ripple current
occurs at maximum output load, which will be used as
the requirements to consider the current capabilities of
the input capacitors. The maximum ripple voltage usually
occurs at 50% duty cycle, that is, VIN = 2 x VOUT. It is
commonly to use the worse IRMS ≅ 0.5 x IOUT_MAX at VIN =
2 x VOUT for design. Note that ripple current ratings from
capacitor manufacturers are often based on only 2000
hours of life which makes it advisable to further de-rate
the capacitor, or choose a capacitor rated at a higher
temperature than required.
Regarding to the transient loads, the VSAG and VSOAR
requirement should be taken into consideration for
choosing the effective output capacitance value. The
amount of output sag/soar is a function of the crossover
frequency factor at PWM, which can be calculated from
below.
IOUT
2 COUT fC
VSAG = VSOAR
=
Several capacitors may also be paralleled to meet size,
height and thermal requirements in the design. For low
input voltage applications, sufficient bulk input capacitance
is needed to minimize transient effects during output load
changes. Ceramic capacitors are ideal for witching
regulator applications due to its small, robust and very
low ESR. However, care must be taken when these
capacitors are used at the input.Aceramic input capacitor
combined with trace or cable inductance forms a high
quality (under damped) tank circuit. If the RTQ2132B
circuit is plugged into a live supply, the input voltage can
ring to twice its nominal value, possibly exceeding the
device's rating. This situation is easily avoided by placing
Ceramic capacitors have very low equivalent series
resistance (ESR) and provide the best ripple performance.
The recommended dielectric type of the capacitor is X7R
best performance across temperature and input voltage
variations. The variation of the capacitance value with
temperature, DC bias voltage and switching frequency
needs to be taken into consideration. For example, the
capacitance value of a capacitor decreases as theDC bias
across the capacitor increases. Be careful to consider the
voltage coefficient of ceramic capacitors when choosing
the value and case size. Most ceramic capacitors lose
50% or more of their rated value when used near their
rated voltage.
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RTQ2132B-QT
Transient performance can be improved with a higher value
of output capacitor. Increasing the output capacitance will
also decrease the output voltage ripple.
any capacitor type or value. The external compensation
also allows the user to set the crossover frequency and
optimize the transient performance of the device. Around
the crossover frequency the peak current mode control
(PCMC) equivalent circuit of Buck converter can be
simplified as shown in Figure 7. The method presented
here is easy to calculate and ignores the effects of the
slope compensation that is internal to the device. Since
the slope compensation is ignored, the actual cross over
frequency will usually be lower than the crossover
frequency used in the calculations. It is always necessary
to make a measurement before releasing the design for
final production. Though the models of power supplies
are theoretically correct, they cannot take full account of
circuit parasitic and component nonlinearity, such as the
ESR variations of output capacitors, then on linearity of
inductors and capacitors, etc.Also, circuit PCB noise and
limited measurement accuracy may also cause
measurement errors.ABode plot is ideally measured with
a network analyzer while Richtek application noteAN038
provides an alternative way to check the stability quickly
and easily.Generally, follow the following steps to calculate
the compensation components :
Output Voltage Programming
The output voltage can be programmed by a resistive divider
from the output to ground with the midpoint connected to
the FB pin. The resistive divider allows the FB pin to sense
a fraction of the output voltage as shown in Figure 5. The
output voltage is set according to the following equation :
R1
R2
VOUT = VREF 1 +
where the reference voltage, VREF, is 0.8V (typically).
V
OUT
R1
FB
RTQ2132B
GND
R2
Figure 5. Output Voltage Setting
The placement of the resistive divider should be within
5mm of the FB pin. The resistance of R2 is not larger than
170kΩ for noise immunity consideration. The resistance
of R1 can then be obtained as below :
1. Set up the crossover frequency, fC. For stability
purposes, our target is to have a loop gain slope that
is −20dB/decade from a very low frequency to beyond
the crossover frequency. Do “NOT” design the
crossover frequency over 90kHz with the RTQ2132B.
For dynamic purposes, the higher the bandwidth, the
faster the load transient response. The downside to
high bandwidth is that it increases the regulators
susceptibility to board noise which ultimately leads to
excessive falling edge jitter of the switch node voltage.
R2(V
V
REF
)
OUT
REF
R1 =
V
For better output voltage accuracy, the divider resistors
(R1 and R2) with 1% tolerance or better should be used.
Compensation Network Design
The purpose of loop compensation is to ensure stable
operation while maximizing the dynamic performance.An
undercompensated system may result in unstable
operations. Typical symptoms of an unstable power supply
include: audible noise from the magnetic components or
ceramic capacitors, jittering in the switching waveforms,
oscillation of output voltage, overheating of power
MOSFETs and so on.
2. RCOMP can be determined by :
2 fC VOUT COUT 2 fC COUT
RCOMP
=
=
gm VREF gm_CS
gmgm_CS
R1 + R2
R2
where
gm is the error amplifier gain of trans-conductance (950
In most cases, the peak current mode control architecture
used in the RTQ2132B only requires two external
components to achieve a stable design as shown in Figure
6. The compensation can be selected to accommodate
μA/V)
gm_cs is COMP to current sense (1.2 A/V)
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RTQ2132B-QT
3. A compensation zero can be placed at or before the
dominant pole of buck which is provided by output
capacitor and maximum output loading (RL). Calculate
Internal Regulator
The device integrates a 5V linear regulator (VCC) that is
supplied by VINand provides power to the internal circuitry.
The internal regulator operates in low dropout mode when
VIN voltage is below 5V. The VCC can be used as the
PGOOD pull-up supply but it is “NOT” allowed to power
other device or circuitry. In many applications, a 1μF, X7R
is recommended and it needs to be placed as close as
possible to the VCC pin. Be careful to account for the
voltage coefficient of ceramic capacitors when choosing
the value and case size. Many ceramic capacitors lose
50% or more of their rated value when used near their
rated voltage.
CCOMP
:
R C
L
OUT
C
COMP
=
R
COMP
4. The compensation pole is set to the frequency at the
ESR zero or 1/2 of the operating frequency. Output
capacitor and its ESR provide a zero and optional CCOMP2
can be used to cancel this zero
R
C
COMP
ESR
R
OUT
C
COMP2
=
If 1/2 of the operating frequency is lower than the ESR
zero, the compensation pole is set at 1/2 of the operating
frequency.
1
Bootstrap Driver Supply
CCOMP2
=
The bootstrap capacitor (CBOOT) between BOOT pin and
SW pin is used to create a voltage rail above the applied
input voltage, VIN. Specifically, the bootstrap capacitor is
charged through an internal diode to a voltage equal to
approximately VVCC each time the low-side switch is turned
on. The charge on this capacitor is then used to supply
the required current during the remainder of the switching
cycle. For most applications a 0.1μF, 0603 ceramic
capacitor with X7R is recommended and the capacitor
should have a 6.3 V or higher voltage rating.
fsw
2
2
RCOMP
Note : Generally, CCOMP2 is an optional component to be
used to enhance noise immunity.
COMP
R
COMP
C
COMP2
RTQ2132B
(Option)
C
COMP
GND
External Bootstrap Diode
Figure 6. External Compensation Components
It is recommended to add an external bootstrap diode
between an external 5V voltage supply and the BOOT pin
to improve enhancement of the high-side switch and
improve efficiency when the input voltage is below 5.5V,
the recommended application circuit is shown in Figure
8. The bootstrap diode can be a low-cost one, such as
1N4148 or BAT54. The external 5V can be a fixed 5V
voltage supply from the system, or a 5V output voltage
generated by the RTQ2132B.Note that the VBOOT−SW must
be lower than 5.5V.
V
OUT
R
ESR
gm_cs
R
L
C
OUT
R1
R2
V
FB
V
-
COMP
EA
+
V
REF
C
R
COMP2
COMP
(option)
C
COMP
Figure 7. Simplified Equivalent Circuit of Buck with
PCMC
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RTQ2132B-QT
5V
5V
D
BOOT
D
BOOT
R
BOOT
BOOT
SW
BOOT
RTQ2132B
SW
C
BOOT
RTQ2132B
C
0.1µF
BOOT
Figure 10. External Bootstrap Diode and Resistor at the
BOOT Pin
Figure 8. External Bootstrap Diode
External Bootstrap Resistor (Option)
EN Pin for Start-Up and Shutdown Operation
The gate driver of an internal power MOSFET, utilized as
a high-side switch, is optimized for turning on the switch
not only fast enough for reducing switching power loss,
but also slow enough for minimizing EMI. The EMI issue
is worse when the switch is turned on rapidly due to high
di/dt noises induced. When the high-side switch is being
turned off, the SW node will be discharged relatively slowly
by the inductor current due to the presence of the dead
time when both the high-side and low-side switches are
turned off.
For automatic start-up, the EN pin, with high-voltage rating,
can be connected to the input supply VIN directly. The
large built-in hysteresis band makes the ENpin useful for
simple delay and timing circuits. The EN pin can be
externally connected to VIN by adding a resistor REN and
a capacitor CEN, as shown in Figure 11, to have an
additional delay. The time delay can be calculated with
the EN's internal threshold, at which switching operation
begins (typically 1.25V).
An external MOSFET can be added for the EN pin to be
logic-controlled, as shown in Figure 12. In this case, a
pull-up resistor, REN, is connected between VIN and the
EN pin. The MOSFET Q1 will be under logic control to
pull down the ENpin. To prevent the device being enabled
when VIN is smaller than the VOUT target level or some
other desired voltage level, a resistive divider (REN1 and
REN2) can be used to externally set the input under-voltage
lockout threshold, as shown in Figure 13.
In some cases, it is desirable to reduce EMI further, even
at the expense of some additional power dissipation. The
turn-on rate of the high-side switch can be slowed by
placing a small bootstrap resistor RBOOT between the
BOOT pin and the external bootstrap capacitor as shown
in Figure 9. The recommended range for the RBOOT is
several ohms to 10 ohms and it could be 0402 or 0603 in
size.
This will slow down the rates of the high-side switch turn-
on and the rise of VSW. In order to improve EMI performance
and enhancement of the internal MOSFET switch, the
recommended application circuit is shown in Figure 10,
which includes an external bootstrap diode for charging
the bootstrap capacitor and a bootstrap resistor RBOOT being
placed between the BOOT pin and the capacitor/diode
connection.
R
EN
V
EN
RTQ2132B
IN
C
EN
GND
Figure 11. Enable Timing Control
R
EN
V
EN
RTQ2132B
IN
R
BOOT
BOOT
SW
Q1
Enable
C
BOOT
RTQ2132B
GND
Figure 12. Logic Control for the EN Pin
Figure 9. External Bootstrap Resistor at the BOOT Pin
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20
DSQ2132B-QT-01 August 2018
RTQ2132B-QT
R
much heat due to its high efficiency and low thermal
resistance of its TSSOP-14 (Exposed Pad) package.
However, in applications in which the RTQ2132B is running
at a high ambient temperature and high input voltage or
high switching frequency, the generated heat may exceed
the maximum junction temperature of the part.
EN1
V
IN
EN
R
RTQ2132B
GND
EN2
Figure 13. ResistiveDivider for Under-Voltage Lockout
Threshold Setting
The junction temperature should never exceed the
absolute maximum junction temperature TJ(MAX), listed
under Absolute Maximum Ratings, to avoid permanent
damage to the device. If the junction temperature reaches
approximately 175°C, the RTQ2132B stop switching the
power MOSFETs until the temperature drops about 15°C
cooler.
Soft-Start
The RTQ2132B provides adjustable soft-start function. The
soft-start function is used to prevent large inrush current
while converter is being powered-up. For the RTQ2132B,
the soft-start timing can be programmed by the external
capacitor CSS between SS and GND. An internal current
source ISS (6μA) charges an external capacitor to build a
soft-start ramp voltage. The FB voltage will track the internal
ramp voltage during soft start interval. The typical soft-
start time (tSS) which is VOUT rise from zero to 90% of
setting value is calculated as follows :
The maximum power dissipation can be calculated by
the following formula :
P
= T
T / θ
A
D MAX
J MAX
JA EFFECTIVE
where
TJ(MAX) is the maximum allowed junction temperature of
the die. For recommended operating condition
specifications, the maximum junction temperature is
150°C.TA is the ambient operating temperature,
θJA(EFFECTIVE) is the system-level junction to ambient
thermal resistance. It can be estimated from thermal
modeling or measurements in the system.
0.8
tSS = CSS
ISS
If a heavy load is added to the output with large
capacitance, the output voltage will never enter regulation
because of UVP. Thus, the device remains in hiccup
operation. The CSS should be large enough to ensure soft-
start period ends after COUT is fully charged.
ISS V
The device thermal resistance depends strongly on the
surrounding PCB layout and can be improved by providing
a heat sink of surrounding copper ground. The addition of
backside copper with thermal vias, stiffeners, and other
enhancements can also help reduce thermal resistance.
OUT
C
C
SS
OUT
0.8I
COUT_CHG
where ICOUT_CHG is the COUT charge current which is
related to the switching frequency, inductance, high side
MOSFET switch peak current limit and load current.
Experiments in the Richtek thermal lab show that simply
Power-Good Output
set θJA(EFFECTIVE) as 110% to 120% of the θJA is reasonable
The PGOOD pin is an open-drain power-good indication
output and is to be connected to an external voltage source
through a pull-up resistor.
to obtain the allowed PD(MAX)
.
As an example, consider the case when the RTQ2132B
is used in applications where VIN = 12V, IOUT = 1.2A, VOUT
= 5V. The efficiency at 5V, 1.2A is 87.8% by using WE-
74437336047 (4.7μH, 50mΩ DCR) as the inductor and
measured at room temperature. The core loss can be
obtained from its website of 30.5mW in this case. In this
case, the power dissipation of the RTQ2132B is
1 η
The external voltage source can be an external voltage
supply below 5.5V, VCC or the output of the RTQ2132B if
the output voltage is regulated under 5.5V. It is
recommended to connect a 100kΩ between external
voltage source to PGOOD pin.
PD, RT
=
POUT I2 DCR + PCORE = 0.731W
Thermal Consideration
O
η
In many applications, the RTQ2132B does not generate
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21
RTQ2132B-QT
Considering the θJA(EFFECTIVE) is 36°C/W by using the
RTQ2132B evaluation board with 4 layers with 2 OZ.
copper thickness on the outer layers and 1 OZ. copper
thickness on the inner layers copper thickness, the
junction temperature of the regulator operating in a 25°C
ambient temperature is approximately :
the absolute maximum range of operation as a secondary
fail-safe and therefore should not be relied upon
operationally. Continuous operation above the specified
absolute maximum operating junction temperature may
impair device reliability or permanently damage the device.
Layout Guideline
TJ = 0.731W 36C/W + 25C = 51.3C
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the RTQ2132B :
Figure 14 shows the RTQ2132B RDS(ON) versus different
junction temperature. If the application calls for a higher
ambient temperature, we might recalculate the device
power dissipation and the junction temperature based on
a higher RDS(ON) since it increases with temperature.
Four-layer or six-layer PCB with maximum ground plane
is strongly recommended for good thermal performance.
Keep the traces of the main current paths wide and
Using 60°C ambient temperature as an example, the
change of the equivalent RDS(ON) can be calculated as
below
short.
Place high frequency decoupling capacitor CIN2 as close
as possible to the IC to reduce the loop impedance and
minimize switch node ringing.
VOUT
VOUT
RDS ON = RDS ON ,HS
+ RDS ON ,LS 1
V
V
IN
IN
5
5
=35m
+ 25m 1
= 29m
Place the VCC decoupling capacitor, CVCC, as close to
12
12
VCC pin as possible.
and yields a new power dissipation of 0.773W. Therefore,
the estimated new junction temperature is
TJ' = 0.773W 36C/W + 60C = 87.8C
Place bootstrap capacitor, CBST, as close to IC as
possible. Routing the trace with width of 20mil or wider.
Place multiple vias under the device near VINand PGND
and near input capacitors to reduce parasitic inductance
and improve thermal performance. To keep thermal
resistance low, extend the ground plane as much as
possible, and add thermal vias under and near the
RTQ2132B to additional ground planes within the circuit
board and on the bottom side.
Resistance vs. Temperature
350
300
RDS(ON)_H
250
200
150
RDS(ON)_L
The high frequency switching nodes, SW and BOOT,
should be as small as possible. Keep analog
components away from the SW and BOOT nodes.
100
50
0
Reducing the area size of the SW exposed copper to
-50
-25
0
25
50
75
100
125
reduce the electrically coupling from this voltage.
Temperature (°C)
Figure 14. RTQ2132B RDS(ON) vs. Temperature
Connect the feedback sense network behind via of output
capacitor.
If the application calls for a higher ambient temperature
and/or higher switching frequency, care should be taken
to reduce the temperature rise of the part by using a heat
sink or air flow.Note that the over temperature protection
is intended to protect the device during momentary
overload conditions. The protection is activated outside of
Place the feedback components RFB1 / RFB2 / CFF near
the IC.
Place the compensation components RCP1 / CCP1 / CCP2
near the IC.
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is a registered trademark of Richtek Technology Corporation.
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22
DSQ2132B-QT-01 August 2018
RTQ2132B-QT
Connect all analog grounds to common node and then
connect the common node to the power ground with a
single point.
Figure 15 to Figure 18 are the layout example which uses
70mm x 100mm, four-layer PCB with 2 OZ. Cu on the
outer layers and 1 OZ. Cu on the inner layers.
Copyright 2018 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
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23
RTQ2132B-QT
The feedback and compensation
components must be connected
as close to the device as possible.
CFF
RFB2
RFB1
RCP
CCP1
RPG
CCP2
Add 6 thermal vias with 0.25mm
CVCC
diameter on exposed pad for thermal
dissipation and current carrying capacity.
PAD
CIN2
CSS
CIN1
Input capacitors must be
placed as close to IC
VIN-GND as possible
L1
SW should be connected to inductor by
wide and short trace. Keep sensitive
components away from this trace .
Reducing area of SW trace as possible
COUT1
COUT2
Top Layer
Figure 15. LayoutGuide (Top Layer)
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is a registered trademark of Richtek Technology Corporation.
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DSQ2132B-QT-01 August 2018
RTQ2132B-QT
2 Inner Layer
Figure 16. LayoutGuide (2 Inner Layer)
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is a registered trademark of Richtek Technology Corporation.
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25
RTQ2132B-QT
3 Inner Layer
Figure 17. LayoutGuide (3 Inner Layer)
Copyright 2018 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
26
DSQ2132B-QT-01 August 2018
RTQ2132B-QT
RBST
CBST
Bottom Layer
Figure 18. LayoutGuide (Bottom Layer)
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is a registered trademark of Richtek Technology Corporation.
DSQ2132B-QT-01 August 2018
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27
RTQ2132B-QT
Outline Dimension
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
1.000
0.000
0.800
0.190
4.900
Max
1.200
0.150
1.050
0.300
5.100
Min
0.039
0.000
0.031
0.007
0.193
Max
0.047
0.006
0.041
0.012
0.201
A
A1
A2
b
D
e
0.650
0.026
E
6.300
4.300
0.450
1.900
2.350
2.640
1.600
2.250
2.550
6.500
4.500
0.750
2.900
2.850
3.100
2.600
2.750
3.000
0.248
0.169
0.018
0.075
0.093
0.104
0.063
0.089
0.100
0.256
0.177
0.030
0.114
0.112
0.122
0.102
0.108
0.118
E1
L
Option1
U
V
Option2
Option3
Option1
Option2
Option3
14-Lead TSSOP (Exposed Pad) Plastic Package
Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Customers should obtain the latest relevant information and data sheets before placing orders and should verify
that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek
product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use;
nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent
or patent rights of Richtek or its subsidiaries.
www.richtek.com
28
DSQ2132B-QT-01 August 2018
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