RTQ2510-QA [RICHTEK]

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RTQ2510-QA
型号: RTQ2510-QA
厂家: RICHTEK TECHNOLOGY CORPORATION    RICHTEK TECHNOLOGY CORPORATION
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®
RTQ2510-QA  
1A, Low Noise, Ultra High PSRR, Low-Dropout Linear Regulator  
General Description  
Features  
AEC-Q100 Grade 1 Qualified  
The RTQ2510 is a high performance positive low dropout  
(LDO) regulator designed for applications requiring very  
low dropout voltage and ultra high Power Supply Ripple  
Rejection (PSRR) at up to 1A. The input voltage range is  
from 2.2V to 6V and the output voltage is programmable  
as low as 0.8V. A P-MOSFET switch provides excellent  
transient response with just a 4.7μF ceramic output  
capacitor. The external enable control effectively reduces  
power dissipation while shutdown and further output noise  
immunity is achieved through bypass capacitor onNR pin.  
Additionally, the RTQ2510 features a precise 3% output  
regulation over line, load, and temperature variations. The  
device is available in the VDFN-8L 3x3 package and is  
specified from 40°C to 125°C.  
Very Low Dropout : 170mV Typical at 1A  
Ultra High PSRR : 63dB @ 1kHz, 38dB @ 1MHz  
Input Voltage Range : 2.2V to 6V  
Adjustable Output Voltage : 0.8V to 5.5V  
40°C to 125°C Operating Junction Temperature  
Range  
Excellent Noise Immunity  
Fast Response Over Load and Line Transient  
Stable with a 4.7μF Output Ceramic Capacitor  
Accurate Output Voltage 3% Over Load, Line,  
Process, and Temperature Variations  
Enable Control  
Over-Current Protection  
Over-Temperature Protection  
Ordering Information  
Applications  
-QA  
RTQ2510  
Telecom/Networking Cards  
Motherboards/Peripheral Cards  
IndustrialApplications  
Wireless Infrastructures  
Set-Top Boxes  
Pin 1 Orientation***  
(2) : Quadrant 2, Follow EIA-481-D  
Grade  
QA : AEC-Q100 Qualified and  
Screened by High Temperature  
Medical Equipments  
Package Type  
Notebook Computers  
Battery Powered Systems  
QV : VDFN-8L 3x3 (V-Type)  
Lead Plating System  
G : Green (Halogen Free and Pb Free)  
Note :  
Pin Configuration  
***Empty means Pin1 orientation is Quadrant 1  
Richtek products are :  
(TOP VIEW)  
RoHS compliant and compatible with the current require-  
ments of IPC/JEDEC J-STD-020.  
1
2
3
4
8
7
6
5
VOUT  
VOUT  
FB  
VIN  
VIN  
NR  
EN  
Suitable for use in SnPb or Pb-free soldering processes.  
9
GND  
VDFN-8L 3x3  
Copyright 2018 Richtek Technology Corporation. All rights reserved.  
©
is a registered trademark of Richtek Technology Corporation.  
DSQ2510-QA-00 November 2018  
www.richtek.com  
1
RTQ2510-QA  
Marking Information  
MP= : Product Code  
YMDNN : Date Code  
MP=YM  
DNN  
Functional Pin Description  
Pin No.  
Pin Name  
Pin Function  
1, 2  
VOUT  
Output of the regulator. Decouple this pin to GND with at least 4.7F for stability.  
Feedback voltage input. This pin is used to set the desired output voltage via an  
external resistive divider. The feedback reference voltage is 0.8V typically.  
3
FB  
System ground. The exposed pad must be soldered to a large PCB and  
connected to GND for maximum power dissipation.  
4, 9 (Exposed Pad) GND  
Enable control input. Connecting this pin to logic high enables the regulator or  
driving this pin low puts it into shutdown mode. EN can be connected to IN if not  
used. (EN pin is not allowed to be left floating.)  
5
EN  
Noise reduction input. Decouple this pin to GND with an external capacitor can  
not only reduce output noise to very low levels but also slow down the VOUT rise  
like a soft-start behavior.  
6
NR  
Supply input. A minimum of 1F ceramic capacitor should be placed as close as  
possible to this pin for better noise rejection.  
7, 8  
VIN  
Functional Block Diagram  
VOUT  
VIN  
Thermal  
Protection  
UVLO  
Current  
Limit  
Control Logic  
EN  
-
FB  
Quick Start-Up  
Bandgap  
NR  
35k  
189k  
GND  
Copyright 2018 Richtek Technology Corporation. All rights reserved.  
©
is a registered trademark of Richtek Technology Corporation.  
www.richtek.com  
2
DSQ2510-QA-00 November 2018  
RTQ2510-QA  
Operation  
The RTQ2510 is a low noise, high PSRR LDO which  
supports very low dropout operation. The operating input  
range from 2.2V to 6V and the output voltage is  
programmable as low to 0.8V and the output current can  
be up to 1A. The internal compensation network is well  
designed to achieve fast transient response with good  
stability.  
very long if the CNR is not fully charged during 2ms and  
opens the quick-start switch, the CNR will be charged  
through higher resistance 224kΩ and takes much longer  
time to finish the start up process.  
Enable and Shutdown Operation  
The RTQ2510 goes into sleep mode when the EN pin is in  
a logic low condition. In this condition, the pass transistor,  
error amplifier, and bandgap are all turned off, reducing the  
supply current to only 2μA (max.). If the shutdown mode  
is not required, the EN pin can be directly tied to VIN pin  
to keep the LDO on.  
In steady-state operation, the feedback voltage is  
regulated to the reference voltage by the internal regulator.  
When the feedback voltage signal is less than the  
reference, the output current passes through the power  
MOSFET will be increased. The extra amount of the  
current is sent to the output until the voltage level of FB  
pin returns to the reference.  
Current Limit  
The RTQ2510 continuously monitors the output current  
to protect the pass transistor against abnormal operations.  
When an overload or short circuit is encountered, the  
current limit circuitry controls the pass transistor's gate  
voltage to limit the output within the predefined range. By  
reason of the build-in body diode, the pass transistor  
conducts current when the output voltage exceeds input  
voltage. Since the current is not limited, external current  
protection should be added if device may work at reverse  
voltage state.  
On the other hand, if the feedback voltage is higher than  
the reference, the power MOSFET current is decreased.  
The excess charge at the output can be released by the  
loading current.  
Start-Up  
The RTQ2510 has a quick-start circuit to charge the noise  
reduction capacitor (CNR). The switch of the quick-start  
circuit is closed at start up.  
To reduce the noise from bandgap, there is a low-pass  
(RC) filter consist of the CNR and the resistance which is  
connected with bandgap, as Functional Block Diagrams  
present.  
Over-Temperature Protection (OTP)  
The RTQ2510 has an over-temperature protection. When  
the device triggers the OTP, the device shuts down until  
the temperature back to normal state.  
At the start-up, the quick-start switch is closed, with only  
35kΩ resistance between bandgap andNR pin. The quick-  
start switch opens approximate 2ms after the device is  
enabled, the resistance betweenNR and bandgap is about  
224kΩ to form a very good low pass filter and with great  
noise reduction performance.  
Under Voltage Lock-Out (UVLO)  
The RTQ2510 utilizes an undervoltage lock-out circuit to  
keep the output shut off until the internal circuitry is  
operating properly. The UVLO circuit has a de-glitch feature  
so that it typically ignores undershoot transients on the  
input if they are less than 30μs duration.  
The 35kΩ resistance is used to slow down the reference  
voltage ramp to avoid inrush current at chip start-up, and  
the start-up time can be calculated as :  
tSS (sec) = 160000 x CNR (F)  
(1)  
It is recommend the CNR value larger than 0.01μF to reduce  
noise, and low leakage ceramic capacitors are suitable.  
However, with too large CNR will extend the start-up time  
Copyright 2018 Richtek Technology Corporation. All rights reserved.  
©
is a registered trademark of Richtek Technology Corporation.  
DSQ2510-QA-00 November 2018  
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RTQ2510-QA  
Absolute Maximum Ratings (Note 1)  
All Pins ---------------------------------------------------------------------------------------------------------------------- 0.3V to 7V  
Power Dissipation, PD @ TA = 25°C  
VDFN-8L 3x3 --------------------------------------------------------------------------------------------------------------- 3.22W  
Package Thermal Resistance (Note 2)  
VDFN-8L 3x3, θJA ---------------------------------------------------------------------------------------------------------- 31°C/W  
VDFN-8L 3x3, θJC --------------------------------------------------------------------------------------------------------- 8°C/W  
Lead Temperature (Soldering, 10 sec.)------------------------------------------------------------------------------- 260°C  
Junction Temperature ----------------------------------------------------------------------------------------------------- 150°C  
Storage Temperature Range -------------------------------------------------------------------------------------------- 65°C to 150°C  
ESD Susceptibility (Note 3)  
HBM (Human Body Model)---------------------------------------------------------------------------------------------- 2kV  
Recommended Operating Conditions (Note 4)  
Supply Voltage, VIN ------------------------------------------------------------------------------------------------------ 2.2V to 6V  
Junction Temperature Range-------------------------------------------------------------------------------------------- 40°C to 125°C  
Electrical Characteristics  
(VIN = VOUT + 0.5V or 2.2V, VOUT = 0.8V and 5.5V, IOUT = 1mA, VEN = 2.2V, CNR = 10nF, COUT = 4.7μF, TJ = 40°C to 125°C,  
unless otherwise specified)  
Parameter  
Symbol  
Test Conditions  
Min  
Typ  
Max  
Unit  
Supply Voltage  
Input Operating Voltage VIN  
Under-Voltage Lockout  
Threshold  
2.2  
--  
2
6
V
VUVLO  
ROUT = 1k  
1.86  
2.1  
Under-Voltage Lockout  
Threshold Hysteresis  
VUVLO  
ROUT = 1k  
--  
--  
200  
0.2  
--  
2
mV  
VEN 0.4V, VIN 2.2V, ROUT = 1k,  
0°C TJ 85°C  
Shutdown Current  
ISHDN  
A  
VEN 0.4V, VIN 2.2V, ROUT = 1k,  
40°C TJ 125°C  
--  
--  
0.2  
5
Quiescent Current  
Output Voltage  
IQ  
190  
350  
A  
Output Supply Voltage  
0.8  
--  
--  
5.5  
+2  
V
VOUT + 0.5V VIN 6V, VIN 2.5V,  
100mA IOUT 500mA,  
0°C TJ 85°C  
2  
VOUT  
Output Supply Voltage  
%
Accuracy  
(Note 5)  
VOUT + 0.5V VIN 6V, VIN 2.2V,  
100mA IOUT 1A  
3  
±0.3  
+3  
VOUT + 0.5V VIN 6V, VIN 2.2V,  
IOUT = 100mA  
Line Regulation  
Load Regulation  
VOUT/VIN  
--  
--  
0.2  
0.3  
--  
--  
%
%
VOUT/IOUT 100mA IOUT 1A  
Copyright 2018 Richtek Technology Corporation. All rights reserved.  
©
is a registered trademark of Richtek Technology Corporation.  
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DSQ2510-QA-00 November 2018  
RTQ2510-QA  
Parameter  
Symbol  
Test Conditions  
Min  
Typ  
Max  
Unit  
Enable Voltage  
2.2V VIN 6V,  
OUT = 1k  
VIH  
VEN rising  
1.2  
--  
--  
Enable Threshold  
Voltage  
R
V
VIL  
IIH  
VEN falling, ROUT = 1k  
VIN = 6V, VEN = 6V  
--  
--  
--  
--  
0.4  
1
Enable Input Current  
0.02  
0.02  
A  
A  
Feedback Input Current IFB  
VIN = 5.5V, VFB = 0.8V  
1
Current Limit  
Output Current Limit  
ILIM  
VIN = 3.3V, VOUT = 0.85 x VOUT  
1.1  
1.4  
2
A
Power-Up Time  
VOUT = 3.3V,  
C
NR = 1nF  
--  
--  
0.16  
1.6  
--  
--  
Power-Up Time  
ROUT = 3.3k,  
OUT = 4.7F  
ms  
CNR = 10nF  
C
Dropout Voltage  
VIN 2.2V,  
--  
--  
--  
--  
--  
--  
160  
210  
370  
I
OUT = 500mA  
VOUT + 0.5V VIN 6V, VIN 2.5V,  
FB = 0V OUT = 750mA  
VIN 2.5V,  
OUT = 1A  
Dropout Voltage  
VDROP  
mV  
V
I
I
Power Supply Ripple Rejection and Noise  
f = 100Hz  
f = 1kHz  
f = 10kHz  
f = 1MHz  
--  
--  
--  
--  
48  
63  
63  
38  
--  
--  
--  
--  
VIN = 4.3V, VOUT = 3.3V,  
OUT = 750mA  
(Note 6)  
Power Supply Ripple  
Rejection  
PSRR  
I
dB  
15.6 x  
VOUT  
C
NR = 1nF  
--  
--  
--  
--  
--  
--  
BW = 100Hz to 100kHz,  
VIN = 4.3V, VOUT = 3.3V,  
15.6 x  
VOUT  
Output Noise Voltage  
CNR = 10nF  
VRMS  
I
OUT = 100mA  
(Note 6)  
15.1 x  
VOUT  
CNR = 0.1F  
Over-Temperature Protection  
Thermal Shutdown  
TSD  
(Note 6)  
(Note 6)  
--  
--  
160  
140  
--  
--  
°C  
Thermal Shutdown  
Recovery  
Copyright 2018 Richtek Technology Corporation. All rights reserved.  
©
is a registered trademark of Richtek Technology Corporation.  
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RTQ2510-QA  
Note 1. Stresses beyond those listed under Absolute Maximum Ratingsmay cause permanent damage to the device.  
These are stress ratings only, and functional operation of the device at these or any other conditions beyond those  
indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating  
conditions may affect device reliability.  
Note 2. θJA is measured under natural convection (still air) at TA = 25°C with the component mounted on a high effective-  
thermal-conductivity four-layer test board on a JEDEC 51-7 thermal measurement standard. θJC is measured at the  
exposed pad of the package.  
Note 3. Devices are ESD sensitive. Handling precaution is recommended.  
Note 4. The device is not guaranteed to function outside its operating conditions.  
Note 5. The spec. doesn't cover the tolerances from external resistors, and which is not tested at condition of VOUT = 0.8V, 4.5V  
VIN 6V, and 750mA IOUT 1A since the power dissipation of the device is totally higher than the maximum rating  
of the package to lead a thermal shutdown issue.  
Note 6. Guarantee by design.  
Typical Application Circuit  
RTQ2510  
7, 8  
V
1, 2  
3
IN  
VIN  
VOUT  
V
OUT  
2.2V to 6V  
C
IN  
C
4.7µF  
OUT  
R1  
R2  
1µF  
5
6
FB  
Enable  
EN  
NR  
C
NR  
GND  
4
10nF  
Copyright 2018 Richtek Technology Corporation. All rights reserved.  
©
is a registered trademark of Richtek Technology Corporation.  
www.richtek.com  
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DSQ2510-QA-00 November 2018  
RTQ2510-QA  
Typical Operating Characteristics  
UVLO vs. Temperature  
Reference Voltage vs. Temperature  
2.2  
2.1  
2.0  
1.9  
1.8  
1.7  
1.6  
1.5  
0.810  
Logic-High  
Logic-Low  
0.805  
VIN = 2.2V  
0.800  
VIN = 3.3V  
VIN = 4.3V  
VIN = 5.5V  
VIN = 6V  
0.795  
0.790  
VOUT = 0.8V, VEN = 2.2V  
IOUT = 1mA  
75 100 125  
-50  
-25  
0
25  
50  
75  
100  
125  
-50  
-25  
0
25  
50  
Temperature (°C)  
Temperature (°C)  
Shutdown Current vs. Temperature  
Dropout Voltage vs. Input Voltage  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
200  
150  
100  
50  
VEN = 0.4V  
0°C  
25°C  
40°C  
85°C  
125°C  
VIN = 2.2V  
VIN = 3.3V  
V
V
IN = 4.3V  
IN = 5V  
VIN = 5.5V  
IN = 6V  
V
IOUT = 1000mA  
5 6  
0
-50  
-25  
0
25  
50  
75  
100  
125  
2
3
4
Temperature (°C)  
Input Voltage (V)  
Dropout Voltage vs. Output Current  
PSRR vs. Frequency  
200  
150  
100  
50  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
0°C  
40°C  
25°C  
85°C  
125°C  
IOUT = 10mA  
IOUT = 100mA  
IOUT = 750mA  
IOUT = 1000mA  
No CIN, VIN = 4.3V,  
COUT = 4.7μF, VOUT = 3.3V  
VIN = 2.5V  
800 1000  
0
0
200  
400  
600  
10  
100  
1k  
10k 100k 1M 10M  
Output Current (mA)  
Frequency (Hz)  
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RTQ2510-QA  
Output Spectral Noise Density  
Load Transient Response  
100.00  
10.00  
1.00  
RMS Noise (100Hz to 100kHz)  
69.72μVRMS (IOUT = 10mA),  
59.01μVRMS (IOUT = 100mA),  
56.11μVRMS (IOUT = 750mA)  
VIN = 4.3V, VOUT = 3.3V,  
OUT = 0.1A to 1A (1A/μs, only shows the  
transient component)  
I
VOUT = 3.3V, VIN = 3.8V,  
VOUT  
(50mV/Div)  
COUT = 4.7μF, CNR = 0.01μF  
IOUT = 10mA  
I
I
OUT = 100mA  
OUT = 750mA  
0.10  
IOUT  
(500mA/Div)  
0.01  
10  
100  
1000  
10000  
100000  
Time (50μs/Div)  
Frequency (Hz)  
Line Transient Response  
Power On from EN  
VEN  
(2V/Div)  
VOUT  
(5mV/Div)  
VOUT  
(1V/Div)  
IOUT  
(500mA/Div)  
VIN  
(1V/Div)  
VIN = 3.8V to 4.8V, VOUT = 3.3V,  
= 0.1A  
VIN = 4.3V, VOUT = 3.3V  
IOUT  
Time (50μs/Div)  
Time (500μs/Div)  
Start-Up Time vs. Noise Reduction Capacitance  
1000  
Power Off from EN  
VEN  
100  
10  
1
(2V/Div)  
VOUT  
(1V/Div)  
IOUT  
(500mA/Div)  
RLOAD = 1kΩ  
VIN = 4.3V, VOUT = 3.3V  
0.1  
1
10  
100  
1000  
Time (50μs/Div)  
CNR (nF)  
Copyright 2018 Richtek Technology Corporation. All rights reserved.  
©
is a registered trademark of Richtek Technology Corporation.  
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RTQ2510-QA  
Application Information  
The RTQ2510 is a low voltage, low dropout linear regulator  
with input voltage from 2.2V to 6V and a fixed output voltage  
from 0.8V to 5.5V.  
current limit circuitry controls the pass transistor's gate  
voltage to limit the output within the predefined range. By  
reason of the build-in body diode, the pass transistor  
conducts current when the output voltage exceeds input  
voltage. Since the current is not limited, external current  
protection should be added if device may work at reverse  
voltage state.  
Dropout Voltage  
The dropout voltage refers to the voltage difference between  
the VINand VOUT pins while operating at specific output  
current. The dropout voltage VDO also can be expressed  
as the voltage drop on the pass-FET at specific output  
current(IRATED) while the pass-FET is fully operating at  
ohmic region and the pass-FET can be characterized as  
an resistance RDS(ON). Thus the dropout voltage can be  
defined as (VDO = VVIN VVOUT = RDS(ON) x IRATED).  
CIN and COUT Selection  
Like any low dropout regulator, the external capacitors of  
the RTQ2510 must be carefully selected for regulator  
stability and performance. Using a capacitor of at least  
4.7μF is suitable. The input capacitor must be located at  
a distance of no more than 0.5 inch from the input pin of  
the chip. Any good quality ceramic capacitor can be used.  
However, a capacitor with larger value and lower ESR  
(Equivalent Series Resistance) is recommended since it  
will provide better PSRR and line transient response.  
For normal operation, the suggested LDO operating range  
is (VVIN > VVOUT + VDO) for good transient response and  
PSRR ability. Vice versa, while operating at the ohmic  
region will degrade these performance severely.  
Output Voltage Setting  
The RTQ2510 is designed specifically to work with low  
ESR ceramic output capacitor for space saving and  
performance consideration. Using a ceramic capacitor with  
capacitance of at least 4.7μF on the RTQ2510 output  
ensures stability.  
For the RTQ2510, the voltage on the FB pin sets the output  
voltage and is determined by the values of R1 and R2.  
The values of R1 and R2 can be calculated for any voltage  
using the formula given in Equation :  
R1 + R2  
0.8  
VOUT  
=
Output Noise  
R2  
Generally speaking, the dominant noise source is from  
the internal bandgap for most LDOs. With the noise  
reduction capacitor connecting to the NR pin of the  
RTQ2510, the noise component contributed from bandgap  
will not be significantly. Instead, the most noise source  
comes from the the output resistor divider and the error  
amplifier input. For general application to minimize noise,  
using a 0.01μF noise-reduction capacitor (CNR) is  
recommended.  
Using lower values for R1 and R2 is recommended to  
reduces the noise injected from the FB pin. Note that R1  
is connected from VOUT pin to FB pin, and R2 is  
connected from FB to GND.  
Chip Enable Operation  
The EN pin is the chip enable input. Pull the EN pin low  
(<0.4V) will shutdown the device.During shutdown mode,  
the RTQ2510 quiescent current drops to lower than 2μA.  
Drive the EN pin to high (>1.2V, <6V) will turn on the  
device again. For external timing control (e.g.RC),the EN  
pin can also be externally pulled to High by adding a 100kΩ  
or greater resistor from the VIN pin.  
Thermal Considerations  
Thermal protection limits power dissipation in the  
RTQ2510. When the operation junction temperature  
exceeds 160°C, the OTP circuit starts the thermal  
shutdown function and turns the pass element off. The  
pass element turns on again after the junction temperature  
cools down by 20°C.  
Current Limit  
The RTQ2510 continuously monitors the output current  
to protect the pass transistor against abnormal operations.  
When an overload or short circuit is encountered, the  
Copyright 2018 Richtek Technology Corporation. All rights reserved.  
©
is a registered trademark of Richtek Technology Corporation.  
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RTQ2510-QA  
The RTQ2510 output voltage will be closed to zero when  
output short circuit occurs as shown in Figure 1. It can  
reduce the chip temperature and provides maximum safety  
to end users when output short circuit occurs.  
resistance, θJA. The derating curves in Figure 2 allows  
the designer to see the effect of rising ambient temperature  
on the maximum power dissipation.  
3.6  
Four-Layer PCB  
V
Short to GND  
3.2  
2.8  
2.4  
2.0  
1.6  
1.2  
0.8  
0.4  
0.0  
OUT  
V
I
OUT  
ILIM’  
OUT  
IC Temperature  
0
25  
50  
75  
100  
125  
Ambient Temperature (°C)  
Figure 1. Short-Circuit Protection when Output Short-  
Circuit Occurs  
Figure 2.Derating Curve of Maximum PowerDissipation  
The junction temperature should never exceed the  
absolute maximum junction temperature TJ(MAX), listed  
under Absolute Maximum Ratings, to avoid permanent  
damage to the device. The maximum allowable power  
dissipation depends on the thermal resistance of the IC  
package, the PCB layout, the rate of surrounding airflow,  
and the difference between the junction and ambient  
temperatures. The maximum power dissipation can be  
calculated using the following formula :  
PD(MAX) = (TJ(MAX) TA) / θJA  
where TJ(MAX) is the maximum junction temperature, TA is  
the ambient temperature, and θJA is the junction-to-ambient  
thermal resistance.  
For continuous operation, the maximum operating junction  
temperature indicated under Recommended Operating  
Conditions is 125°C. The junction-to-ambient thermal  
resistance, θJA, is highly package dependent. For a  
VDFN-8L 3x3 package, the thermal resistance, θJA, is  
31°C/W on a standard JEDEC 51-7 high effective-thermal-  
conductivity four-layer test board. The maximum power  
dissipation at TA = 25°C can be calculated as below :  
PD(MAX) = (125°C 25°C) / (31°C/W) = 3.22W for a  
VDFN-8L 3x3 package.  
The maximum power dissipation depends on the operating  
ambient temperature for the fixed TJ(MAX) and the thermal  
Copyright 2018 Richtek Technology Corporation. All rights reserved.  
©
is a registered trademark of Richtek Technology Corporation.  
www.richtek.com  
10  
DSQ2510-QA-00 November 2018  
RTQ2510-QA  
Layout Consideration  
GND  
GND  
R2  
GND  
FB  
VOUT  
VOUT  
5
6
7
8
9
4
3
2
1
EN  
NR  
VIN  
VIN  
R1  
Enable  
signal input  
CNR  
COUT CBYPASS  
CIN  
GND layout trace should be  
wider for thermal consideration.  
Input capacitor must be  
placed as close to the IC  
as possible.  
GND  
Figure 3. PCB Layout Guide  
Copyright 2018 Richtek Technology Corporation. All rights reserved.  
©
is a registered trademark of Richtek Technology Corporation.  
DSQ2510-QA-00 November 2018  
www.richtek.com  
11  
RTQ2510-QA  
Outline Dimension  
D2  
D
L
E
E2  
SEE DETAIL A  
1
e
b
2
1
2
1
A
A3  
DETAILA  
Pin #1 ID and Tie Bar Mark Options  
A1  
Note : The configuration of the Pin #1 identifier is optional,  
but must be located within the zone indicated.  
Dimensions In Millimeters  
Dimensions In Inches  
Symbol  
Min  
Max  
Min  
Max  
A
A1  
A3  
b
0.800  
0.000  
0.175  
0.200  
2.950  
2.100  
2.950  
1.350  
1.000  
0.050  
0.250  
0.300  
3.050  
2.350  
3.050  
1.600  
0.031  
0.000  
0.007  
0.008  
0.116  
0.083  
0.116  
0.053  
0.039  
0.002  
0.010  
0.012  
0.120  
0.093  
0.120  
0.063  
D
D2  
E
E2  
e
0.650  
0.026  
L
0.425  
0.525  
0.017  
0.021  
V-Type 8L DFN 3x3 Package  
Copyright 2018 Richtek Technology Corporation. All rights reserved.  
©
is a registered trademark of Richtek Technology Corporation.  
www.richtek.com  
12  
DSQ2510-QA-00 November 2018  
RTQ2510-QA  
Footprint Information  
Footprint Dimension (mm)  
Number of  
Package  
Pin  
Tolerance  
P
A
B
C
D
Sx  
Sy  
M
V/W/U/XDFN3*3-8  
8
0.65  
3.80  
1.94  
0.93  
0.35  
2.30  
1.50  
2.30  
±0.05  
Richtek Technology Corporation  
14F, No. 8, Tai Yuen 1st Street, Chupei City  
Hsinchu, Taiwan, R.O.C.  
Tel: (8863)5526789  
Richtek products are sold by description only. Customers should obtain the latest relevant information and data sheets before placing orders and should verify  
that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek  
product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use;  
nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent  
or patent rights of Richtek or its subsidiaries.  
DSQ2510-QA-00 November 2018  
www.richtek.com  
13  

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