BD9161FVM_技术文档

Single-chip Type with Built-in FET Switching Regulator Series

Output 1.5A or Less High-efficiency

Step-down Switching Regulator

with Built-in Power MOSFET

BD9161FVM

No.09027EAT29

●Description

ROHM’s high efficiency step-down switching regulator BD9161FVM is a power supply designed to produce 1.2volts

(low voltage) from 3.3volts power supply line. Offers high efficiency with our original pulse skip control technology and

synchronous rectifier. Employs a current mode control system to provide faster transient response to sudden change

in load.

●Features

1) Offers fast transient response with current mode PWM control system.

2) Offers highly efficiency for all load range with synchronous rectifier (Nch/Pch FET)

3) Incorporates 100% Duty function.

4) Incorporates soft-start function.

5) Incorporates thermal protection and ULVO functions.

6) Incorporates short-current protection circuit with time delay function.

7) Incorporates shutdown function Icc=0μA (Typ.)

8) Employs small surface mount package MSOP8

●Use

Power supply for HDD, DVS and for LSI of CPU, ASIC

●Absolute Maximum Rating (Ta=25℃)

Parameter

VCC voltage

Symbol

VCC

Rating

-0.3～+7 ^*1

-0.3～+7

387.5^*2

Unit

V

PVCC voltage

PVCC

EN

V

EN Voltage

V

SW, ITH Voltage

Power Dissipation 1

Power Dissipation 2

Power Dissipation 3

Power Dissipation 4

SW,ITH

Pd1

V

mW

℃

Pd2

587.4^*3

Topr

-25～+85

-55～+150

+150

Tstg

℃

EN voltage

Tjmax

℃

*1 Pd should not be exceeded.

*2 Derating in done 3.1mW/℃ for temperatures above Ta=25℃.

*3 Derating in done 4.7mW/℃ for temperatures above Ta=25℃,Mounted on 70mm×70mm×1.6mm Glass Epoxy PCB.

●Operating Conditions (Ta=25℃)

Limits

Parameter

Symbol

Unit

Min.

2.5

0

Typ.

Max.

4.5

VCC voltage

VCC^*4

PVCC^*4

EN

3.3

V

A

PVCC voltage

3.3

4.5

EN voltage

-

VCC

3.3

Output Voltage Setting Range

SW,ITH

Isw^*4

1.0

-

SW, ITH average output current

0.6

*4 Pd should not be exceeded.

www.rohm.com

2009.05 - Rev.A

1/13

Technical Note

BD9161FVM

●Electrical Characteristics

◎(Ta=25℃, VCC=PVCC=3.3V, EN=VCC, unless otherwise specified.)

Limits

Typ.

0

Parameter

Symbol

Unit

Conditions

Min.

Max.

10

Standby current

ISTB

ICC

-

μA

V

EN=GND

Bias current

200

GND

VCC

1

400

0.8

-

EN Low voltage

VENL

VENH

IEN

-

Standby mode

Active mode

VEN=3.3V

EN High voltage

2.0

-

V

EN input current

10

μA

MHz

Ω

Oscillation frequency

Pch FET ON resistance

Nch FET ON resistance

Output voltage

FOSC

RONP

RONN

VOUT

ITHSI

0.8

-

1

1.2

0.6

0.68

0.816

-

0.35

0.37

0.8

20

PVCC=3.3V

-

Ω

0.784

10

2.2

2.22

0.5

1

V

ITH SInk current

μA

V

VOUT =H

VOUT =L

ITH Source Current

UVLO threshold voltage

UVLO hysteresis voltage

Soft start time

ITHSO

VUVLO1

VUVLO2

TSS

20

-

2.3

2.35

1

2.4

2.5

2

VCC=H→L

VCC=L→H

V

ms

V

Timer latch time

TLATCH

VSCP

2

3

SCP/TSD operated

Output Short circuit Threshold Voltage

-

0.4

0.56

VOUT =H→L

●Block Diagram, Application Circuit

VCC

EN

3

V^CC

2.9 0.1

8

7

VREF

+6

4

-4

Max3.25(include.BURR)

3.3V

Input

8

5

PV^CC

Current

Comp.

D 9 1

Current

Sense/

Protect

6

1

R

Q

Gm Amp.

S

Lot No.

Output

SLOPE

1

4

CLK

+

6

+0.05

1PIN MARK

0.145

OSC

-0.03

0.475

V^CC

SW

Driver

Logic

S

UVLO

PGND

Soft

Start

+0.05

-0.04

5

4

0.22

TSD

SCP

GND

0.08 S

0.65

1

2

ADJ

ITH

MSOP8 (Unit:mm)

Fig.1 BD9161FVM Dimension

●Pin No. & function table

Fig.2 BD9161FVM Block Diagram

PIN function

Pin No.

Pin name

ADJ

1

2

3

4

5

6

7

8

Output voltage Feedback pin (Adjustable)

GmAmp output pin/Connected phase compensation capacitor

Enable pin (Active High)

ITH

EN

GND

PGND

SW

Ground

Nch FET source pin

Pch/Nch FET drain output pin

Pch FET source pin

PVCC

VCC

VCC power supply input pin

www.rohm.com

2009.05 - Rev.A

1/13

Technical Note

BD9161FVM

●Characteristics data(Reference data)

3.0

2.0

1.0

0.0

3.0

2.0

1.0

0.0

3.0

【VOUT=2.5V】

Ta=25℃

Io=0A

2.0

1.0

0.0

VCC=3.3V

Ta=25℃

Io=0A

VCC=3.3V

Ta=25℃

0

1

2

3

4

0

1

2

3

4

0

1

2

3

EN VOLTAGE:VEN[V]

INPUT VOLTAGE:V [V]

CC

OUTPUT CURRENT:I

[A]

OUT

Fig.4 Ven-Vout

Fig.3 Vcc-Vout

Fig.5 Iout-Vout

1.20

1.10

1.00

0.90

0.80

0.70

0.60

0.50

0.40

0.30

0.20

0.10

0.00

100

90

80

70

60

50

40

30

20

10

0

2.55

2.54

2.53

2.52

2.51

2.50

2.49

2.48

2.47

2.46

2.45

【VOUT=2.5V】

VCC=3.3V

Io=0A

【VOUT=2.5V】

VCC=3.3V

Ta=25℃

-25 -15 -5

5

15 25 35 45 55 65 75 85

-25 -15 -5

5

15 25 35 45 55 65 75 85

1

10

100

1000

TEMPERATURE:Ta[

]

℃

TEMPERATURE:Ta[

]

OUTPUT CURRENT:I_OUT[mA]

℃

Fig.8 Ta - Fosc

Fig. 6 Ta-VOUT

Fig.7 Efficiency

0.40

0.35

0.30

0.25

0.20

0.15

0.10

0.05

0.00

1.2

1.1

1

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0.0

VCC=3.3V

PMOS

NMOS

0.9

VCC=3.3V

0.8

-25 -15 -5

5

15 25 35 45 55 65 75 85

-25 -15 -5

5

15 25 35 45 55 65 75 85

2.5

3

3.5

4

4.5

TEMPERATURE:Ta[

]

℃

TEMPERATURE:Ta[

]

℃

INPUT VOLTAGE:V_CC[V]

Fig.9 Ta-VEN

Fig.10 Ta-ICC

Fig.11 Vcc-Fosc

www.rohm.com

2009.05 - Rev.A

2/13

Technical Note

BD9161FVM

●Characteristics data(Reference data) – Continued

【SLLM^TMcontrol

VOUT=2.5V】

【V^OUT=2.5V】

【PWM control

V^OUT=2.5V】

V^CC=PVCC

=EN

SW

V^OUT

VOUT

VCC=3.3V

Ta=25℃

Io=0A

VCC=3.3V

Ta=25℃

VCC=3.3V

Ta=25℃

Fig.14 SW waveform Io=500mA

Fig.12 Soft start waveform

Fig.13 SW waveform Io=10mA

【100% Duty

V^OUT=2.5V】

【VOUT=2.5V】

【V^OUT=2.5V】

VOUT

SW

V^OUT

IOUT

I^OUT

VCC=2.7V

Ta=25℃

VCC=3.3V

Ta=25℃

VCC=3.3V

Ta=25℃

Fig. 16 Transient response

Io=250→500mA(10μs)

Fig.17 Transient response

Io=500→250mA(10μs)

Fig. 15 SW waveform Io=600mA

www.rohm.com

2009.05 - Rev.A

3/13

Technical Note

BD9161FVM

●Information on advantages

Advantage 1：Offers fast transient response with current mode control system.

Conventional product (VOUT of which is 2.5 volts)

BD9161FVM (Load response IO=250mA→500mA)

V^OUT

VOUT

40mV

98mV

IOUT

I^OUT

Voltage drop due to sudden change in load was reduced by about 50%.

Fig.18 Comparison of transient response

Advantage 2： Offers high efficiency for all load range.

・For lighter load:

Utilizes the current mode control mode called SLLM^TMfor lighter load, which reduces various dissipation such as

switching dissipation (P_SW), gate charge/discharge dissipation, ESR dissipation of output capacitor (P_ESR) and

on-resistance dissipation (P_RON) that may otherwise cause degradation in efficiency for lighter load.

Achieves efficiency improvement for lighter load.

100

SLLM^TM

・For heavier load:

②

Utilizes the synchronous rectifying mode and the low on-resistance

MOS FETs incorporated as power transistor.

50

①

①inprovement by SLLM^TMsystem

PWM

②improvement by synchronous rectifier

0

ON resistance of P-channel MOS FET: 0.35 Ω (Typ.)

ON resistance of N-channel MOS FET: 0.37 Ω (Typ.)

0.001

0.01

0.1

1

Output current Io[A]

Fig.19 Efficiency

Achieves efficiency improvement for heavier load.

Offers high efficiency for all load range with the improvements mentioned above.

Advantage 3：・Supplied in smaller package due to small-sized power MOS FET incorporated.

・Allows reduction in size of application products

・Output capacitor Co required for current mode control: 10 μF ceramic capacitor

・Inductance L required for the operating frequency of 1 MHz: 4.7 μH inductor

Reduces a mounting area required.

V^CC

15mm

CIN

Cin

R^ITH

L

DC/DC

Convertor

Controller

L

V^OUT

10mm

CITH

RITH

CITH

Co

C^O

Fig.20 Example application

www.rohm.com

2009.05 - Rev.A

4/13

Technical Note

BD9161FVM

●Operation

BD9161FVM is a synchronous rectifying step-down switching regulator that achieves faster transient response by

employing current mode PWM control system. It utilizes switching operation in PWM (Pulse Width Modulation) mode for

heavier load, while it utilizes SLLM^TM(Simple Light Load Mode) operation for lighter load to improve efficiency.

○Current mode PWM control

Synthesizes a PWM control signal with a inductor current feedback loop added to the voltage feedback.

・PWM (Pulse Width Modulation) control

The oscillation frequency for PWM is 1 MHz. SET signal form OSC turns ON a P-channel MOS FET (while a

N-channel MOS FET is turned OFF), and an inductor current I_Lincreases. The current comparator (Current Comp)

receives two signals, a current feedback control signal (SENSE: Voltage converted from I_L) and a voltage feedback

control signal (FB), and issues a RESET signal if both input signals are identical to each other, and turns OFF the

P-channel MOS FET (while a N-channel MOS FET is turned ON) for the rest of the fixed period. The PWM control

repeats this operation.

・SLLM^TM(Simple Light Load Mode) control

When the control mode is shifted from PWM for heavier load to the one for lighter load or vise versa, the switching

pulse is designed to turn OFF with the device held operated in normal PWM control loop, which allows linear operation

without voltage drop or deterioration in transient response during the mode switching from light load to heavy load or

vise versa.

Although the PWM control loop continues to operate with a SET signal from OSC and a RESET signal from Current

Comp, it is so designed that the RESET signal is held issued if shifted to the light load mode, with which the switching

is tuned OFF and the switching pulses are thinned out under control. Activating the switching intermittently reduces

the switching dissipation and improves the efficiency.

・100% Duty control

Max duty is 100%. (@ Pch MOS FET always ON) In usual PWM control, in case output voltage cannot keep (ex, drop

of input voltage), oscillation frequency becomes lower and finally it becomes 100% duty. The output voltage is a value

that depends only by on a voltage hang from the input voltage to Pch MOS FET, and can keep the output voltage even

with the low input voltage.

SENSE

Current

Comp

V^OUT

RESET

FB

R

S

Q

IL

Level

Shift

SET

Driver

Logic

V^OUT

Gm Amp.

SW

Load

OSC

ITH

Fig.21 Diagram of current mode PWM control

PVCC

SENSE

PVCC

Current

Comp

Current

SENSE

Comp

FB

SET

GND

RESET

SW

RESET

GND

SW

GND

I^L

I^L(AVE)

I^L

0A

V^OUT

V^OUT(AVE)

Not switching

Fig.23 SLLM^TMswitching timing chart

Fig.22 PWM switching timing chart

www.rohm.com

2009.05 - Rev.A

5/13

Technical Note

BD9161FVM

●Description of operations

・Soft-start function

EN terminal shifted to “High” activates a soft-starter to gradually establish the output voltage with the current limited

during startup, by which it is possible to prevent an overshoot of output voltage and an inrush current.

・Shutdown function

With EN terminal shifted to “Low”, the device turns to Standby Mode, and all the function blocks including reference

voltage circuit, internal oscillator and drivers are turned to OFF. Circuit current during standby is 0μF (Typ.).

・UVLO function

Detects whether the input voltage sufficient to secure the output voltage of this IC is supplied. And the hysteresis width

of 50 mV (Typ.) is provided to prevent output chattering.

Hysteresis 50mV

VCC

EN

V^OUT

Tss

Soft start

Standby

mode

Standby

mode

Standby mode

Operating mode

Standby mode

UVLO

EN

UVLO

Fig.24 Soft start, Shutdown, UVLO timing chart

・Short-current protection circuit with time delay function

Turns OFF the output to protect the IC from breakdown when the incorporated current limiter is activated continuously for

the fixed time (TLATCH) or more. The output thus held tuned OFF may be recovered by restarting EN or by re-unlocking

UVLO.

EN

Output OFF

latch

V^OUT

Limit

IL

1msec

Standby

mode

Standby

mode

Operating mode

EN

Timer latch

EN

Fig.25 Short-current protection circuit with time delay timing chart

www.rohm.com

2009.05 - Rev.A

6/13

Technical Note

BD9161FVM

●Switching regulator efficiency

Efficiency ŋ may be expressed by the equation shown below:

VOUT×IOUT

POUT

η=

×100[%]=

×100[%]

Vin×Iin

POUT+PDα

Efficiency may be improved by reducing the switching regulator power dissipation factors P_Dα as follows:

Dissipation factors:

1) ON resistance dissipation of inductor and FET：PD(I²R)

2) Gate charge/discharge dissipation：PD(Gate)

3) Switching dissipation：PD(SW)

4) ESR dissipation of capacitor：PD(ESR)

5) Operating current dissipation of IC：PD(IC)

2

1)PD(I²R)=IOUT ×(RCOIL+RON) (RCOIL[ꢀ]：DC resistance of inductor, RON[ꢀ]：ON resistance of FET

IOUT[A]：Output current.)

2)PD(Gate)=Cgs×f×V (Cgs[F]：Gate capacitance of FET, f[H]：Switching frequency, V[V]：Gate driving voltage of FET)

Vin²×CRSS×IOUT×f

3)PD(SW)=

(CRSS[F]：Reverse transfer capacitance of FET, IDRIVE[A]：Peak current of gate.)

IDRIVE

2

4)PD(ESR)=IRMS ×ESR (IRMS[A]：Ripple current of capacitor, ESR[ꢀ]：Equivalent series resistance.)

5)PD(IC)=Vin×ICC (ICC[A]：Circuit current.)

●Consideration on permissible dissipation and heat generation

As this IC functions with high efficiency without significant heat generation in most applications, no special consideration is

needed on permissible dissipation or heat generation. In case of extreme conditions, however, including lower input

voltage, higher output voltage, heavier load, and/or higher temperature, the permissible dissipation and/or heat generation

must be carefully considered.

For dissipation, only conduction losses due to DC resistance of inductor and ON resistance of FET are considered.

Because the conduction losses are considered to play the leading role among other dissipation mentioned above including

gate charge/discharge dissipation and switching dissipation.

1000

800

2

①Using an IC alone

θj-a=322.6℃/W

②mounted on glass epoxy PCB

θj-a=212.8℃/W

P=IOUT ×(RON)

RON=D×RONP+(1-D)×RONN

D：ON duty (=VOUT/VCC)

RONP：ON resistance of P-channel MOS FET

RONN：ON resistance of N-channel MOS FET

IOUT：Output current

②587.4mW

①387.5mW

600

400

200

0

25

50

75 85 100

125

150

Ambient temperature:Ta [℃]

Fig.26 Thermal derating curve

(MSOP8)

If VCC=3.3V, VOUT=2.5V RONP=0.35ꢀ, RONN=0.37ꢀ

IOUT=0.6A, for example,

D=VOUT/VCC=2.5/3.3=0.758

RON=0.758×0.35+(1-0.758)×0.37

=0.2653+0.08954

=0.35484[ꢀ]

P=0.6²×0.35484

≒127.7[mV]

As RONP is greater than RONN in this IC, the dissipation increases as the ON duty becomes greater. With the consideration

on the dissipation as above, thermal design must be carried out with sufficient margin allowed.

www.rohm.com

2009.05 - Rev.A

7/13

Technical Note

BD9161FVM

●Selection of components externally connected

1. Selection of inductor (L)

IL

The inductance significantly depends on output ripple current.

As seen in the equation (1), the ripple current decreases as the

inductor and/or switching frequency increases.

ΔIL

VCC

(VCC-VOUT)×VOUT

[A]・・・(1)

ΔIL=

L×VCC×f

IL

Appropriate ripple current at output should be 20～30% more or less

of the maximum output current.

VOUT

ΔIL=0.25×IOUTmax. [A]・・・(2)

L

Co

(VCC-VOUT)×VOUT

L=

[H]・・・(3)

ΔIL×VCC×f

(ΔIL: Output ripple current, and f: Switching frequency)

Fig.27 Output ripple current

* Current exceeding the current rating of the inductor results in magnetic saturation of the inductor, which decreases

efficiency. The inductor must be selected allowing sufficient margin with which the peak current may not exceed its

current rating.

If VCC=3.3V, VOUT=2.5V, f=1MHz, ΔIL=0.25×0.6A=0.15A

(3.3-2.5)×2.5

0.15×3.3×1M

L≧

≧4.04μ

* Select the inductor of low resistance component (such as DCR and ACR) to minimize dissipation in the inductor for

better efficiency.

2. Selection of output capacitor (CO)

VCC

Output capacitor should be selected with the consideration on the stability region

and the equivalent series resistance required to smooth ripple voltage.

Output ripple voltage is determined by the equation (4)：

V^OUT

L

ΔVOUT=ΔIL×ESR [V]・・・(4)

ESR

Co

(ΔIL: Output ripple current, ESR: Equivalent series resistance of output capacitor)

*Rating of the capacitor should be determined allowing sufficient margin against

output voltage. Less ESR allows reduction in output ripple voltage.

Fig.28 Output capacitor

Inappropriate capacitance may cause problem in startup. A 10μF to 100μF ceramic capacitor is recommended.

3. Selection of input capacitor (Cin)

Input capacitor to select must be a low ESR capacitor of the capacitance

sufficient to cope with high ripple current to prevent high transient voltage. The

ripple current IRMS is given by the equation (5):

VCC

Cin

√

V^OUT

VOUT(VCC-VOUT)

IRMS=IOUT×

[A]・・・(5)

L

VCC

Co

< Worst case > IRMS(max.)

IOUT

2

When VCC is twice the Vout, IRMS=

Fig.29 Input capacitor

If VCC=3.3V, VOUT=2.5V, and IOUTmax.=0.6A

√

2.5(3.3-2.5)

IRMS=0.6×

=0.284[ARMS]

5

A low ESR 10μF/10V ceramic capacitor is recommended to reduce ESR dissipation of input capacitor for better

efficiency.

www.rohm.com

2009.05 - Rev.A

8/13

Technical Note

BD9161FVM

4. Determination of RITH, CITH that works as a phase compensator

As the Current Mode Control is designed to limit a inductor current, a pole (phase lag) appears in the low frequency area

due to a CR filter consisting of a output capacitor and a load resistance, while a zero (phase lead) appears in the high

frequency area due to the output capacitor and its ESR. So, the phases are easily compensated by adding a zero to the

power amplifier output with C and R as described below to cancel a pole at the power amplifier.

fp(Min.)

1

2π×RO×CO

1

A

0

fp=

fp(Max.)

Gain

[dB]

fz(ESR)=

fz(ESR)

2π×ESR×CO

IOUTMin.

I^OUTMax.

Pole at power amplifier

When the output current decreases, the load resistance Ro

increases and the pole frequency lowers.

0

Phase

[deg]

-90

1

fp(Min.)=

fp(Max.)=

[Hz]←with lighter load

[Hz]←with heavier load

2π×ROMax.×CO

Fig.30 Open loop gain characteristics

1

2π×ROMin.×CO

A

fz(Amp.)

Zero at power amplifier

Gain

[dB]

Increasing capacitance of the output capacitor lowers the pole

frequency while the zero frequency does not change. (This

is because when the capacitance is doubled, the capacitor

ESR reduces to half.)

0

Phase

[deg]

1

fz(Amp.)=

-90

2π×RITH.×CITH

Fig.31 Error amp phase compensation characteristics

Cin

L

V^CC

V^CC,PVCC

EN

SW

VOUT

RO

V^OUT

ITH

ESR

C^O

GND,PGND

R^ITH

C^ITH

Fig.32 Typical application

Stable feedback loop may be achieved by canceling the pole fp (Min.) produced by the output capacitor and the load

resistance with CR zero correction by the error amplifier.

fz(Amp.)= fp(Min.)

1

=

2π×RITH×CITH

2π×ROMax.×CO

www.rohm.com

2009.05 - Rev.A

9/13

Technical Note

BD9161FVM

5. Determination of output voltage

The output voltage VOUT is determined by the equation (6):

VOUT=(R2/R1+1)×VADJ・・・(6) VADJ: Voltage at ADJ terminal (0.8V Typ.)

With R1 and R2 adjusted, the output voltage may be determined as required.

(Adjustable output voltage range： 1.0V～3.3V )

L

6

1

Output

SW

Co

R2

R1

ADJ

Use 1 kꢀ～100 kꢀ resistor for R1. If a resistor of the resistance higher than

100 kꢀ is used, check the assembled set carefully for ripple voltage etc.

Fig.33 Determination of output voltage

●BD9161FVM Cautions on PC Board layout

ADJ

ITH

EN

VCC

PVCC

SW

1

2

3

4

8

7

6

5

RIN

VCC

RITH

CIN

①

L

EN

VOUT

CITH

CO

GND

PGND

GND

②

③

Fig.34 Board layout

①

②

For the sections drawn with heavy line, use thick conductor pattern as short as possible.

Lay out the input ceramic capacitor CIN closer to the pins PVCC and PGND, and the output capacitor Co closer to the

pin PGND.

③

Lay out CITH and RITH between the pins ITH and GND as neat as possible with least necessary wiring.

●Recommended component lists with above applications

Symbol

Part

Value

Manufacturer

TDK

Series

VLF5014AT-4R7M1R1

CMD6D11B

L

Coil

4.7μH

Sumida

ROHM

Kyocera

murata

ROHM

RIN

CIN

CO

Resistance

10ꢀ

10μF

MCR03 Series

CM316X5R106K10A

GRM18 Series

MCR03 Series

Ceramic capacitor

V_OUT=1.0V

820pF

560pF

470pF

330pF

6.8kꢀ

8.2kꢀ

12kꢀ

V_OUT=1.2V

V_OUT=1.5V

V_OUT=1.8V

V_OUT=2.5V

V_OUT=1.0V

V_OUT=1.2V

V_OUT=1.5V

V_OUT=1.8V

V_OUT=2.5V

CITH

RITH

Resistance

12kꢀ

15kꢀ

* The parts list presented above is an example of recommended parts. Although the parts are sound, actual circuit characteristics should be checked on your

application carefully before use. Be sure to allow sufficient margins to accommodate variations between external devices and this IC when employing the

depicted circuit with other circuit constants modified. Both static and transient characteristics should be considered in establishing these margins. When

switching noise is substantial and may impact the system, a low pass filter should be inserted between the VCC and PVCC pins, and a schottky barrier

diode established between the SW and PGND pins.

www.rohm.com

2009.05 - Rev.A

10/13

Technical Note

BD9161FVM

●I/O equivalence circuit

PVCC

・SW pin

・EN pin

10kΩ

EN

SW

・ITH pin

・ADJ pin

VCC

10kΩ

ADJ

ITH

Fig.36 I/O equivalence circuit

www.rohm.com

2009.05 - Rev.A

11/13

Technical Note

BD9161FVM

●Cautions on use

1. Absolute Maximum Ratings

While utmost care is taken to quality control of this product, any application that may exceed some of the absolute

maximum ratings including the voltage applied and the operating temperature range may result in breakage. If broken,

short-mode or open-mode may not be identified. So if it is expected to encounter with special mode that may exceed the

absolute maximum ratings, it is requested to take necessary safety measures physically including insertion of fuses.

2. Electrical potential at GND

GND must be designed to have the lowest electrical potential In any operating conditions.

3. Short-circuiting between terminals, and mismounting

When mounting to pc board, care must be taken to avoid mistake in its orientation and alignment. Failure to do so may

result in IC breakdown. Short-circuiting due to foreign matters entered between output terminals, or between output

and power supply or GND may also cause breakdown.

4.Operation in Strong electromagnetic field

Be noted that using the IC in the strong electromagnetic radiation can cause operation failures.

5. Thermal shutdown protection circuit

Thermal shutdown protection circuit is the circuit designed to isolate the IC from thermal runaway, and not intended to

protect and guarantee the IC. So, the IC the thermal shutdown protection circuit of which is once activated should not

be used thereafter for any operation originally intended.

6. Inspection with the IC set to a pc board

If a capacitor must be connected to the pin of lower impedance during inspection with the IC set to a pc board, the

capacitor must be discharged after each process to avoid stress to the IC. For electrostatic protection, provide proper

grounding to assembling processes with special care taken in handling and storage. When connecting to jigs in the

inspection process, be sure to turn OFF the power supply before it is connected and removed.

7. Input to IC terminals

This is a monolithic IC with P⁺isolation between P-substrate and each element as illustrated below. This P-layer and

the N-layer of each element form a P-N junction, and various parasitic element are formed.

If a resistor is joined to a transistor terminal as shown in Fig 37:

○P-N junction works as a parasitic diode if the following relationship is satisfied; GND>Terminal A (at resistor side), or

GND>Terminal B (at transistor side); and

○if GND>Terminal B (at NPN transistor side),

a parasitic NPN transistor is activated by N-layer of other element adjacent to the above-mentioned parasitic diode.

The structure of the IC inevitably forms parasitic elements, the activation of which may cause interference among circuits,

and/or malfunctions contributing to breakdown. It is therefore requested to take care not to use the device in such

manner that the voltage lower than GND (at P-substrate) may be applied to the input terminal, which may result in

activation of parasitic elements.

Resistor

Transistor (NPN)

B

Pin A

Pin B

C

E

Pin A

B

C

E

N

P⁺

N

P

Parasitic

element

N

Parasitic

element

P substrate

GND

Parasitic element

Other adjacent elements

Fig.37 Simplified structure of monorisic IC

8. Ground wiring pattern

If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND

pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that

resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the

small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well.

www.rohm.com

2009.05 - Rev.A

12/13

Technical Note

BD9161FVM

●Ordering part number

B D

9

1

6

1

F

V

M - T

R

Part No.

Package

Packaging and forming specification

TR: Embossed tape and reel

(MSOP8)

Part No.

FVM:MSOP8

MSOP8

2.9 0.1

(MAX 3.25 include BURR)

Tape

Embossed carrier tape

3000pcs

+

6°

4°

Quantity

−4°

8

7

6

5

TR

Direction

of feed

The direction is the 1pin of product is at the upper right when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

1

2

3

4

1PIN MARK

1pin

+0.05

0.145

–0.03

0.475

S

+0.05

0.22

–0.04

0.08

S

Direction of feed

Order quantity needs to be multiple of the minimum quantity.

0.65

Reel

(Unit : mm)

∗

www.rohm.com

2009.05 - Rev.A

13/13

Notice

N o t e s

No copying or reproduction of this document, in part or in whole, is permitted without the

consent of ROHM Co.,Ltd.

The content speciﬁed herein is subject to change for improvement without notice.

The content speciﬁed herein is for the purpose of introducing ROHM's products (hereinafter

"Products"). If you wish to use any such Product, please be sure to refer to the speciﬁcations,

which can be obtained from ROHM upon request.

Examples of application circuits, circuit constants and any other information contained herein

illustrate the standard usage and operations of the Products. The peripheral conditions must

be taken into account when designing circuits for mass production.

Great care was taken in ensuring the accuracy of the information speciﬁed in this document.

However, should you incur any damage arising from any inaccuracy or misprint of such

information, ROHM shall bear no responsibility for such damage.

The technical information speciﬁed herein is intended only to show the typical functions of and

examples of application circuits for the Products. ROHM does not grant you, explicitly or

implicitly, any license to use or exercise intellectual property or other rights held by ROHM and

other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the

use of such technical information.

The Products speciﬁed in this document are intended to be used with general-use electronic

equipment or devices (such as audio visual equipment, ofﬁce-automation equipment, commu-

nication devices, electronic appliances and amusement devices).

The Products speciﬁed in this document are not designed to be radiation tolerant.

While ROHM always makes efforts to enhance the quality and reliability of its Products, a

Product may fail or malfunction for a variety of reasons.

Please be sure to implement in your equipment using the Products safety measures to guard

against the possibility of physical injury, ﬁre or any other damage caused in the event of the

failure of any Product, such as derating, redundancy, ﬁre control and fail-safe designs. ROHM

shall bear no responsibility whatsoever for your use of any Product outside of the prescribed

scope or not in accordance with the instruction manual.

The Products are not designed or manufactured to be used with any equipment, device or

system which requires an extremely high level of reliability the failure or malfunction of which

may result in a direct threat to human life or create a risk of human injury (such as a medical

instrument, transportation equipment, aerospace machinery, nuclear-reactor controller,

fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of

any of the Products for the above special purposes. If a Product is intended to be used for any

such special purpose, please contact a ROHM sales representative before purchasing.

If you intend to export or ship overseas any Product or technology speciﬁed herein that may

be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to

obtain a license or permit under the Law.

Thank you for your accessing to ROHM product informations.

More detail product informations and catalogs are available, please contact us.

ROHM Customer Support System

http://www.rohm.com/contact/

www.rohm.com

R0039

A


型号：	BD9161FVM
厂家：	ROHM
描述：	Output 1.5A or Less High-efficiency Step-down Switching Regulator with Built-in Power MOSFET 输出1.5A或更少的高效率降压开关稳压器具有内置功率MOSFET 稳压器开关
文件：	总15页 (文件大小：394K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BD9161FVM [ROHM]

相关型号：

BD9161FVM-LB

BD9161FVM-LBTR

BD9161FVM_12

BD91N01NUX

BD9202EFS

BD9203EFV

BD9204F

BD9206EFV

BD9206EFV-E2

BD9207FPS

BD92111F

BD92111F-E2