SSM9975M [SSC]
DUAL N-CHANNEL ENHANCEMENT-MODE POWER MOSFETS; 双N沟道增强型功率MOSFET
| 型号： | SSM9975M |
| 厂家： | 
SILICON STANDARD CORP. |
| 描述： | DUAL N-CHANNEL ENHANCEMENT-MODE POWER MOSFETS |
| 文件： | 总5页 (文件大小：238K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SSM9975M/GM
DUAL N-CHANNEL ENHANCEMENT-MODE POWER MOSFETS
Simple drive requirement
Lower gate charge
BV DSS
R DS(ON)
ID
60V
21mΩ
7.6A
D2
D2
D1
D1
Fast switching characteristics
G2
S2
G1
SO-8
S1
Description
D2
S2
D1
Advanced Power MOSFETs from Silicon Standard provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and cost-effectiveness.
G2
G1
S1
The SSM9975M is in the SO-8 package, which is widely preferred for
commercial and industrial surface mount applications, and is well suited
for low voltage applications such as DC/DC converters.
This device is available with Pb-free lead finish (second-level interconnect) as SSM9975GM.
Absolute Maximum Ratings
Symbol
Parameter
Rating
60
Units
V
VDS
VGS
Drain-Source Voltage
± 25
Gate-Source Voltage
V
ID @ TA=25°C
ID @ TA=100°C
IDM
Continuous Drain Current3
Continuous Drain Current3
Pulsed Drain Current1
7.6
A
6.1
A
30
A
PD @ TA=25°C
Total Power Dissipation
2
W
Linear Derating Factor
0.016
-55 to 150
-55 to 150
W/°C
°C
°C
TSTG
TJ
Storage Temperature Range
Operating Junction Temperature Range
Thermal Data
Symbol
Parameter
Value
62.5
Unit
Rthj-a
Thermal Resistance Junction-ambient3
Max.
°C/W
12/10/2004 Rev.2.01
www.SiliconStandard.com
1 of 5
SSM9975M/GM
Electrical Characteristics @ Tj=25oC (unless otherwise specified)
Symbol
BVDSS
Parameter
Test Conditions
VGS=0V, ID=250uA
Min. Typ. Max. Units
Drain-Source Breakdown Voltage
60
-
-
0.06
-
-
V
∆BVDSS/ ∆Tj
Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA
Static Drain-Source On-Resistance2 VGS=10V, ID=7A
VGS=4.5V, ID=5A
-
V/°C
mΩ
RDS(ON)
-
21
-
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
12
-
-
-
26
6
14
14
7
27
3
-
mΩ
V
S
VGS(th)
gfs
IDSS
Gate Threshold Voltage
VDS=VGS, ID=250uA
VDS=10V, ID=7A
Forward Transconductance
Drain-Source Leakage Current (T=25oC)
uA
uA
nA
nC
nC
nC
ns
ns
ns
ns
pF
pF
pF
Ω
j
VDS=60V, VGS=0V
VDS=48V ,VGS=0V
1
25
±100
40
-
Drain-Source Leakage Current (T=70oC)
j
IGSS
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Rg
±25V
Gate-Source Leakage
Total Gate Charge2
Gate-Source Charge
Gate-Drain ("Miller") Charge
Turn-on Delay Time2
Rise Time
Turn-off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
VGS
=
ID=7A
VDS=48V
VGS=4.5V
VDS=30V
ID=1A
RG=3.3Ω , VGS=10V
RD=30Ω
-
-
-
-
40
13
2320 3700
200
170
0.86
-
VGS=0V
VDS=25V
f=1.0MHz
f=1.0MHz
-
-
-
Source-Drain Diode
Symbol
Parameter
Test Conditions
IS=1.7A, VGS=0V
IS=7A, VGS=0V,
dI/dt=100A/µs
Min. Typ. Max. Units
VSD
trr
Qrr
Forward On Voltage2
-
-
-
-
34
48
1.2
-
-
V
ns
nC
Reverse Recovery Time2
Reverse Recovery Charge
Notes:
1.Pulse width limited by max. junction temperature.
2.Pulse width <300us , duty cycle <2%.
3.Surface mounted on 1 in2 copper pad of FR4 board ; 135°C/W when mounted on min. copper pad.
12/10/2004 Rev.2.01
www.SiliconStandard.com
2 of 5
SSM9975M/GM
100
80
60
40
20
0
130
117
104
91
78
65
52
39
26
13
0
10V
7.0V
A = 25 o
C
10V
7.0V
T
T A = 1 5 0 o
C
5.0V
4.5V
5.0V
4.5V
V G =3.0V
V G =3.0V
0
2
4
6
8
10
12
0
2
4
6
8
10
12
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
27
2.5
2.0
1.5
1.0
0.5
0.0
I D = 5 A
I D = 7 A
T
A =25 o C
V
G =10V
25
23
21
19
-50
0
50
100
150
3
5
7
9
11
T j , Junction Temperature ( o C)
V GS , Gate-to-Source Voltage (V)
Fig 3. On-Resistance vs. Gate Voltage
Fig 4. Normalized On-Resistance
vs. Junction Temperature
7
6
5
4
3
2
1
0
2.5
2
1.5
T j =25 o C
T j =150 o C
1
0.5
-50
0
50
100
150
0
0.2
0.4
0.6
0.8
1
1.2
T j ,Junction Temperature ( o C)
V SD , Source-to-Drain Voltage (V)
Fig 5. Forward Characteristic of
Reverse Diode
Fig 6. Gate Threshold Voltage vs.
Junction Temperature
12/10/2004 Rev.2.01
www.SiliconStandard.com
3 of 5
SSM9975M/GM
f=1.0MHz
14
12
10
8
10000
1000
100
I D = 7 A
V DS =48V
DS =38V
V
C iss
V DS =30V
6
4
C oss
C rss
2
0
0
10
20
30
40
50
60
1
5
9
13
17
21
25
29
V DS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
100
1
Duty factor=0.5
0.2
10
0.1
0.1
1ms
0.05
10ms
1
PDM
0.02
t
T
100ms
0.01
Duty factor = t/T
0.01
Peak Tj = PDM x Rthja + Ta
Rthja = 135°C/W
0.1
Single Pulse
1s
T A =25 o C
Single Pulse
DC
0.01
0.001
0.1
1
10
100
1000
0.0001
0.001
0.01
0.1
1
10
100
1000
V DS , Drain-to-Source Voltage (V)
t , Pulse Width (s)
Fig 9. Maximum Safe Operating Area
Fig 10. Effective Transient Thermal Impedance
VG
VDS
90%
QG
4.5V
QGS
QGD
10%
VGS
tr
td(on)
td(off) tf
Q
Charge
Fig 11. Switching Time Waveform
Fig 12. Gate Charge Waveform
12/10/2004 Rev.2.01
www.SiliconStandard.com
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SSM9975M/GM
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
12/10/2004 Rev.2.01
www.SiliconStandard.com
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