VNH3SP30TR-E [STMICROELECTRONICS]
Automotive fully integrated H-bridge motor driver; 汽车完全集成H桥电机驱动器
| 型号： | VNH3SP30TR-E |
| 厂家： | 
ST |
| 描述： | Automotive fully integrated H-bridge motor driver |
| 文件： | 总33页 (文件大小：639K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
VNH3SP30-E
Automotive fully integrated H-bridge motor driver
Features
Type
RDS(on)
Iout
Vccmax
45mΩ max
(per leg)
VNH3SP30-E
30A
40V
MultiPowerSO-30™
■ Output current: 30A
■ 5V logic level compatible inputs
■ Undervoltage and overvoltage shutdown
■ Overvoltage clamp
The low-side switches are vertical MOSFETs
manufactured using STMicroelectronics
proprietary EHD (“STripFET™”) process.The
three circuits are assembled in a MultiPowerSO-
30 package on electrically isolated lead frames.
This package, specifically designed for the harsh
automotive environment, offers improved thermal
performance thanks to exposed die pads.
■ Thermal shut down
■ Cross-conduction protection
■ Linear current limiter
■ Very low standby power consumption
■ PWM operation up to 10 kHz
■ Protection against loss of ground and loss of
Moreover, its fully symmetrical mechanical design
provides superior manufacturability at board level.
The input signals IN and IN can directly
A
B
V
CC
interface with the microcontroller to select the
motor direction and the brake condition. Pins
®
■ Package: ECOPACK
DIAG /EN or DIAG /EN , when connected to an
A
A
B
B
Description
external pull-up resistor, enable one leg of the
bridge. They also provide a feedback digital
diagnostic signal. The normal condition operation
is explained in The speed of the motor can be
controlled in all possible conditions by the PWM
up to kHz. In all cases, a low level state on the
The VNH3SP30-E is a full-bridge motor driver
intended for a wide range of automotive
applications. The device incorporates a dual
monolithic high-side driver (HSD) and two low-
side switches. The HSD switch is designed using
STMicroelectronics proprietary VIPower™ M0-3
technology that efficiently integrates a true Power
MOSFET with an intelligent signal/protection
circuit on the same die.
PWM pin will turn off both the LS and LS
A
B
switches. When PWM rises to a high level, LS or
A
LS turn on again depending on the input pin
B
state.
Table 1.
Device summary
Package
Tube
VNH3SP30-E
Tape & reel
MultiPowerSO-30
VNH3SP30TR-E
November 2007
Rev 6
1/33
www.st.com
33
Contents
VNH3SP30-E
Contents
1
2
Block diagram and pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1
2.2
2.3
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3
4
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.1
3.2
3.3
Reverse battery protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Open load detection in Off mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Test mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.1
MultiPowerSO-30 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.1.1
Thermal calculation in clockwise and anti-clockwise operation in steady-
state mode 26
4.1.2
Thermal resistances definition
(values according to the PCB heatsink area) . . . . . . . . . . . . . . . . . . . . . 26
4.1.3
4.1.4
Thermal calculation in transient mode . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Single pulse thermal impedance definition
(values according to the PCB heatsink area) . . . . . . . . . . . . . . . . . . . . . 26
5
6
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.1
5.2
5.3
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
MultiPowerSO-30 package mechanical data . . . . . . . . . . . . . . . . . . . . . . 29
Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
2/33
VNH3SP30-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Block description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin definitions and functions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin functions description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic inputs (INA, INB, ENA, ENB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
PWM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Switching (V = 13V, R
= 1.1Ω, unless otherwise specified) . . . . . . . . . . . . . . . . . . 10
CC
LOAD
Protection and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Truth table in normal operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Truth table in fault conditions (detected on OUTA). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Thermal calculation in clockwise and anti-clockwise operation in steady-state mode . . . . 26
Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
MultiPowerSO-30 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
3/33
List of figures
VNH3SP30-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Definition of the delay times measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Definition of the low side switching times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Definition of the high side switching times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
On state supply current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Off state supply current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
High level input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 11. Input high level voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 12. Input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 13. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 14. High level enable pin current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 15. Delay time during change of operation mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 16. Enable clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 17. High level enable voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 18. Low level enable voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 19. PWM high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 20. PWM low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 21. PWM high level current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 22. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 23. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 24. Current limitation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 25. On state high side resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 26. On state low side resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 27. On state high side resistance vs Vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 28. On state low side resistance vs Vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 29. Output voltage rise time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 30. Output voltage fall time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 31. Enable output low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 32. ON state leg resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 33. Typical application circuit for DC to 10 kHz PWM operation short circuit protection . . . . . 20
Figure 34. Half-bridge configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 35. Multi-motors configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 36. Waveforms in full bridge operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 37. Waveforms in full bridge operation (continued) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 38. MultiPowerSO-30™ PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 39. Chipset configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 40. Auto and mutual Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . 25
Figure 41. MultiPowerSO-30 HSD thermal impedance junction ambient single pulse . . . . . . . . . . . . 27
Figure 42. MultiPowerSO-30 LSD thermal impedance junction ambient single pulse. . . . . . . . . . . . . 27
Figure 43. Thermal fitting model of an H-bridge in MultiPowerSO-30 . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 44. MultiPowerSO-30 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 45. MultiPowerSO-30 suggested pad layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 46. MultiPowerSO-30 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 47. MultiPowerSO-30 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
4/33
VNH3SP30-E
Block diagram and pins description
1
Block diagram and pins description
Figure 1.
Block diagram
Table 2.
Block description
Name
Description
Allows the turn-on and the turn-off of the high side and the low side switches
according to the truth table
Logic control
Overvoltage +
undervoltage
Shuts down the device outside the range [5.5V..36V] for the battery voltage
High side and low
side clamp voltage
Protects the high side and the low side switches from the high voltage on the
battery line in all configurations for the motor
High side and low
side driver
Drives the gate of the concerned switch to allow a proper RDS(on) for the leg of
the bridge
Limits the motor current by reducing the high side switch gate-source voltage
when short-circuit to ground occurs
Linear current limiter
Overtemperature
protection
In case of short-circuit with the increase of the junction’s temperature, shuts
down the concerned high side to prevent its degradation and to protect the die
Signals an abnormal behavior of the switches in the half-bridge A or B by
pulling low the concerned ENx/DIAGx pin
Fault detection
5/33
Block diagram and pins description
VNH3SP30-E
Figure 2.
Configuration diagram (top view)
Table 3.
Pin No
Pin definitions and functions
Symbol
Function
1, 25, 30
OUTA, Heat Slug2 Source of high side switch A / Drain of low side switch A
2, 4, 7, 9, 12,
14, 17, 22, 24, NC
29
Not connected
3, 13, 23
VCC, Heat Slug1
Drain of high side switches and power supply voltage
Status of high side and low side switches A; open drain output
Clockwise input
6
ENA/DIAGA
INA
5
8
PWM
PWM input
11
INB
Counter clockwise input
10
ENB/DIAGB
Status of high side and low side switches B; open drain output
15, 16, 21
26, 27, 28
18, 19, 20
OUTB, Heat Slug3 Source of high side switch B / Drain of low side switch B
GNDA
GNDB
Source of low side switch A(1)
Source of low side switch B(1)
1. GNDA and GNDB must be externally connected together.
6/33
VNH3SP30-E
Block diagram and pins description
Table 4.
Name
VCC
Pin functions description
Description
Battery connection
GNDA, GNDB Power grounds; must always be externally connected together
OUTA, OUTB Power connections to the motor
Voltage controlled input pins with hysteresis, CMOS compatible. These two pins
INA, INB
PWM
control the state of the bridge in normal operation according to the truth table (brake
to VCC, brake to GND, clockwise and counterclockwise).
Voltage controlled input pin with hysteresis, CMOS compatible. Gates of low side
FETs are modulated by the PWM signal during their ON phase allowing speed
control of the motor.
Open drain bidirectional logic pins. These pins must be connected to an external pull
up resistor. When externally pulled low, they disable half-bridge A or B. In case of
fault detection (thermal shutdown of a high side FET or excessive ON state voltage
drop across a low side FET), these pins are pulled low by the device (see truth table
in fault condition).
ENA/DIAGA,
ENB/DIAGB
7/33
Electrical specifications
VNH3SP30-E
2
Electrical specifications
Figure 3.
Current and voltage conventions
2.1
Absolute maximum ratings
Table 5.
Symbol
Absolute maximum ratings
Parameter
Value
Unit
Vcc
Imax1
IR
Supply voltage
-0.3...40
30
V
Maximum output current (continuous)
Reverse output current (continuous)
Input current (INA and INB pins)
Enable input current (DIAGA/ENA and DIAGB/ENB pins)
PWM input current
A
-30
IIN
10
IEN
Ipw
10
mA
10
Electrostatic discharge (R = 1.5kΩ, C = 100pF)
– logic pins
VESD
4
5
kV
kV
– output pins: OUTA, OUTB, VCC
Tj
Junction operating temperature
Case operating temperature
Storage temperature
Internally limited
-40 to 150
Tc
°C
TSTG
-55 to 150
8/33
VNH3SP30-E
Electrical specifications
2.2
Electrical characteristics
Vcc = 9V up to 18V; -40°C < T < 150°C, unless otherwise specified.
j
Table 6.
Symbol
Power section
Parameter
Test Conditions
Min Typ Max Unit
Operating supply
voltage
VCC
5.5
36
V
Off state:
INA = INB = PWM = 0; Tj = 25°C; VCC = 13V
INA = INB = PWM = 0
20
30
40
µA
µA
IS
Supply current
On state:
INA or INB = 5V, no PWM
15 mA
30
IOUT = 12A; Tj = 25°C
23
11
Static high side
resistance
RONHS
IOUT = 12A; Tj = -40 to 150°C
60
mΩ
15
IOUT = 12A; Tj = 25°C
Static low side
resistance
RONLS
IOUT = 12A; Tj = -40 to 150°C
30
High side free-
wheeling diode
forward voltage
Vf
If = 12 A
0.8 1.1
V
High side off state
IL(off) output current
(per channel)
Tj = 25°C; VOUTX = ENX = 0V; VCC = 13V
Tj = 125°C; VOUTX = ENX = 0V; VCC = 13V
3
5
µA
Table 7.
Symbol
Logic inputs (IN , IN , EN , EN )
A B A B
Parameter
Test conditions
Min Typ Max Unit
VIL
VIH
Input low level voltage
Input high level voltage
1.5
Normal operation (DIAGX/ENX pin acts
as an input pin)
3.25
VIHYST Input hysteresis voltage
0.5
6
V
IIN = 1mA
IIN = -1mA
VIN = 1.5V
VIN = 3.25V
6.8
8
VICL
Input clamp voltage
-1 -0.7 -0.3
IINL
IINH
Input low current
Input high current
1
µA
V
10
Enable output low level Fault operation (DIAGX/ENX pin acts as
voltage an output pin); IEN = 1mA
VDIAG
0.4
9/33
Electrical specifications
VNH3SP30-E
Table 8.
Symbol
PWM
Parameter
Test Conditions
Min
Typ
Max
Unit
Vpwl
Ipwl
Vpwh
Ipwh
PWM low level voltage
1.5
V
PWM low level pin
current
V
pw = 1.5V
1
µA
V
PWM high level voltage
3.25
PWM high level pin
current
Vpw = 3.25V
10
µA
Vpwhhyst PWM hysteresis voltage
0.5
I
pw = 1mA
VCC + 0.3 VCC + 0.7
VCC + 1
-2
V
Vpwcl
PWM clamp voltage
Ipw = -1mA
-5
-3.5
-2
Test mode PWM pin
voltage
Vpwtest
Ipwtest
-3.5
-0.5
V
Test mode PWM pin
current
VIN = -2 V
-2000
-500
µA
Table 9.
Symbol
Switching (V = 13V, R
= 1.1Ω, unless otherwise specified)
CC
LOAD
Parameter
Test Conditions
Min
Typ
Max
Unit
f
PWM frequency
0
10
kHz
Input rise time < 1µs
(see Figure 6)
td(on)
Turn-on delay time
Turn-off delay time
100
85
300
255
Input rise time < 1µs
(see Figure 6)
td(off)
µs
tr
tf
Rise time
Fall time
(see Figure 5)
(see Figure 5)
1.5
2
3
5
Delay time during change
of operating mode
tDEL
(see Figure 4)
600
1800
Table 10. Protection and diagnostic
Symbol
Parameter
Test Conditions
Min Typ Max Unit
VUSD
VOV
Undervoltage shut-down
Overvoltage shut-down
Current limitation
5.5
V
36
30
43
45
ILIM
A
TTSD
TTR
Thermal shut-down temperature
Thermal reset temperature
Thermal hysteresis
VIN = 3.25V
150 170 200
135
°C
THYST
7
15
10/33
VNH3SP30-E
Figure 4.
Electrical specifications
Definition of the delay times measurement
V
INA
t
V
INB
t
PWM
t
I
LOAD
tDEL
tDEL
t
Figure 5.
Definition of the low side switching times
PWM
t
V
OUTA, B
90%
80%
tf
tr
t
10%
20%
11/33
Electrical specifications
Figure 6.
VNH3SP30-E
Definition of the high side switching times
V
INA
t
t
D(off)
D(on)
t
V
OUTA
90%
10%
t
12/33
VNH3SP30-E
Electrical specifications
Operating mode
Table 11. Truth table in normal operating conditions
INA INB
DIAGA/ENA
DIAGB/ENB
OUTA
OUTB
1
H
L
Brake to VCC
1
H
0
Clockwise (CW)
1
1
1
H
L
Counterclockwise (CCW)
Brake to GND
0
L
0
Table 12. Truth table in fault conditions (detected on OUT )
A
INA
INB
DIAGA/ENA
DIAGB/ENB
OUTA
OUTB
1
0
1
0
X
1
0
H
1
L
1
H
0
0
OPEN
L
OPEN
H
0
1
X
L
Fault Information
Protection Action
Note:
Notice that saturation detection on the low side power MOSFET is possible only if the
impedance of the short-circuit from the output to the battery is less than 100mΩ when the
device is supplied with a battery voltage of 13.5V.
13/33
Electrical specifications
VNH3SP30-E
Table 13. Electrical transient requirements
ISO T/R - 7637/1 Test Level Test Level Test Level Test Level
Test Levels
Test Pulse
I
II
III
IV
Delays and Impedance
1
2
-25V
+25V
-25V
-50V
+50V
-50V
-75V
+75V
-100V
+75V
-6V
-100V
+100V
-150V
+100V
-7V
2ms, 10Ω
0.2ms, 10Ω
3a
3b
4
0.1µs, 50Ω
+25V
-4V
+50V
-5V
100ms, 0.01Ω
400ms, 2Ω
5
+26.5V
+46.5V
+66.5V
+86.5V
ISO T/R - 7637/1
Test Pulse
Test Levels
Result I
Test Levels
Result II
Test Levels
Result III
Test Levels
Result IV
1
2
3a
3b
4
C
E
C
E
C
E
C
5(1)
1. For load dump exceeding the above value a centralized suppressor must be adopted
Class
Contents
All functions of the device are performed as designed after exposure to
disturbance.
C
One or more functions of the device are not performed as designed after
exposure to disturbance and cannot be returned to proper operation without
replacing the device.
E
14/33
VNH3SP30-E
Electrical specifications
2.3
Electrical characteristics curves
Figure 7.
On state supply current
Figure 8.
Off state supply current
Figure 9.
High level input current
Figure 10. Input clamp voltage
Figure 11. Input high level voltage
Figure 12. Input low level voltage
15/33
Electrical specifications
VNH3SP30-E
Figure 13. Input hysteresis voltage
Figure 14. High level enable pin current
Figure 15. Delay time during change of
operation mode
Figure 16. Enable clamp voltage
Figure 17. High level enable voltage
Figure 18. Low level enable voltage
16/33
VNH3SP30-E
Electrical specifications
Figure 19. PWM high level voltage
Figure 20. PWM low level voltage
Figure 21. PWM high level current
Figure 22. Overvoltage shutdown
Figure 23. Undervoltage shutdown
Figure 24. Current limitation
17/33
Electrical specifications
VNH3SP30-E
Figure 25. On state high side resistance vs
Figure 26. On state low side resistance vs
T
T
case
case
Figure 27. On state high side resistance vs
Vcc
Figure 28. On state low side resistance vs Vcc
Figure 29. Output voltage rise time
Figure 30. Output voltage fall time
18/33
VNH3SP30-E
Electrical specifications
Figure 31. Enable output low level voltage
Figure 32. ON state leg resistance
19/33
Application information
VNH3SP30-E
3
Application information
In normal operating conditions the DIAG /EN pin is considered as an input pin by the
X
X
device. This pin must be externally pulled high.
PWM pin usage: In all cases, a “0” on the PWM pin will turn off both LS and LS switches.
A
B
When PWM rises back to “1”, LS or LS turn on again depending on the input pin state.
A
B
Figure 33. Typical application circuit for DC to 10 kHz PWM operation short circuit
protection
µC
Note:
The value of the blocking capacitor (C) depends on the application conditions and defines voltage and
current ripple onto supply line at PWM operation. Stored energy of the motor inductance may fly back
into the blocking capacitor, if the bridge driver goes into tri-state. This causes a hazardous overvoltage
if the capacitor is not big enough. As basic orientation, 500µF per 10A load current is recommended.
In case of a fault condition the DIAG /EN pin is considered as an output pin by the device.
X
X
The fault conditions are:
●
overtemperature on one or both high sides
●
short to battery condition on the output (saturation detection on the low side power
MOSFET)
20/33
VNH3SP30-E
Possible origins of fault conditions may be:
Application information
●
OUT is shorted to ground →overtemperature detection on high side A.
A
(a)
●
OUT is shorted to VCC →low side power MOSFET saturation detection
.
A
When a fault condition is detected, the user can know which power element is in fault by
monitoring the IN , IN , DIAG /EN and DIAG /EN pins.
A
B
A
A
B
B
In any case, when a fault is detected, the faulty leg of the bridge is latched off. To turn on the
respective output (OUT ) again, the input signal must rise from low to high level.
X
3.1
Reverse battery protection
Three possible solutions can be considered:
1. a Schottky diode
D connected to V pin
CC
2. an N-channel MOSFET connected to the GND pin (see Figure 33: Typical application
circuit for DC to 10 kHz PWM operation short circuit protection on page 20
3. a P-channel MOSFET connected to the V pin
CC
The device sustains no more than -30A in reverse battery conditions because of the two
body diodes of the power MOSFETs. Additionally, in reverse battery condition the I/Os of
VNH3SP30-E will be pulled down to the V line (approximately -1.5V). A series resistor
CC
must be inserted to limit the current sunk from the microcontroller I/Os. If I
maximum target reverse current through µC I/Os, the series resistor is:
is the
Rmax
V
– V
IOs
I
CC
R = --------------------------------
Rmax
3.2
Open load detection in Off mode
It is possible for the microcontroller to detect an open load condition by adding a simply
resistor (for example, 10k ohm) between one of the outputs of the bridge (for example,
OUTB) and one microcontroller input. A possible sequence of inputs and enable signals is
the following: INA = 1, INB = X, ENA = 1, ENB = 0.
●
normal condition: OUTA = H and OUTB = H
●
open load condition: OUTA = H and OUTB = L: In this case the OUTB pin is internally
pulled down to GND. This condition is detected on OUTB pin by the microcontroller as
an open load fault.
a. An internal operational amplifier compares the Drain-Source MOSFET voltage with the internal reference (2.7V
Typ.). The relevant low side power MOS is switched off when its Drain-Source voltage exceeds the reference
voltage.
21/33
Application information
VNH3SP30-E
3.3
Test mode
The PWM pin can be used to test the load connection between two half-bridges. In the Test
mode (Vpwm = -2V) the internal power MOS gate drivers are disabled. The INA or INB inputs
can be used to turn on the high side A or B, respectively, in order to connect one side of the
load at VCC voltage. The check of the voltage on the other side of the load can be used to
verify the continuity of the load connection. In case of load disconnection, the DIADX/ENX
pin corresponding to the faulty output is pulled down.
Figure 34. Half-bridge configuration
V
CC
IN
IN
IN
A
B
A
B
IN
DIAG /EN
DIAG /EN
A
A
A
B
A
B
DIAG /EN
DIAG /EN
B
B
PWM
PWM
OUT
OUT
OUT
OUT
A
M
B
B
A
GND
GND
B
GND
GND
B
A
A
Note:
The VNH3SP30-E can be used as a high power half-bridge driver achieving an On
resistance per leg of 22.5mΩ.
Figure 35. Multi-motors configuration
V
CC
IN
IN
IN
A
B
A
B
IN
DIAG /EN
DIAG /EN
A
A
A
B
A
B
DIAG /EN
DIAG /EN
B
B
PWM
PWM
OUT
OUT
OUT
OUT
A
M2
B
B
A
GND
GND
B
GND
GND
B
A
A
M1
M3
Note:
The VNH3SP30-E can easily be designed in multi-motors driving applications such as seat
positioning systems where only one motor must be driven at a time. DIAG /EN pins allow
X
X
to put unused half-bridges in high impedance.
22/33
VNH3SP30-E
Figure 36. Waveforms in full bridge operation
Application information
23/33
Application information
Figure 37. Waveforms in full bridge operation (continued)
VNH3SP30-E
24/33
VNH3SP30-E
Package and PCB thermal data
4
Package and PCB thermal data
4.1
MultiPowerSO-30 thermal data
Figure 38. MultiPowerSO-30™ PC board
Note:
Layout condition of R and Z measurements (PCB FR4 area = 58mm x 58mm, PCB
th th
thickness = 2mm, Cu thickness = 35µm, Copper areas: from minimum pad layout to
2
16cm ).
Figure 39. Chipset configuration
HIGH SIDE
CHIP
HSAB
LOW SIDE
CHIP A
LOW SIDE
CHIP B
LSB
LSA
Figure 40. Auto and mutual R
condition
vs PCB copper area in open box free air
thj-amb
45
40
35
30
25
20
15
10
5
RthHS
RthLS
RthHSLS
RthLSLS
0
0
5
10
15
20
cm2 of Cu area (refer to PCB layout)
25/33
Package and PCB thermal data
VNH3SP30-E
4.1.1
Thermal calculation in clockwise and anti-clockwise operation in
steady-state mode
Table 14. Thermal calculation in clockwise and anti-clockwise operation in steady-
state mode
HSA HSB LSA LSB
TjHSAB
TjLSA
TjLSB
PdHSA x RthHS + PdLSB PdHSA x RthHSLS
+
PdHSA x RthHSLS + PdLSB
ON OFF OFF ON
x RthHSLS + Tamb
PdLSB x RthLSLS + Tamb x RthLS + Tamb
P
dHSB x RthHS + PdLSA PdHSB x RthHSLS
+
PdHSB x RthHSLS + PdLSA
x RthLSLS + Tamb
OFF ON ON OFF
x RthHSLS + Tamb
PdLSA x RthLS + Tamb
4.1.2
Thermal resistances definition
(values according to the PCB heatsink area)
R
= R
= R
= High Side Chip Thermal Resistance Junction to Ambient (HS or
thHS
thHSA
thHSB
A
HS in ON state)
B
R
R
= R
= R
thLSA
= Low Side Chip Thermal Resistance Junction to Ambient
thLS
thLSB
= R
= R
= Mutual Thermal Resistance Junction to Ambient
thHSBLSA
thHSLS
thHSALSB
between High Side and Low Side Chips
R
= R
= Mutual Thermal Resistance Junction to Ambient between Low Side
thLSALSB
thLSLS
Chips
(b)
4.1.3
4.1.4
Thermal calculation in transient mode
T
T
T
= Z
x P
+ Z
x (P
+ P
) + T
dLSB amb
jHSAB
thHS
dHSAB
thHSLS
dLSA
= Z
x P
x P
+ Z
+ Z
x P
+ Z
x P
x P
+ T
amb
jLSA
jLSB
thHSLS
thHSLS
dHSAB
dHSAB
thLS
dLSA
thLSLS
dLSB
dLSB
= Z
x P
+ Z
+ T
amb
thLSLS
dLSA
thLS
Single pulse thermal impedance definition
(values according to the PCB heatsink area)
Z
Z
Z
= High Side Chip Thermal Impedance Junction to Ambient
thHS
= Z
= Z
= Low Side Chip Thermal Impedance Junction to Ambient
thLSB
thLS
thLSA
= Z
= Z
= Mutual Thermal Impedance Junction to Ambient
thHSLS
thHSABLSA
thHSABLSB
between High Side and Low Side Chips
Z
= Z = Mutual Thermal Impedance Junction to Ambient between Low Side
thLSLS
thLSALSB
Chips
b. Calculation is valid in any dynamic operating condition. Pd values set by user.
26/33
VNH3SP30-E
Equation 1: pulse calculation formula
Package and PCB thermal data
Z
= R
⋅ δ + Z
(1 – δ)
THδ
where
TH
δ = t ⁄ T
THtp
p
Figure 41. MultiPowerSO-30 HSD thermal impedance junction ambient single pulse
100
Footprint
4 cm2
8 cm2
ZthHS
16 cm2
Footprint
4 cm2
10
8 cm2
16 cm2
ZthHSLS
1
0.1
0.001
0.01
0.1
1
10
100
1000
time (sec)
Figure 42. MultiPowerSO-30 LSD thermal impedance junction ambient single pulse
100
Footprint
4 cm2
8 cm2
16 cm2
Footprint
4 cm2
10
8 cm2
16 cm2
1
0,1
0,001
0,01
0,1
time (sec)
1
10
100
1000
27/33
Package and PCB thermal data
Figure 43. Thermal fitting model of an H-bridge in MultiPowerSO-30
VNH3SP30-E
(1)
Table 15. Thermal parameters
Area/island (cm2)
Footprint
4
8
16
R1 = R7 (°C/W)
0.05
0.3
R2 = R8 (°C/W)
R3 (°C/W)
0.5
R4 (°C/W)
1.3
R5 (°C/W)
14
R6 (°C/W)
44.7
0.6
39.1
36.1
31.6
30.4
23.7
20.8
R9 = R10= R15= R16 (°C/W)
R11 = R17 (°C/W)
R12 = R18 (°C/W)
R13 = R19 (°C/W)
R14 = R20 (°C/W)
R21 = R22 = R23 (°C/W)
C1 = C7 = C9 = C15 (W.s/°C)
C2 = C8 (W.s/°C)
C3 = (W.s/°C)
0.8
1.5
20
46.9
115
0.001
0.005
0.02
0.3
C4 = C13 = C19 (W.s/°C)
C5 (W.s/°C)
0.6
C6 (W.s/°C)
5
7
9
11
C10 = C11= C16 = C17 (W.s/°C)
C12 = C18 (W.s/°C)
C14 = C20 (W.s/°C)
0.003
0.075
2.5
3.5
4.5
5.5
1. The blank space means that the value is the same as the previous one.
28/33
VNH3SP30-E
Package and packing information
5
Package and packing information
5.1
ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second-level interconnect. The category of
Second-Level Interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97.
The maximum ratings related to soldering conditions are also marked on the inner box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
5.2
MultiPowerSO-30 package mechanical data
Figure 44. MultiPowerSO-30 package outline
29/33
Package and packing information
VNH3SP30-E
Table 16. MultiPowerSO-30 mechanical data
Millimeters
Typ
Symbol
Min
Max
A
A2
A3
B
2.35
2.25
0.1
1.85
0
0.42
0.23
17.1
18.85
15.9
0.58
0.32
17.3
19.15
16.1
C
D
17.2
E
E1
e
16
1
F1
F2
F3
L
5.55
4.6
9.6
0.8
6.05
5.1
10.1
1.15
10deg
7deg
N
S
0deg
Figure 45. MultiPowerSO-30 suggested pad layout
30/33
VNH3SP30-E
Package and packing information
5.3
Packing information
Note:
The devices can be packed in tube or tape and reel shipments (see the Device summary on
page 1 for packaging quantities).
Figure 46. MultiPowerSO-30 tube shipment (no suffix)
Dimension
mm
532
A
Tube length ( 0.5)
A
3.82
23.6
0.8
B
C
B
C ( 0.13)
Figure 47. MultiPowerSO-30 tape and reel shipment (suffix “TR”)
Reel dimensions
Dimension
mm
A (max)
B (min)
330
1.5
C ( 0.2)
D (min)
13
20.2
32
G (+ 2 / -0)
N (min)
100
38.4
T (max)
Tape dimensions
According to Electronic Industries
Association (EIA) Standard 481 rev. A, Feb
1986
Description
Dimension
mm
Tape width
W
32
4
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
P0 ( 0.1)
P
24
D ( 0.1/-0)
D1 (min)
F ( 0.1)
1.5
2
14.2
End
Start
Top
cover
tape
No components
500 mm min
Components
No components
500 mm min
Empty components pockets
User direction of feed
31/33
Revision history
VNH3SP30-E
6
Revision history
Table 17. Document revision history
Date
Revision
Description of changes
Initial release of lead-free version based on the VNH3SP30 datasheet
(May 2004 - Rev.1)
Aug-2004
Aug- 2005
1
2
Modified figure 5
Document converted into new ST corporate template.
Changed document title .
Changed features on page 1 to add ECOPACK® package.
Added section 1: device block description on page 5.
Added section 2: pinout description on page 6.
Added section 3: maximum ratings on page 8.
Added section 4: electrical characteristics on page 9.
Added “low” and “high” to parameters for IINL and IINH in Table 6 on
page 9.
20-Dec-2006
3
Added section 5: Waveforms and truth table on page 12.
Changed first of two fault conditions in section 5 on page 12.
Inserted note in Figure 4 on page 12.
Added vertical limitation line to left side arrow of tD(off) to Figure 7 on
page 17.
Added section 6: thermal data on page 26.
Added section 7: package characteristics on page 30.
Added section 8: packaging information on page 32.
Updated disclaimer (last page) to include a mention about the use of
ST products in automotive applications.
Document reformatted.
Changed Table 6: Power section on page 9 : supply current and
static resistance values.
20-Jun-2007
4
Added Table 7: Logic inputs (INA, INB, ENA, ENB) on page 9 : VDIAG
.
ROW
Deleted Enable (Logic I/O pin) Table.
13-Sep-2007
15-Nov-2007
5
6
Updated Table 2: Block description on page 5.
Corrected Figure 34 note : changed On resistance per leg from 9.5
mΩ to 22.5 mΩ .
32/33
VNH3SP30-E
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT
RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING
APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY,
DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE
GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2007 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -
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www.st.com
33/33
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