VNN7NV04_10 [STMICROELECTRONICS]

OMNIFET II fully autoprotected Power MOSFET; OMNIFET II完全autoprotected功率MOSFET
VNN7NV04_10
型号: VNN7NV04_10
厂家: ST    ST
描述:

OMNIFET II fully autoprotected Power MOSFET
OMNIFET II完全autoprotected功率MOSFET

文件: 总37页 (文件大小:616K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
VNN7NV04, VNS7NV04  
VND7NV04, VND7NV04-1  
OMNIFET II  
fully autoprotected Power MOSFET  
Features  
2
Type  
RDS(on)  
Ilim  
Vclamp  
3
VNN7NV04  
VNS7NV04  
VND7NV04  
VND7NV04-1  
2
1
SOT-223  
SO-8  
60 mΩ  
6 A  
40 V  
Linear current limitation  
Thermal shutdown  
Short circuit protection  
Integrated clamp  
3
3
2
1
1
TO251 (IPAK)  
TO252 (DPAK)  
Low current drawn from input pin  
Diagnostic feedback through input pin  
ESD protection  
Description  
The VNN7NV04, VNS7NV04, VND7NV04  
VND7NV04-1, are monolithic devices designed in  
STMicroelectronics VIPower M0-3 Technology,  
intended for replacement of standard Power  
MOSFETs from DC up to 50 kHz applications.  
Built in thermal shutdown, linear current limitation  
and overvoltage clamp protect the chip in harsh  
environments.  
Direct access to the gate of the Power  
MOSFET (analog driving)  
Compatible with standard Power MOSFET in  
compliance with the 2002/95/EC European  
Directive  
Fault feedback can be detected by monitoring the  
voltage at the input pin.  
Table 1.  
Package  
Device summary  
Tube  
Order codes  
Tube (lead-free)  
Tape and reel  
Tape and reel (lead-free)  
SOT-223  
SO-8  
VNN7NV04  
VNS7NV04  
VND7NV04  
VND7NV04-1  
-
VNN7NV0413TR  
VNS7NV0413TR  
VND7NV0413TR  
-
-
-
-
TO-252  
TO-251  
VND7NV04-E  
VND7NV04-1-E  
VND7NV04TR-E  
-
September 2010  
Doc ID 7383 Rev 3  
1/37  
www.st.com  
1
Contents  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
Contents  
1
2
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
2.1  
2.2  
2.3  
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
3
Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
3.1  
3.2  
3.3  
3.4  
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
SO-8 maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . . 17  
DPAK maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . 18  
SOT-223 maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . 19  
4
5
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20  
4.1  
4.2  
4.3  
SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20  
SOT-223 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
DPAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24  
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27  
5.1  
5.2  
5.3  
5.4  
5.5  
5.6  
5.7  
5.8  
TO-251 (IPAK) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27  
TO-252 (DPAK) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28  
SOT-223 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29  
SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30  
SOT-223 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32  
SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33  
DPAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34  
IPAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35  
6
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36  
2/37  
Doc ID 7383 Rev 3  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
List of tables  
List of tables  
Table 1.  
Table 2.  
Table 3.  
Table 4.  
Table 5.  
Table 6.  
Table 7.  
Table 8.  
Table 9.  
Table 10.  
Table 11.  
Table 12.  
Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
SO-8 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21  
SOT-223 thermal parameter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23  
DPAK thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25  
TO-251 (IPAK) mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27  
TO-252 (DPAK) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28  
SOT-223 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29  
SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30  
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36  
Doc ID 7383 Rev 3  
3/37  
List of figures  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
List of figures  
Figure 1.  
Figure 2.  
Figure 3.  
Figure 4.  
Figure 5.  
Figure 6.  
Figure 7.  
Figure 8.  
Figure 9.  
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Figure 10. Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Figure 11. Static drain-source on resistance vs input voltage (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . 13  
Figure 12. Static drain-source on resistance vs input voltage (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . 13  
Figure 13. Source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Figure 14. Static drain source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Figure 15. Turn-on current slope (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Figure 16. Turn-on current slope (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Figure 17. Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Figure 18. Static drain-source on resistance vs Id. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Figure 19. Input voltage vs input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Figure 20. Turn-off drain source voltage slope (part 1/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Figure 21. Turn-off drain source voltage slope (part 2/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Figure 22. Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Figure 23. Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Figure 24. Normalized on resistance vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Figure 25. Switching time resistive load (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Figure 26. Switching time resistive load (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Figure 27. Normalized input threshold voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Figure 28. Normalized current limit vs junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Figure 29. Step response current limit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Figure 30. SO-8 maximum turn-off current versus load inductance. . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Figure 31. SO-8 demagnetization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Figure 32. DPAK maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . 18  
Figure 33. DPAK demagnetization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18  
Figure 34. SOT-223 maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . 19  
Figure 35. SOT-223 demagnetization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Figure 36. SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20  
Figure 37. Rthj-amb vs PCB copper area in open box free air condition. . . . . . . . . . . . . . . . . . . . . . . 20  
Figure 38. SO-8 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . 21  
Figure 39. Thermal fitting model of an OMNIFET II in SO-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21  
Figure 40. SOT-223 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
Figure 41. Rthj-amb vs PCB copper area in open box free air condition. . . . . . . . . . . . . . . . . . . . . . . 22  
Figure 42. SOT-223 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . 23  
Figure 43. Thermal fitting model of an OMNIFET II in SOT-223 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23  
Figure 44. DPAK PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24  
Figure 45. Rthj-amb vs PCB copper area in open box free air condition. . . . . . . . . . . . . . . . . . . . . . . 24  
Figure 46. DPAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 25  
Figure 47. Thermal fitting model of an OMNIFET II in DPAK. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25  
Figure 48. TO-251 (IPAK) package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28  
4/37  
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VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
List of figures  
Figure 49. TO-252 (DPAK) package dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29  
Figure 50. SOT-223 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30  
Figure 51. SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31  
Figure 52. SOT-223 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32  
Figure 53. SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33  
Figure 54. SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33  
Figure 55. DPAK footprint and tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34  
Figure 56. DPAK tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34  
Figure 57. IPAK tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35  
Doc ID 7383 Rev 3  
5/37  
Block diagram and pin description  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
1
Block diagram and pin description  
Figure 1.  
Block diagram  
DRAIN  
2
Overvoltage  
Clamp  
INPUT  
Gate  
Control  
1
Linear  
Current  
Limiter  
Over  
Temperature  
3
SOURCE  
FC01000  
Figure 2.  
Configuration diagram (top view)  
SO-8 Package(1)  
1
DRAIN  
DRAIN  
DRAIN  
DRAIN  
SOURCE  
SOURCE  
SOURCE  
INPUT  
8
4
5
1. For the pins configuration related to SOT-223, DPAK, IPAK see outlines at page 1.  
6/37  
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VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
Electrical specifications  
2
Electrical specifications  
Figure 3.  
Current and voltage conventions  
ID  
VDS  
DRAIN  
RIN  
IIN  
INPUT  
SOURCE  
VIN  
2.1  
Absolute maximum ratings  
Table 2.  
Absolute maximum ratings  
Value  
SO-8  
Symbol  
Parameter  
Unit  
SOT-223  
DPAK/IPAK  
VDS  
VIN  
IIN  
Drain-source voltage (VIN=0 V)  
Input voltage  
Internally clamped  
Internally clamped  
+/-20  
V
V
Input current  
mA  
Ω
RIN MIN Minimum input series impedance  
150  
ID  
IR  
Drain current  
Internally limited  
-10.5  
A
Reverse DC output current  
A
Electrostatic discharge (R=1.5 KΩ,  
C=100 pF)  
VESD1  
4000  
V
Electrostatic discharge on output pin  
only (R=330 Ω, C=150 pF)  
VESD2  
Ptot  
EMAX  
16500  
4.6  
V
Total dissipation at Tc=25 °C  
7
60  
40  
W
Maximum switching energy  
(L=0.7 mH; RL=0 Ω; Vbat=13.5 V;  
Tjstart=150 ºC; IL=9 A)  
40  
mJ  
mJ  
Maximum switching energy  
(L=0.6 mH; RL=0 Ω; Vbat=13.5 V;  
Tjstart=150 ºC; IL=9 A)  
EMAX  
37  
Tj  
Tc  
Operating junction temperature  
Case operating temperature  
Storage temperature  
Internally limited  
Internally limited  
-55 to 150  
°C  
°C  
°C  
Tstg  
Doc ID 7383 Rev 3  
7/37  
Electrical specifications  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
2.2  
Thermal data  
Table 3.  
Thermal data  
Value  
Symbol  
Parameter  
Unit  
SOT-223  
SO-8  
DPAK  
IPAK  
Rthj-case Thermal resistance junction-case max  
18  
2.1  
2.1  
°C/W  
°C/W  
°C/W  
Rthj-lead  
Rthj-amb  
Thermal resistance junction-lead max  
27  
Thermal resistance junction-ambient max  
96(1)  
90(1)  
65(1)  
102  
1. When mounted on a standard single-sided FR4 board with 0.5 mm2 of Cu (at least 35 µm thick) connected to all DRAIN  
pins.  
2.3  
Electrical characteristics  
-40 °C < T < 150 °C, unless otherwise specified.  
j
Table 4.  
Symbol  
Electrical characteristics  
Parameter  
Test conditions  
Min  
Typ  
Max  
Unit  
Off  
Drain-source clamp  
voltage  
VCLAMP  
VIN=0 V; ID=3.5 A  
40  
45  
55  
V
Drain-source clamp  
threshold voltage  
VCLTH  
VINTH  
IISS  
VIN=0 V; ID=2 mA  
VDS=VIN; ID=1 mA  
VDS=0 V; VIN=5 V  
36  
V
V
Input threshold voltage  
0.5  
2.5  
Supply current from input  
pin  
100  
6.8  
150  
µA  
IIN=1 mA  
IIN=-1 mA  
6
8
Input-source clamp  
voltage  
VINCL  
V
-1.0  
-0.3  
VDS=13 V; VIN=0 V; Tj=25 °C  
VDS=25 V; VIN=0 V  
30  
75  
Zero input voltage drain  
current (VIN=0 V)  
IDSS  
µA  
On  
VIN=5 V; ID=3.5 A; Tj=25 °C  
VIN=5 V; ID=3.5 A  
60  
Static drain-source on  
resistance  
RDS(on)  
mΩ  
120  
Dynamic (Tj=25 °C, unless otherwise specified)  
Forward  
transconductance  
(1)  
gfs  
VDD=13 V; ID=3.5 A  
9
S
COSS  
Output capacitance  
VDS=13 V; f=1 MHz; VIN=0 V  
220  
pF  
8/37  
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VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
Electrical specifications  
Table 4.  
Symbol  
Electrical characteristics (continued)  
Parameter Test conditions  
Min  
Typ  
Max  
Unit  
Switching (Tj=25 °C, unless otherwise specified)  
td(on)  
tr  
td(off)  
tf  
td(on)  
tr  
td(off)  
tf  
Turn-on delay time  
Rise time  
100  
470  
500  
350  
0.75  
4.6  
300  
1500  
1500  
1000  
2.3  
ns  
ns  
ns  
ns  
µs  
µs  
µs  
µs  
V
DD=15 V; ID=3.5 A  
Vgen=5 V; Rgen=RIN MIN=150 Ω  
(see figure Figure 4.)  
Turn-off delay time  
Fall time  
Turn-on delay time  
Rise time  
VDD=15 V; ID=3.5 A  
Vgen=5 V; Rgen=2.2 KΩ  
(see figure Figure 4.)  
14.0  
16.0  
11.0  
Turn-off delay time  
Fall time  
5.4  
3.6  
VDD=15 V; ID=3.5 A  
(dI/dt)on Turn-on current slope  
6.5  
18  
A/µs  
nC  
Vgen=5 V; Rgen=RIN MIN=150 Ω  
VDD=12 V; ID=3.5 A; VIN=5 V  
Qi  
Total input charge  
Igen=2.13 mA (see figure Figure 7.)  
Source drain diode (Tj=25 °C, unless otherwise specified)  
(1)  
VSD  
trr  
Forward on voltage  
ISD=3.5 A; VIN=0 V  
0.8  
220  
0.28  
2.5  
V
ns  
µC  
A
Reverse recovery time  
ISD=3.5 A; dI/dt=20 A/µs  
Qrr  
Reverse recovery charge VDD=30 V; L=200 µH  
(see test circuit, figure Figure 5.)  
IRRM  
Reverse recovery current  
Protections (-40 °C < Tj < 150 °C, unless otherwise specified)  
Ilim  
Drain current limit  
VIN=5 V; VDS=13 V  
VIN=5 V; VDS=13 V  
6
9
12  
A
Step response current  
limit  
tdlim  
4.0  
µs  
Over temperature  
shutdown  
Tjsh  
150  
135  
175  
15  
200  
°C  
Tjrs  
Igf  
Over temperature reset  
Fault sink current  
°C  
VIN=5 V; VDS=13 V; Tj=Tjsh  
mA  
starting Tj=25 °C; VDD=24 V  
Single pulse avalanche  
energy  
Eas  
VIN=5 V Rgen=RIN MIN=150 Ω; L=24 mH  
(see figures Figure 6. & Figure 8.)  
200  
mJ  
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %  
Doc ID 7383 Rev 3  
9/37  
Protection features  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
3
Protection features  
During normal operation, the input pin is electrically connected to the gate of the internal  
Power MOSFET through a low impedance path.  
The device then behaves like a standard Power MOSFET and can be used as a switch from  
DC up to 50 kHz. The only difference from the user’s standpoint is that a small DC current  
I
(typ. 100µA) flows into the input pin in order to supply the internal circuitry.  
ISS  
The device integrates:  
Overvoltage clamp protection: internally set at 45 V, along with the rugged avalanche  
characteristics of the Power MOSFET stage give this device unrivalled ruggedness and  
energy handling capability. This feature is mainly important when driving inductive  
loads.  
Linear current limiter circuit: limits the drain current I to I whatever the input pin  
D
lim  
voltages. When the current limiter is active, the device operates in the linear region, so  
power dissipation may exceed the capability of the heatsink. Both case and junction  
temperatures increase, and if this phase lasts long enough, junction temperature may  
reach the over temperature threshold T  
.
jsh  
Over temperature and short circuit protection: these are based on sensing the chip  
temperature and are not dependent on the input voltage. The location of the sensing  
element on the chip in the power stage area ensures fast, accurate detection of the  
junction temperature. Over temperature cutout occurs in the range 150 to 190 °C, a  
typical value being 170 °C. The device is automatically restarted when the chip  
temperature falls of about 15 °C below shutdown temperature.  
Status feedback: in the case of an over temperature fault condition (T > T ), the  
j jsh  
device tries to sink a diagnostic current I through the input pin in order to indicate fault  
gf  
condition. If driven from a low impedance source, this current may be used in order to  
warn the control circuit of a device shutdown. If the drive impedance is high enough so  
that the input pin driver is not able to supply the current I , the input pin will fall to 0 V.  
gf  
This will not however affect the device operation: no requirement is put on the current  
capability of the input pin driver except to be able to supply the normal operation drive  
current I  
.
ISS  
Additional features of this device are ESD protection according to the Human Body model  
and the ability to be driven from a TTL logic circuit.  
10/37  
Doc ID 7383 Rev 3  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
Protection features  
Figure 4.  
Switching time test circuit for resistive load  
I
D
90%  
10%  
t
t
f
r
t
t
t
d(on)  
t
d(off)  
V
gen  
Figure 5.  
Test circuit for diode recovery times  
A
A
B
D
I
FAST  
DIODE  
L=100uH  
OMNIFET  
S
B
150  
Ω
D
S
VDD  
Rgen  
I
OMNIFET  
Vgen  
8.5  
Ω
Doc ID 7383 Rev 3  
11/37  
Protection features  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
Figure 6.  
Unclamped inductive load test  
circuits  
Figure 7.  
Input charge test circuit  
V
IN  
R
GEN  
V
IN  
P
W
Figure 8.  
Unclamped inductive waveforms  
12/37  
Doc ID 7383 Rev 3  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
Protection features  
3.1  
Electrical characteristics curves  
Figure 9.  
Derating curve  
Figure 10. Transconductance  
Gfs (S)  
20  
18  
16  
14  
12  
10  
8
Vds=13V  
Tj=-40ºC  
Tj=25ºC  
Tj=150ºC  
6
4
2
0
0
1
2
3
4
5
6
7
8
Id(A)  
Figure 11. Static drain-source on resistance  
vs input voltage (part 1/2)  
Figure 12. Static drain-source on resistance  
vs input voltage (part 2/2)  
Rds(on) (mOhm)  
140  
Rds(on) (mOhm)  
120  
110  
120  
Id=3.5A  
Tj=150ºC  
100  
90  
100  
Tj=150ºC  
Id=6A  
80  
70  
60  
Id=1A  
80  
Tj=25ºC  
60  
50  
Tj=25ºC  
40  
Id=6A  
Id=1A  
Tj=-40ºC  
40  
20  
0
30  
Tj= - 40ºC  
Id=6A  
Id=1A  
20  
10  
0
3
3.5  
4
4.5  
5
5.5  
6
6.5  
7
3
3.5  
4
4.5  
Vin(V)  
5
5.5  
6
6.5  
Vin(V)  
Figure 13. Source-drain diode forward  
characteristics  
Figure 14. Static drain source on resistance  
Vsd (mV)  
1000  
Rds(on) (mohms)  
150  
950  
Vin=0V  
900  
125  
Vin=5V  
850  
800  
750  
700  
650  
600  
550  
500  
100  
Tj=150ºC  
75  
50  
Tj=25ºC  
Tj=-40ºC  
25  
0
0
2
4
6
8
10  
12  
14  
0
1
2
3
4
5
6
Id(A)  
Id(A)  
Doc ID 7383 Rev 3  
13/37  
Protection features  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
Figure 16. Turn-on current slope (part 2/2)  
Figure 15. Turn-on current slope (part 1/2)  
di/dt(A/us)  
2.25  
di/dt(A/us)  
8
2
7
Vin=3.5V  
Vin=5V  
1.75  
6
Vdd=15V  
Vdd=15V  
Id=3.5A  
Id=3.5A  
1.5  
5
1.25  
1
4
3
2
1
0.75  
0.5  
0.25  
0
200  
400  
600  
Rg(ohm)  
800  
1000  
900 1100  
100  
300  
500  
700  
100 200 300 400 500 600 700 800 900 1000 1100  
Rg(ohm)  
Figure 17. Transfer characteristics  
Figure 18. Static drain-source on resistance  
vs Id  
Rds(on) (mOhm)  
140  
Idon(A)  
10  
Tj=25ºC  
Tj=-40ºC  
Tj=150ºC  
9
8
7
6
5
4
3
2
1
0
120  
Vds=13.5V  
Vin=3.5V  
100  
Tj=150ºC  
Vin=5V  
80  
60  
40  
20  
0
Vin=3.5V  
Tj=25ºC  
Tj=-40ºC  
Vin=5V  
Vin=3.5V  
Vin=5V  
0
0.5  
1
1.5  
2
2.5  
3
3.5  
4
4.5  
5
5.5  
6
1
1.5  
2
2.5  
3
3.5  
4
4.5  
5
5.5  
Id(A)  
Vin(V)  
Figure 19. Input voltage vs input charge  
Figure 20. Turn-off drain source voltage slope  
(part 1/2)  
dv/dt(V/us)  
300  
Vin(V)  
8
7
250  
Vds=12V  
Id=3.5A  
Vin=5V  
Vdd=15V  
6
200  
Id=3.5A  
5
4
3
2
1
0
150  
100  
50  
0
100 200 300 400 500 600 700 800 900 1000 1100  
0
5
10  
15  
20  
25  
Rg(ohm)  
Qg(nC)  
14/37  
Doc ID 7383 Rev 3  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
Protection features  
Figure 21. Turn-off drain source voltage slope Figure 22. Capacitance variations  
(part 2/2)  
C(pF)  
dv/dt(v/us)  
600  
300  
250  
500  
f=1MHz  
Vin=0V  
Vin=3.5V  
Vdd=15V  
Id=3.5A  
200  
150  
100  
50  
400  
300  
200  
100  
0
200  
400  
600  
Rg(ohm)  
800  
1000  
900 1100  
100  
300  
500  
700  
0
5
10  
15  
20  
25  
30  
35  
Vds(V)  
Figure 23. Output characteristics  
Figure 24. Normalized on resistance vs  
temperature  
v
Rds(on)  
ID(A)  
12  
2.25  
11  
10  
9
2
Vin=5V  
Vin=5V  
Vin=4.5V  
Vin=4V  
Id=3.5A  
1.75  
8
7
1.5  
1.25  
1
Vin=3V  
6
5
4
3
Vin=2.5V  
Vin=2V  
2
0.75  
0.5  
1
0
0
1
2
3
4
5
6
7
8
9
10 11 12 13  
-50  
-25  
0
25  
50  
75  
100 125 150  
175  
VDS(V)  
T(ºC)  
Figure 25. Switching time resistive load (part Figure 26. Switching time resistive load (part  
1/2)  
2/2)  
t(us)  
5.5  
t(ns)  
1600  
tr  
5
4.5  
4
Vdd=15V  
Id=3.5A  
Vin=5V  
1400  
1200  
1000  
800  
600  
400  
200  
0
tr  
tf  
td(off)  
Vdd=15V  
Id=3.5A  
Rg=150ohm  
3.5  
3
2.5  
2
1.5  
1
td(off)  
td(on)  
tf  
td(on)  
0.5  
0
0
250 500 750 1000 1250 1500 1750 2000 2250 2500  
Rg(ohm)  
3.25  
3.5  
3.75  
4
4.25  
Vin(V)  
4.5  
4.75  
5
5.25  
Doc ID 7383 Rev 3  
15/37  
Protection features  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
Figure 27. Normalized input threshold voltage Figure 28. Normalized current limit vs junction  
vs temperature  
temperature  
Vin(th)  
1.15  
Ilim (A)  
15  
14  
13  
12  
11  
10  
9
1.1  
1.05  
1
Vds=13V  
Vin=5V  
Vds=Vin  
Id=1mA  
0.95  
0.9  
0.85  
0.8  
8
7
0.75  
0.7  
6
5
-50  
-25  
0
25  
50  
75  
100 125 150  
175  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
175  
T(ºC)  
Tj (ºC)  
Figure 29. Step response current limit  
Tdlim(us)  
7
6.5  
Vin=5V  
Rg=150ohm  
6
5.5  
5
4.5  
4
3.5  
5
10  
15  
20  
25  
30  
35  
Vdd(V)  
16/37  
Doc ID 7383 Rev 3  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
Protection features  
3.2  
SO-8 maximum demagnetization energy  
Figure 30. SO-8 maximum turn-off current versus load inductance  
LMAX (A)  
I
100  
10  
A
B
C
1
0.1  
1
10  
100  
L(mH)  
Legend  
A = Single Pulse at TJstart=150 °C  
B = Repetitive pulse at TJstart=100 °C  
C = Repetitive Pulse at TJstart=125 °C  
Conditions:  
V
=13.5 V  
CC  
Values are generated with R =0 Ω. In case of repetitive pulses, T  
(at beginning of each  
jstart  
L
demagnetization) of every pulse must not exceed the temperature specified above for  
curves B and C.  
Figure 31. SO-8 demagnetization  
VIN, IL  
Demagnetization  
Demagnetization  
Demagnetization  
t
Doc ID 7383 Rev 3  
17/37  
Protection features  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
3.3  
DPAK maximum demagnetization energy  
Figure 32. DPAK maximum turn-off current versus load inductance  
LMAX (A)  
I
100  
10  
1
0.01  
0.1  
1
10  
100  
L(mH)  
Legend  
A = Single Pulse at TJstart=150 °C  
B = Repetitive pulse at TJstart=100 °C  
C = Repetitive Pulse at TJstart=125 °C  
Conditions:  
V
=13.5 V  
CC  
Values are generated with R =0 Ω. In case of repetitive pulses, T  
(at beginning of each  
jstart  
L
demagnetization) of every pulse must not exceed the temperature specified above for  
curves B and C.  
Figure 33. DPAK demagnetization  
VIN, IL  
Demagnetization  
Demagnetization  
Demagnetization  
t
18/37  
Doc ID 7383 Rev 3  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
Protection features  
3.4  
SOT-223 maximum demagnetization energy  
Figure 34. SOT-223 maximum turn-off current versus load inductance  
LMAX (A)  
I
100  
10  
1
0.01  
0.1  
1
10  
L(mH)  
Legend  
A = Single Pulse at TJstart=150 °C  
B = Repetitive pulse at TJstart=100 °C  
C = Repetitive Pulse at TJstart=125 °C  
Conditions:  
V
=13.5 V  
CC  
Values are generated with R =0 Ω. In case of repetitive pulses, T  
(at beginning of each  
L
jstart  
demagnetization) of every pulse must not exceed the temperature specified above for  
curves B and C.  
Figure 35. SOT-223 demagnetization  
VIN, IL  
Demagnetization  
Demagnetization  
Demagnetization  
t
Doc ID 7383 Rev 3  
19/37  
Package and PCB thermal data  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
4
Package and PCB thermal data  
4.1  
SO-8 thermal data  
Figure 36. SO-8 PC board  
Note:  
Layout condition of R and Z measurements (PCB FR4 area=58 mm x 58 mm, PCB  
th th  
thickness=2 mm, Cu thickness=35 µm, Copper areas: 0.14 cm , 0.8 cm , 2 cm ).  
2
2
2
Figure 37. R  
vs PCB copper area in open box free air condition  
thj-amb  
SO-8 at 2 pins connected to TAB  
RTHj_am b (ºC/W)  
110  
105  
100  
95  
90  
85  
80  
75  
70  
0
0.5  
1
1.5  
2
2.5  
PCBCu heatsink area (cm^2)  
20/37  
Doc ID 7383 Rev 3  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
Package and PCB thermal data  
Figure 38. SO-8 thermal impedance junction ambient single pulse  
ZT H (°C/W)  
1000  
100  
10  
1
0.1  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
Time (s)  
Figure 39. Thermal fitting model of an OMNIFET II in SO-8  
Tj  
C1  
R1  
C2  
R2  
C3  
R3  
C4  
R4  
C5  
R5  
C6  
R6  
Pd  
T_amb  
Equation 1 Pulse calculation formula  
= R ⋅ δ + Z (1 δ)  
Z
THδ  
TH  
THtp  
where δ = t T  
p
Table 5.  
SO-8 thermal parameter  
Area/island (cm2)  
Footprint  
2
R1 (°C/W)  
R2 (°C/W)  
R3 (°C/W)  
R4 (°C/W)  
R5 (°C/W)  
R6 (°C/W)  
C1 (W.s/°C)  
0.2  
0.9  
3.5  
21  
16  
58  
28  
3.00E-04  
Doc ID 7383 Rev 3  
21/37  
Package and PCB thermal data  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
Table 5.  
SO-8 thermal parameter (continued)  
Area/island (cm2)  
Footprint  
2
C2 (W.s/°C)  
C3 (W.s/°C)  
C4 (W.s/°C)  
C5 (W.s/°C)  
C6 (W.s/°C)  
9.00E-04  
7.50E-03  
0.045  
0.35  
1.05  
2
4.2  
SOT-223 thermal data  
Figure 40. SOT-223 PC board  
Note:  
Layout condition of R and Z measurements (PCB FR4 area=58 mm x 58 mm, PCB  
th th  
thickness=2 mm, Cu thickness=35 µm, Copper areas: 0.11 cm , 1 cm , 2 cm ).  
2
2
2
Figure 41. R vs PCB copper area in open box free air condition  
thj-amb  
RTH j-amb (°C/W)  
140  
130  
120  
110  
100  
90  
80  
70  
60  
0
0.5  
1
1.5  
2
2.5  
Cu area (cm^2)  
22/37  
Doc ID 7383 Rev 3  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
Package and PCB thermal data  
Figure 42. SOT-223 thermal impedance junction ambient single pulse  
ZTH (°C/W)  
1000  
100  
10  
1
0.1  
0.0001 0.001  
0.01  
0.1  
1
10  
100  
1000  
Time (s)  
Figure 43. Thermal fitting model of an OMNIFET II in SOT-223  
Tj  
C1  
R1  
C2  
R2  
C3  
R3  
C4  
R4  
C5  
R5  
C6  
R6  
Pd  
T_amb  
Equation 2 Pulse calculation formula  
= R ⋅ δ + Z (1 δ)  
Z
THδ  
TH  
THtp  
where δ = t T  
p
Table 6.  
SOT-223 thermal parameter  
Area/island (cm2)  
Footprint  
2
R1 (°C/W)  
R2 (°C/W)  
R3 (°C/W)  
R4 (°C/W)  
R5 (°C/W)  
R6 (°C/W)  
C1 (W.s/°C)  
0.2  
1.1  
4.5  
24  
0.1  
100  
45  
3.00E-04  
Doc ID 7383 Rev 3  
23/37  
Package and PCB thermal data  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
Table 6.  
SOT-223 thermal parameter (continued)  
Area/island (cm2)  
Footprint  
2
C2 (W.s/°C)  
C3 (W.s/°C)  
C4 (W.s/°C)  
C5 (W.s/°C)  
C6 (W.s/°C)  
9.00E-04  
3.00E-02  
0.16  
1000  
0.5  
2
4.3  
DPAK thermal data  
Figure 44. DPAK PC board  
Note:  
Layout condition of R and Z measurements (PCB FR4 area=60 mm x 60 mm, PCB  
th th  
thickness=2 mm, Cu thickness=35µm, Copper areas: from minimum pad lay-out to 8 cm2).  
Figure 45. R vs PCB copper area in open box free air condition  
thj-amb  
RTH j_amb (ºC/W)  
90  
80  
70  
60  
50  
40  
30  
0
2
4
6
8
10  
PCB CU heatsink area (cm^2)  
24/37  
Doc ID 7383 Rev 3  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
Package and PCB thermal data  
Figure 46. DPAK thermal impedance junction ambient single pulse  
ZTH (°C/W)  
1000  
100  
10  
1
0.1  
0.0001 0.001  
0.01  
0.1  
1
10  
100  
1000  
Time (s)  
Figure 47. Thermal fitting model of an OMNIFET II in DPAK  
Tj  
C1  
C2  
C3  
C4  
C5  
C6  
R1  
R2  
R3  
R4  
R5  
R6  
Pd  
T_amb  
Equation 3 Pulse calculation formula  
= R ⋅ δ + Z (1 δ)  
Z
THδ  
TH  
THtp  
where δ = t T  
p
Table 7.  
DPAK thermal parameter  
2
Area/island (cm )  
Footprint  
6
R1 (°C/W)  
R2 (°C/W)  
R3 (°C/W)  
R4 (°C/W)  
R5 (°C/W)  
R6 (°C/W)  
0.1  
0.35  
1.20  
2
15  
61  
24  
Doc ID 7383 Rev 3  
25/37  
Package and PCB thermal data  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
Table 7.  
DPAK thermal parameter (continued)  
2
Area/island (cm )  
Footprint  
6
C1 (W.s/°C)  
C2 (W.s/°C)  
C3 (W.s/°C)  
C4 (W.s/°C)  
C5 (W.s/°C)  
C6 (W.s/°C)  
0.0006  
0.0021  
0.05  
0.3  
0.45  
0.8  
5
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Package and packing information  
5
Package and packing information  
In order to meet environmental requirements, ST offers these devices in different grades of  
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®  
specifications, grade definitions and product status are available at: www.st.com.  
ECOPACK® is an ST trademark.  
5.1  
TO-251 (IPAK) mechanical data  
Table 8.  
TO-251 (IPAK) mechanical data  
millimeters  
Typ.  
Symbol  
Min.  
Max.  
A
A1  
A3  
B
2.2  
0.9  
2.4  
1.1  
0.7  
1.3  
0.64  
5.2  
0.9  
5.4  
B2  
B3  
B5  
B6  
C
0.85  
0.3  
0.95  
0.6  
0.6  
6.2  
6.6  
4.6  
16.3  
9.4  
1.2  
1
0.45  
0.48  
6
C2  
D
E
6.4  
4.4  
15.9  
9
G
H
L
L1  
L2  
0.8  
0.8  
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Package and packing information  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
Figure 48. TO-251 (IPAK) package dimensions  
5.2  
TO-252 (DPAK) mechanical data  
Table 9.  
TO-252 (DPAK) mechanical data  
millimeters  
Typ.  
Symbol  
Min.  
Max.  
A
A1  
A2  
B
2.20  
0.90  
0.03  
0.64  
5.20  
0.45  
0.48  
6.00  
2.40  
1.10  
0.23  
0.90  
5.40  
0.60  
0.60  
6.20  
B2  
C
C2  
D
D1  
E
5.1  
6.40  
6.60  
E1  
e
4.7  
2.28  
G
4.40  
9.35  
4.60  
H
10.10  
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VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
Package and packing information  
Table 9.  
TO-252 (DPAK) mechanical data (continued)  
millimeters  
Symbol  
Min.  
Typ.  
Max.  
L2  
0.8  
L4  
0.60  
0°  
1.00  
R
V2  
0.2  
8°  
Package Weight  
Gr. 0.29  
Figure 49. TO-252 (DPAK) package dimensions  
P032P  
5.3  
SOT-223 mechanical data  
Table 10. SOT-223 mechanical data  
millimeters  
Typ.  
Symbol  
Min.  
Max.  
A
1.8  
0.85  
3.15  
0.35  
6.7  
B
B1  
c
0.6  
2.9  
0.7  
3
0.24  
6.3  
0.26  
6.5  
2.3  
D
e
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Package and packing information  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
Table 10. SOT-223 mechanical data (continued)  
millimeters  
Typ.  
Symbol  
Min.  
Max.  
e1  
E
4.6  
3.5  
3.3  
6.7  
3.7  
7.3  
H
7
V
10 (max)  
A1  
0.02  
0.1  
Figure 50. SOT-223 package dimensions  
0046067  
5.4  
SO-8 mechanical data  
Table 11.  
SO-8 mechanical data  
millimeters  
Typ  
Symbol  
Min  
Max  
A
a1  
a2  
a3  
b
1.75  
0.25  
1.65  
0.85  
0.48  
1.75  
0.25  
0.1  
0.65  
0.35  
A
A1  
0.10  
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Package and packing information  
Table 11.  
SO-8 mechanical data (continued)  
millimeters  
Typ  
Symbol  
Min  
Max  
A2  
b
1.25  
0.28  
0.17  
4.80  
5.80  
3.80  
0.48  
0.23  
5.00  
6.20  
4.00  
c
D(1)  
4.90  
6.00  
3.90  
1.27  
E
E1(2)  
e
h
0.25  
0.40  
0.50  
1.27  
L
L1  
k
1.04  
0°  
8°  
ccc  
0.10  
1. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs  
shall not exceed 0.15 mm in total (both side).  
2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not  
exceed 0.25 mm per side.  
Figure 51. SO-8 package dimensions  
0016023 D  
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Package and packing information  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
5.5  
SOT-223 packing information  
Figure 52. SOT-223 tape and reel shipment (suffix “TR”)  
REEL DIMENSIONS  
Base Q.ty  
Bulk Q.ty  
A (max)  
B (min)  
C (± 0.2)  
F
1000  
1000  
330  
1.5  
13  
20.2  
12.4  
60  
G (+ 2 / -0)  
N (min)  
T (max)  
18.4  
TAPE DIMENSIONS  
According to Electronic Industries Association  
(EIA) Standard 481 rev. A, Feb. 1986  
Tape width  
W
P0 (± 0.1)  
P
12  
4
Tape Hole Spacing  
Component Spacing  
Hole Diameter  
8
D (± 0.1/-0) 1.5  
Hole Diameter  
D1 (min)  
F (± 0.05)  
K (max)  
1.5  
5.5  
4.5  
2
Hole Position  
Compartment Depth  
Hole Spacing  
P1 (± 0.1)  
All dimensions are in mm.  
End  
Start  
Top  
No components  
500mm min  
Components  
No components  
500mm min  
cover  
tape  
Empty components pockets  
saled with cover tape.  
User direction of feed  
32/37  
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Package and packing information  
5.6  
SO-8 packing information  
Figure 53. SO-8 tube shipment (no suffix)  
B
C
Base Q.ty  
100  
2000  
532  
3.2  
6
Bulk Q.ty  
Tube length (± 0.5)  
A
A
B
C (± 0.1)  
0.6  
Figure 54. SO-8 tape and reel shipment (suffix “TR”)  
REEL DIMENSIONS  
Base Q.ty  
Bulk Q.ty  
A (max)  
B (min)  
C (± 0.2)  
F
2500  
2500  
330  
1.5  
13  
20.2  
12.4  
60  
G (+ 2 / -0)  
N (min)  
T (max)  
18.4  
All dimensions are in mm.  
TAPE DIMENSIONS  
According to Electronic Industries Association  
(EIA) Standard 481 rev. A, Feb 1986  
Tape width  
W
P0 (± 0.1)  
P
12  
4
Tape Hole Spacing  
Component Spacing  
Hole Diameter  
8
D (± 0.1/-0) 1.5  
Hole Diameter  
D1 (min)  
F (± 0.05)  
K (max)  
1.5  
5.5  
4.5  
2
Hole Position  
Compartment Depth  
Hole Spacing  
P1 (± 0.1)  
End  
All dimensions are in mm.  
Start  
Top  
No components  
500mm min  
Components  
No components  
cover  
tape  
Empty components pockets  
saled with cover tape.  
500mm min  
User direction of feed  
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Package and packing information  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
5.7  
DPAK packing information  
Figure 55. DPAK footprint and tube shipment (no suffix)  
A
6 .7  
1 .8  
3 .0  
1 .6  
C
Base Q.ty  
75  
3000  
532  
6
Bulk Q.ty  
2 .3  
2 .3  
Tube length (± 0.5)  
6 .7  
A
B
B
21.3  
0.6  
C (± 0.1)  
Figure 56. DPAK tape and reel shipment (suffix “TR”)  
REEL DIMENSIONS  
Base Q.ty  
Bulk Q.ty  
A (max)  
B (min)  
C (± 0.2)  
F
2500  
2500  
330  
1.5  
13  
20.2  
16.4  
60  
G (+ 2 / -0)  
N (min)  
T (max)  
22.4  
TAPE DIMENSIONS  
According to Electronic Industries Association  
(EIA) Standard 481 rev. A, Feb 1986  
Tape width  
W
P0 (± 0.1)  
P
16  
4
Tape Hole Spacing  
Component Spacing  
Hole Diameter  
8
D (± 0.1/-0) 1.5  
Hole Diameter  
D1 (min)  
F (± 0.05)  
K (max)  
1.5  
7.5  
6.5  
2
Hole Position  
Compartment Depth  
Hole Spacing  
P1 (± 0.1)  
All dimensions are in mm.  
End  
Start  
Top  
No components  
500mm min  
Components  
No components  
500mm min  
cover  
tape  
Empty components pockets  
saled with cover tape.  
User direction of feed  
34/37  
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Package and packing information  
5.8  
IPAK packing information  
Figure 57. IPAK tube shipment (no suffix)  
A
C
Base Q.ty  
Bulk Q.ty  
75  
3000  
Tube length (± 0.5)  
532  
6
A
B
B
21.3  
0.6  
C (± 0.1)  
All dimensions are in mm.  
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Revision history  
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1  
6
Revision history  
Table 12. Document revision history  
Date  
Revision  
Changes  
01-Feb-2003  
1
Initial Release  
Added Table 1: Device summary on page 1 and Section 4:  
Package and PCB thermal data on page 20.  
28-Apr-2009  
10-Sep-2010  
2
3
Updated Section 5: Package and packing information on  
page 27.  
Updated Table 4: Electrical characteristics  
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Please Read Carefully:  
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the  
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any  
time, without notice.  
All ST products are sold pursuant to ST’s terms and conditions of sale.  
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no  
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No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this  
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