V62/08615-01XE [TI]

增强型产品低电压 4 位 2 选 1 FET 多路复用器/多路信号分离器 | PW | 16 | -55 to 125;
V62/08615-01XE
型号: V62/08615-01XE
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

增强型产品低电压 4 位 2 选 1 FET 多路复用器/多路信号分离器 | PW | 16 | -55 to 125

复用器
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中文:  中文翻译
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SN74CBTLV1G125-Q1  
www.ti.com................................................................................................................................................................................................ SCDS289 AUGUST 2009  
LOW-VOLTAGE SINGLE FET BUS SWITCH  
Check for Samples: SN74CBTLV1G125-Q1  
1
FEATURES  
DBV PACKAGE  
(TOP VIEW)  
Qualified for Automotive Applications  
5-Switch Connection Between Two Ports  
Rail-to-Rail Switching on Data I/O Ports  
1
2
3
5
OE  
A
VCC  
Ioff Supports Partial-Power-Down Mode  
Operation  
4
B
GND  
See mechanical drawings for dimensions.  
DESCRIPTION/ORDERING INFORMATION  
The SN74CBTLV1G125 features a single high-speed line switch. The switch is disabled when the output-enable  
(OE) input is high.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging  
current will not backflow through the device when it is powered down. The device has isolation during power off.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
ORDERING INFORMATION(1)  
(2)  
TA  
PACKAGE  
ORDERABLE PART NUMBER  
TOP-SIDE MARKING  
VCTO  
–40°C to 125°C  
SOT-23 – DBV  
Reel of 3000  
74CBTLV1G125DBVRQ1  
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
web site at www.ti.com.  
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.  
Table 1. FUNCTION TABLE  
INPUT  
FUNCTION  
OE  
L
A port = B port  
Disconnect  
H
LOGIC DIAGRAM (POSITIVE LOGIC)  
2
4
A
SW  
B
1
OE  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2009, Texas Instruments Incorporated  
SN74CBTLV1G125-Q1  
SCDS289 AUGUST 2009................................................................................................................................................................................................ www.ti.com  
SIMPLIFIED SCHEMATIC, EACH FET SWITCH  
A
B
(OE)  
ABSOLUTE MAXIMUM RATINGS(1)  
over operating free-air temperature range (unless otherwise noted)  
MIN  
–0.5  
–0.5  
MAX  
4.6  
UNIT  
V
VCC Supply voltage range  
VI  
Input voltage range(2)  
4.6  
V
Continuous channel current  
128  
–50  
206  
150  
mA  
mA  
°C/W  
°C  
IIK  
Input clamp current  
VI/O < 0  
DBV package  
θJA  
Tstg  
Package thermal impedance(3)  
Storage temperature range  
–65  
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating  
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.  
(3) The package thermal impedance is calculated in accordance with JESD 51-7.  
RECOMMENDED OPERATING CONDITIONS(1)  
MIN  
2.3  
1.7  
2
MAX UNIT  
VCC  
VIH  
Supply voltage  
3.6  
V
VCC = 2.3 V to 2.7 V  
VCC = 2.7 V to 3.6 V  
VCC = 2.3 V to 2.7 V  
VCC = 2.7 V to 3.6 V  
High-level control input voltage  
V
0.7  
0.8  
VIL  
TA  
Low-level control input voltage  
Operating free-air temperature  
V
–40  
125  
°C  
(1) All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
2
Submit Documentation Feedback  
Copyright © 2009, Texas Instruments Incorporated  
Product Folder Link(s): SN74CBTLV1G125-Q1  
SN74CBTLV1G125-Q1  
www.ti.com................................................................................................................................................................................................ SCDS289 AUGUST 2009  
ELECTRICAL CHARACTERISTICS  
over recommended operating free-air temperature range (unless otherwise noted)  
TYP  
PARAMETER  
TEST CONDITIONS  
MIN  
MAX UNIT  
(1)  
VIK  
II  
VCC = 3 V, II = –18 mA  
–1.2  
±1  
V
VCC = 3.6 V, VI = VCC or GND  
μA  
VCC = 0, VI or VO = 0 to 3.6 V, OE = 3.6 V  
VCC = 0, VI or VO = 0 to 3.6 V, OE = 0 V  
VCC = 3.6 V, VI = VCC or GND  
15  
Ioff  
μA  
100  
10  
ICC  
μA  
μA  
pF  
pF  
(2)  
ΔICC  
Ci  
Control inputs VCC = 3.6 V, One input at 3 V, Other inputs at VCC or GND  
Control inputs VI = 3 V or 0  
300  
2.5  
7
Cio(OFF)  
VO = 3 V or 0, OE = VCC  
II = 32 mA  
II = 24 mA  
II = 15 mA  
II = 32 mA  
II = 24 mA  
II = 15 mA  
7
10  
10  
25  
7
VI = 0  
VCC = 2.3 V,  
TYP at VCC = 2.5 V  
7
VI = 1.7 V,  
VI = 0  
15  
5
(3)  
ron  
VCC = 3 V  
5
7
VI = 2.4 V,  
10  
15  
(1) All typical values are at VCC = 3.3 V (unless otherwise noted), TA = 25°C.  
(2) This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.  
(3) Measured by the voltage drop between A and B terminals at the indicated current through the switch. On-state resistance is determined  
by the lower of the voltages of the two (A or B) terminals.  
SWITCHING CHARACTERISTICS  
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)  
VCC = 2.5 V  
± 0.2 V  
VCC = 3.3 V  
± 0.3 V  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
MAX  
MIN  
MAX  
(1)  
tpd  
A or B  
OE  
B or A  
A or B  
A or B  
0.15  
8
0.25  
7.5  
ns  
ns  
ns  
ten  
0.5  
0.5  
0.5  
0.5  
tdis  
OE  
8
7.5  
(1) The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load  
capacitance of 50 pF, when driven by an ideal voltage source (zero output impedance).  
Copyright © 2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
3
Product Folder Link(s): SN74CBTLV1G125-Q1  
SN74CBTLV1G125-Q1  
SCDS289 AUGUST 2009................................................................................................................................................................................................ www.ti.com  
PARAMETER MEASUREMENT INFORMATION  
2 × V  
TEST  
S1  
CC  
S1  
t
/t  
Open  
Open  
GND  
R
L
PLH PHL  
From Output  
Under Test  
t
/t  
2 × V  
CC  
GND  
PLZ PZL  
t
/t  
PHZ PZH  
C
L
R
L
(see Note A)  
V
C
L
R
L
V
CC  
2.5 V ±0.2 V  
3.3 V ±0.3 V  
500 Ω  
500 Ω  
0.15 V  
0.3 V  
30 pF  
50 pF  
LOAD CIRCUIT  
V
CC  
Timing Input  
V /2  
CC  
0 V  
t
w
t
su  
t
h
V
CC  
V
CC  
V /2  
CC  
V /2  
CC  
Input  
V /2  
CC  
V /2  
CC  
Data Input  
0 V  
0 V  
VOLTAGE WAVEFORMS  
PULSE DURATION  
VOLTAGE WAVEFORMS  
SETUP AND HOLD TIMES  
V
V
CC  
CC  
Output  
Control  
V /2  
CC  
V /2  
CC  
V /2  
CC  
V /2  
CC  
Input  
0 V  
0 V  
t
t
PLZ  
t
PZL  
t
t
PHL  
PLH  
Output  
Waveform 1  
V
V
OH  
V
V
CC  
V
V
/2  
/2  
V
CC  
/2  
V
/2  
/2  
CC  
Output  
CC  
S1 at 2 × V  
CC  
V
+ V  
OL  
OL  
(see Note B)  
OL  
t
PHL  
PLH  
t
t
PHZ  
PZH  
Output  
Waveform 2  
S1 at GND  
V
V
OH  
V
OH  
V
− V  
OH  
V
CC  
V
CC  
/2  
CC  
Output  
0 V  
(see Note B)  
OL  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
INVERTING AND NONINVERTING OUTPUTS  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
LOW- AND HIGH-LEVEL ENABLING  
A. CL includes probe and jig capacitance.  
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output  
control.  
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output  
control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2 ns,  
tf 2 ns.  
D. The outputs are measured one at a time, with one transition per measurement.  
E. tPLZ and tPHZ are the same as tdis  
.
F. tPZL and tPZH are the same as ten  
.
G. tPLH and tPHL are the same as tpd  
.
H. All parameters and waveforms are not applicable to all devices.  
Figure 1. Load Circuit and Voltage Waveforms  
4
Submit Documentation Feedback  
Copyright © 2009, Texas Instruments Incorporated  
Product Folder Link(s): SN74CBTLV1G125-Q1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
2-Oct-2009  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
74CBTLV1G125DBVRQ1  
ACTIVE  
SOT-23  
DBV  
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
OTHER QUALIFIED VERSIONS OF SN74CBTLV1G125-Q1 :  
Catalog: SN74CBTLV1G125  
NOTE: Qualified Version Definitions:  
Catalog - TI's standard catalog product  
Addendum-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
20-Jul-2010  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
74CBTLV1G125DBVRQ1 SOT-23  
DBV  
5
3000  
179.0  
8.4  
3.2  
3.2  
1.4  
4.0  
8.0  
Q3  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
20-Jul-2010  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SOT-23 DBV  
SPQ  
Length (mm) Width (mm) Height (mm)  
203.0 203.0 35.0  
74CBTLV1G125DBVRQ1  
5
3000  
Pack Materials-Page 2  
IMPORTANT NOTICE  
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