SI7469DP-T1-E3 [VISHAY]
P-Channel 80-V (D-S) MOSFET; P通道80 -V （D -S ）的MOSFET
| 型号： | SI7469DP-T1-E3 |
| 厂家： | 
VISHAY |
| 描述： | P-Channel 80-V (D-S) MOSFET |
| 文件： | 总9页 (文件大小：156K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Si7469DP
Vishay Siliconix
P-Channel 80-V (D-S) MOSFET
FEATURES
PRODUCT SUMMARY
•
Halogen-free According to IEC 61249-2-21
VDS (V)
RDS(on) (Ω)
Qg (Typ.)
I
D (A)a
- 28
Available
0.025 at VGS = - 10 V
0.029 at VGS = - 4.5 V
•
TrenchFET® Power MOSFET
- 80
55 nC
- 28
PowerPAK SO-8
S
S
6.15 mm
5.15 mm
1
S
2
S
3
G
4
G
D
8
D
7
D
6
D
5
Bottom View
D
Ordering Information: Si7469DP-T1-E3 (Lead (Pb)-free)
Si7469DP-T1-GE3 (Lead (Pb)-free and Halogen-free)
P-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS T = 25 °C, unless otherwise noted
A
Parameter
Symbol
Limit
- 80
20
Unit
VDS
Drain-Source Voltage
Gate-Source Voltage
V
VGS
- 28a
- 28a
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
Continuous Drain Current (TJ = 150 °C)
ID
- 10.2b, c
- 8.1b, c
- 40
- 28a
- 4.3b, c
- 45
A
IDM
IS
Pulsed Drain Current
TC = 25 °C
TA = 25 °C
Continuous Source-Drain Diode Current
IAS
Avalanche Current
L = 0.1 mH
EAS
Single-Pulse Avalanche Energy
100
83
mJ
W
T
C = 25 °C
TC = 70 °C
A = 25 °C
53
PD
Maximum Power Dissipation
5.2b, c
3.3b, c
T
TA = 70 °C
TJ, Tstg
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)d, e
- 55 to 150
°C
260
THERMAL RESISTANCE RATINGS
Parameter
Maximum Junction-to-Ambientb, f
Maximum Junction-to-Case (Drain)
Symbol
RthJA
Typical
Maximum
Unit
t ≤ 10 s
Steady State
19
24
°C/W
RthJC
1.2
1.5
Notes:
a. Package Limited.
b. Surface Mounted on 1" x 1" FR4 board.
c. t = 10 s.
d. See Solder Profile (www.vishay.com/ppg?73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed copper
(not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not
required to ensure adequate bottom side solder interconnection.
e. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.
f. Maximum under Steady State conditions is 65 °C/W.
Document Number: 73438
S09-0271-Rev. C, 16-Feb-09
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1
Si7469DP
Vishay Siliconix
SPECIFICATIONS T = 25 °C, unless otherwise noted
J
Parameter
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
Static
VDS
ΔVDS/TJ
ΔVGS(th)/TJ
VGS(th)
VGS = 0 V, ID = - 250 µA
ID = - 250 µA
Drain-Source Breakdown Voltage
- 80
V
V
DS Temperature Coefficient
- 79.6
5.3
mV/°C
VGS(th) Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
VDS = VGS, ID = - 250 µA
- 1
- 3
100
- 1
V
IGSS
VDS = 0 V, VGS
=
20 V
nA
VDS = - 80 V, VGS = 0 V
DS = - 80 V, VGS = 0 V, TJ = 55 °C
VDS ≥ 5 V, VGS = - 10 V
IDSS
ID(on)
RDS(on)
gfs
Zero Gate Voltage Drain Current
On-State Drain Currenta
µA
A
V
- 10
- 40
VGS = - 10 V, ID = - 10.2 A
0.021
0.024
52
0.025
0.029
Drain-Source On-State Resistancea
Ω
S
V
GS = - 4.5 V, ID = - 8.1 A
Forward Transconductancea
VDS = - 15 V, ID = - 10.2 A
Dynamicb
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
4700
320
235
105
55
VDS = - 40 V, VGS = 0 V, f = 1 MHz
pF
VDS = - 40 V, VGS = - 10 V, ID = - 10.2 A
160
85
Qg
Total Gate Charge
nC
Ω
Qgs
Qgd
Rg
Gate-Source Charge
Gate-Drain Charge
Gate Resistance
Turn-On Delay Time
Rise Time
V
DS = - 40 V, VGS = - 4.5 V, ID = - 10.2 A
f = 1 MHz
16
26
4
td(on)
tr
td(off)
tf
td(on)
tr
td(off)
tf
45
70
330
145
165
25
220
95
V
DD = - 40 V, RL = 4.9 Ω
ns
ID ≅ - 8.1 A, VGEN = - 10 V, Rg = 1 Ω
Turn-Off Delay Time
Fall Time
110
15
Turn-On Delay Time
Rise Time
25
40
V
DD = - 40 V, RL = 4.9 Ω
ns
A
ID ≅ - 8.1 A, VGEN = - 4.5 V, Rg = 1 Ω
Turn-Off Delay Time
Fall Time
105
100
160
150
Drain-Source Body Diode Characteristics
IS
ISM
VSD
trr
TC = 25 °C
IS = - 8.1 A
Continuous Source-Drain Diode Current
- 28
- 40
- 1.2
85
Pulse Diode Forward Currenta
Body Diode Voltage
- 0.8
55
V
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Reverse Recovery Fall Time
Reverse Recovery Rise Time
ns
nC
Qrr
ta
110
37
165
IF = - 8.1 A, dI/dt = 100 A/µs, TJ = 25 °C
ns
tb
18
Notes:
a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
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Document Number: 73438
S09-0271-Rev. C, 16-Feb-09
Si7469DP
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
40
20
16
12
8
V
GS
= 10 V thru 4 V
35
30
25
20
15
10
5
T
A
= 125 °C
4
3 V
25 °C
- 55 °C
0
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
V
- Drain-to-Source Voltage (V)
DS
V
GS
- Gate-to-Source Voltage (V)
Output Characteristics
Transfer Characteristics
0.026
0.025
0.024
0.023
0.022
0.021
0.020
8000
7000
6000
5000
4000
3000
2000
1000
0
V
GS
= 4.5 V
C
iss
V
GS
= 10 V
C
oss
C
rss
0
5
10
15
20
25
30
35
40
0
10
20
30
40
50
60
70
80
I
D
- Drain Current (A)
V
DS
- Drain-to-Source Voltage (V)
On-Resistance vs. Drain Current and Gate Voltage
Capacitance
10
8
2.1
1.9
1.7
1.5
1.3
1.1
0.9
0.7
0.5
I
D
= 10.2 A
I = 10.2 A
D
V
GS
= 10 V
V
DS
= 64 V
6
V
DS
= 40 V
V
GS
= 4.5 V
4
2
0
0
20
40
60
80
100
120
- 50 - 25
0
25
50
75
100 125 150
Q
g
- Total Gate Charge (nC)
T - Junction Temperature (°C)
J
Gate Charge
On-Resistance vs. Junction Temperature
Document Number: 73438
S09-0271-Rev. C, 16-Feb-09
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3
Si7469DP
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
40
0.05
0.04
0.03
0.02
0.01
T
J
= 150 °C
T
A
= 125 °C
10
T
A
= 25 °C
T
= 25 °C
J
1
0.00
2
3
4
5
6
7
8
9
10
0.2
0.4
0.6
0.8
1.0
1.2
V
- Gate-to-Source Voltage (V)
GS
V
- Source-to-Drain Voltage (V)
SD
Source-Drain Diode Forward Voltage
On-Resistance vs. Gate-to-Source Voltage
2.4
2.2
2.0
1.8
1.6
1.4
1.2
35
30
I
D
= 250 µA
25
20
15
10
5
0
0.01
0.1
1
10
100
1000
- 50 - 25
0
25
50
75
100 125 150
Time (s)
Single Pulse Power, Junction-to-Ambient
T
- Temperature (°C)
J
Threshold Voltage
100
Limited by
DS(on)
100 µs
R
*
10
1
1 ms
10 ms
100 ms
1 s
0.1
10 s
DC
T
A
= 25 °C
0.01
Single Pulse
0.001
0.1
1
10
100
1000
V
- Drain-to-Source Voltage (V)
DS
* V > minimum V
GS
at which R
DS(on)
is specified
GS
Safe Operating Area, Junction-to-Ambient
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Document Number: 73438
S09-0271-Rev. C, 16-Feb-09
Si7469DP
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
100
80
60
40
20
0
50
40
Package Limited
30
20
10
0
25
50
75
100
125
150
0
25
50
75
100
125
150
T - Case Temperature (°C)
C
T
C
- Case Temperature (°C)
Power Derating
Current Derating*
100
10
.
L
I
D
T
=
A
BV - V
DD
1
0.000001
0.00001
0.0001
0.001
0.01
T
A
- Time In Avalanche (s)
Single Pulse Avalanche Capability
* The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
Document Number: 73438
S09-0271-Rev. C, 16-Feb-09
www.vishay.com
5
Si7469DP
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
2
1
Duty Cycle = 0.5
0.2
0.1
Notes:
P
DM
0.1
0.05
t
1
0.02
t
2
t
t
1
1. Duty Cycle, D =
2
2. Per Unit Base = R
= 65 °C/W
thJA
(t)
3. T - T = P
Z
JM
A
DM thJA
Single Pulse
0.01
4. Surface Mounted
-2
-1
10
10
1
10
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Ambient
100
1000
2
1
Duty Cycle = 0.5
0.2
0.1
0.05
0.02
0.1
Single Pulse
0.01
-4
-3
-2
-1
10
10
10
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Case
10
1
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?73438.
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Document Number: 73438
S09-0271-Rev. C, 16-Feb-09
Package Information
www.vishay.com
Vishay Siliconix
PowerPAK® SO-8, (Single/Dual)
L
H
E2
K
E4
W
1
1
2
3
4
Z
2
3
4
D
L1
E3
A1
Backside View of Single Pad
L
H
K
E2
E4
2
E1
E
Detail Z
1
2
3
4
D1
D2
Notes
1. Inch will govern.
E3
2
Dimensions exclusive of mold gate burrs.
Backside View of Dual Pad
3. Dimensions exclusive of mold flash and cutting burrs.
MILLIMETERS
INCHES
NOM.
0.041
DIM.
MIN.
NOM.
1.04
MAX.
1.12
0.05
0.51
0.33
5.26
5.00
3.91
1.68
MIN.
0.038
0
MAX.
0.044
0.002
0.020
0.013
0.207
0.197
0.154
0.066
A
0.97
A1
-
-
b
0.33
0.23
5.05
4.80
3.56
1.32
0.41
0.013
0.009
0.199
0.189
0.140
0.052
0.016
c
0.28
0.011
D
5.15
0.203
D1
4.90
0.193
D2
3.76
0.148
D3
1.50
0.059
D4
0.57 typ.
3.98 typ.
6.15
0.0225 typ.
0.157 typ.
0.242
D5
E
6.05
5.79
3.30
3.48
3.68
6.25
5.99
3.66
3.84
3.91
0.238
0.228
0.130
0.137
0.145
0.246
0.236
0.144
0.151
0.154
E1
5.89
0.232
E2 (for AL product)
3.48
0.137
E2 (for other product)
3.66
0.144
E3
3.78
0.149
E4 (for AL product)
0.58 typ.
0.75 typ.
1.27 BSC
1.45 typ.
1.27 typ.
-
0.023 typ.
0.030 typ.
0.050 BSC
0.057 typ.
0.050 typ.
-
E4 (for other product)
e
K (for AL product)
K (for other product)
K1
H
0.56
0.51
0.51
0.06
0°
-
0.022
0.020
0.020
0.002
0°
-
0.61
0.71
0.71
0.20
12°
0.024
0.028
0.028
0.008
12°
L
0.61
0.024
L1
0.13
0.005
-
-
W
M
0.15
0.25
0.36
0.006
0.010
0.014
0.125 typ.
0.005 typ.
ECN: C13-0702-Rev. K, 20-May-13
DWG: 5881
Revison: 20-May-13
Document Number: 71655
1
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR PowerPAK® SO-8 Single
0.260
(6.61)
0.150
(3.81)
0.024
(0.61)
0.026
(0.66)
0.050
(1.27)
0.032
(0.82)
0.040
(1.02)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
Document Number: 72599
Revision: 21-Jan-08
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15
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Vishay
Disclaimer
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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
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Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the
definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council
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requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21
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Revision: 02-Oct-12
Document Number: 91000
1
相关型号：
SI7470DP-T1-E3
Power Field-Effect Transistor, 40A I(D), 8V, 0.0021ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, ROHS COMPLIANT, POWERPAK, SOP-8
VISHAY
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