XA95144XL-10TQ144I [XILINX]
Flash PLD, 10ns, 144-Cell, CMOS, PQFP144, TQFP-144;
| 型号： | XA95144XL-10TQ144I |
| 厂家： | 
XILINX, INC |
| 描述： | Flash PLD, 10ns, 144-Cell, CMOS, PQFP144, TQFP-144 输入元件 可编程逻辑 |
| 文件： | 总4页 (文件大小：47K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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XA9500XL High-Performance
CPLD Automotive XA Product
Family
R
0
0
DS108-1 (v1.4) October 18, 2004
Preliminary Product Specification
•
Additionally, Xilinx and all of our production partners
are qualified to QS-9000, moving to TS16949 in 2005.
Features
•
AEC-Q100 device qualification and full PPAP support
available in both extended temperature Q-grade and
I-grade.
Description
The XA9500XL 3.3V CPLD Automotive XA product family is
targeted for leading-edge, high-performance automotive
applications that require either automotive industrial (–40°C
to +85°C ambient) or extended (–40°C to +125°C ambient)
temperature reconfigurable devices.
•
Guaranteed to meet full electrical specifications over
TA = –40°C to +125°C
•
•
•
System frequency up to 100 MHz (10 ns)
Available in small footprint packages
Optimized for high-performance 3.3V systems
-
5V tolerant I/O pins accept 5V, 3.3V, and 2.5V
signals — ideal for multi-voltage system interfacing
and level shifting
Power Estimation
Power dissipation in CPLDs can vary substantially depend-
ing on the system frequency, design application and output
loading. To help reduce power dissipation, each macrocell
in the XA9500XL device can be configured for low-power
mode (from the default high-performance mode). In addi-
tion, unused product-terms and macrocells are automati-
cally deactivated by the software to further conserve power.
-
Technology: 0.35µm CMOS process
•
Advanced system features
-
In-system programmable enabling higher system
reliability through reduced handling and reducing
production programming times
-
Superior pin-locking and routability with
FastCONNECT™ II switch matrix allowing for
multiple design iterations without board re-spins
Input hysteresis on all user and boundary-scan pin
inputs to reduce noise on input signals
Bus-hold circuitry on all user pin inputs which
reduces cost associated with pull-up resistors and
reduces bus loading
For a general estimate of ICC, the following equation may be
used:
ICC (mA) = MCHP(0.5) + MCLP(0.3) + MC(0.0045 mA/MHz) f
where:
-
-
MCHP = Macrocells in high-performance (default)
mode
MCLP = Macrocells in low-power mode
MC = Total number of macrocells used
f = Clock frequency (MHz)
-
Full IEEE Standard 1149.1 boundary-scan (JTAG)
for in-system device testing
·
Fast concurrent programming
•
•
•
Slew rate control on individual outputs for reducing EMI
generation
Refer to XC9500XL Family data sheet (DS054) for
architecture description
This calculation is based on typical operating conditions
using a pattern of 16-bit up/down counters in each Function
Block with no output loading. The actual ICC value varies
with the design application and should be verified during
normal system operation.
Refer to XC9536XL data sheet (DS058) and
XC9572XL data sheet (DS057) for pin tables
Table 1: XA9500XL Device Family
Device
XA9536XL
Macrocells
Usable Gates
800
Registers
f
SYSTEM (MHz)
36
72
36
72
100
100
100
XA9572XL
1,600
XA95144XL
144
3,200
144
© 2003 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
DS108-1 (v1.4) October 18, 2004
www.xilinx.com
1
Preliminary Product Specification
1-800-255-7778
R
XA9500XL High-Performance CPLD Automotive XA Product Family
Table 2: XA9500XL Packages and User I/O Pins (not including four dedicated JTAG pins)
Device
XA9536XL
VQ44
34
TQ144
--
XA9572XL
34
--
XA95144XL
--
117
2
www.xilinx.com
DS108-1 (v1.4) October 18, 2004
1-800-255-7778
Preliminary Product Specification
R
XA9500XL High-Performance CPLD Automotive XA Product Family
(1)
Absolute Maximum Ratings
Symbol
Description
Min.
–0.5
–0.5
–0.5
–65
-
Max.
4.0
Units
V
VCC
VIN
Supply voltage relative to GND
Input voltage relative to GND(2)
Voltage applied to 3-state output(2)
Storage temperature (ambient)
Junction temperature
5.5
V
VTS
TSTG
TJ
5.5
V
+150
+150
oC
oC
Notes:
1. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions
is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time may affect device reliability.
2. Maximum DC undershoot below GND must be limited to either 0.5V or 10 mA, whichever is easier to achieve. During transitions, the
device pins may undershoot to –2.0 V or overshoot to +7.0V, provided this over- or undershoot lasts less than 10 ns and with the
forcing current being limited to 200 mA.
3. For soldering guidelines, see the Package Infomation on the Xilinx website.
Recommended Operating Conditions
Symbol
TA
Parameter
Min
–40
3.0
3.0
2.3
0
Max
+125
3.6
Units
°C
V
Ambient temperature
VCCINT
VCCIO
Supply voltage for internal logic and input buffers
Supply voltage for output drivers for 3.3V operation
Supply voltage for output drivers for 2.5V operation
Low-level input voltage
3.6
V
2.7
V
VIL
VIH
VO
0.80
5.5
V
High-level input voltage
2.0
0
V
Output voltage
VCCIO
V
Quality and Reliability Characteristics
Symbol
TDR
Parameter
Min
20
Max
Units
Data Retention
Program/erase cycles (Endurance) @ TA = 70°C
-
-
Years
NPE
10,000
Cycles
DS108-1 (v1.4) October 18, 2004
www.xilinx.com
3
Preliminary Product Specification
1-800-255-7778
R
XA9500XL High-Performance CPLD Automotive XA Product Family
Component Availability
Pins
Type
Code
44
144
Plastic VQFP
Plastic TQFP
VQ44
I,Q
TQ144
XA9536XL
XA9572XL
XA95144XL
-10
-10
-10
--
--
I
I,Q
--
Notes:
1. Q = Automotive Extended Temperature (TA = –40°C to +125°C).
2. I= Automotive Industrial Temperature (TA = –40°C to +85°C).
Ordering Information
Example:
Device Type
XA9572XL -10 VQ 44Q
Temperature Range
Number of Pins
Package Type
Speed Grade
Device Ordering Options
Device
Speed
Package
Temperature
XA9536XL
-10 10 ns pin-to-pin
delay
VQ44 44-pin Quad Flat Pack (VQFP)
Q = Automotive
Extended
TA = –40°C to +125°C
XA9572XL
TQ144 144-pin Thin Quad Flat Pack (TQFP)
I = Automotive
Industrial
TA = –40°C to +85°C
XA95144 XL
Revision History
The following table shows the revision history for this document.
Date
Version
1.0
Revision
05/17/02
07/17/02
02/03/03
05/21/04
10/18/04
Initial Xilinx release.
Updated NPE Quality and Reliability specification.
1.1
1.2
Added reference to XC9500XL, XC9536XL, and XC9572XL data sheets.
Updated the VQ44 column of Table 2 and the Component Availability table on page 2.
Extensive edits to update family from IQ to XA
1.3
1.4
4
www.xilinx.com
DS108-1 (v1.4) October 18, 2004
1-800-255-7778
Preliminary Product Specification
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