AOD407_11 [AOS]

P-Channel Enhancement Mode Field Effect Transistor; P沟道增强型场效应晶体管
AOD407_11
型号: AOD407_11
厂家: ALPHA & OMEGA SEMICONDUCTORS    ALPHA & OMEGA SEMICONDUCTORS
描述:

P-Channel Enhancement Mode Field Effect Transistor
P沟道增强型场效应晶体管

晶体 晶体管 场效应晶体管
文件: 总6页 (文件大小:159K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
AOD407  
P-Channel Enhancement Mode Field Effect Transistor  
General Description  
Features  
The AOD407 uses advanced trench technology to  
provide excellent RDS(ON), low gate charge and low  
gate resistance. With the excellent thermal resistance  
of the DPAK package, this device is well suited for  
high current load applications.  
VDS (V) = -60V  
ID = -12A (VGS = -10V)  
R
R
DS(ON) < 115m(VGS = -10V)  
DS(ON) < 150m(VGS = -4.5V)  
100% UIS tested  
100% RG tested  
-RoHS Compliant  
-Halogen Free*  
TO252  
DPAK  
Top View  
Bottom View  
D
S
D
D
G
S
G
S
G
Absolute Maximum Ratings TA=25°C unless otherwise noted  
Parameter  
Symbol  
Maximum  
Units  
VDS  
Drain-Source Voltage  
Gate-Source Voltage  
Continuous Drain  
Current G  
Pulsed Drain Current C  
Avalanche Current C  
-60  
±20  
-12  
V
V
VGS  
TC=25°C  
A
TC=100°C  
ID  
-10  
IDM  
IAR  
EAR  
-30  
-12  
A
Repetitive avalanche energy L=0.1mH C  
23  
mJ  
TC=25°C  
Power Dissipation B  
TC=100°C  
50  
PD  
W
25  
TA=25°C  
2.5  
PDSM  
W
Power Dissipation A  
TA=70°C  
1.6  
TJ, TSTG  
Junction and Storage Temperature Range  
-55 to 175  
°C  
Thermal Characteristics  
Parameter  
Maximum Junction-to-Ambient A  
Maximum Junction-to-Ambient A  
Maximum Junction-to-Case B  
Symbol  
Typ  
16.7  
40  
Max  
25  
50  
3
Units  
°C/W  
°C/W  
°C/W  
t 10s  
RθJA  
Steady-State  
Steady-State  
RθJC  
2.5  
Alpha & Omega Semiconductor, Ltd.  
AOD407  
Electrical Characteristics (TJ=25°C unless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max Units  
STATIC PARAMETERS  
BVDSS  
Drain-Source Breakdown Voltage  
ID=-250µA, VGS=0V  
-60  
V
VDS=-48V, VGS=0V  
-0.003  
-1  
IDSS  
Zero Gate Voltage Drain Current  
µA  
-5  
TJ=55°C  
IGSS  
Gate-Body leakage current  
Gate Threshold Voltage  
On state drain current  
VDS=0V, VGS=±20V  
VDS=VGS ID=-250µA  
VGS=-10V, VDS=-5V  
VGS=-10V, ID=-12A  
±100  
-3  
nA  
V
VGS(th)  
ID(ON)  
-1.5  
-30  
-2.1  
A
91  
150  
115  
150  
mΩ  
mΩ  
RDS(ON)  
TJ=125°C  
Static Drain-Source On-Resistance  
VGS=-4.5V, ID=-8A  
VDS=-5V, ID=-12A  
IS=-1A,VGS=0V  
114  
gFS  
VSD  
IS  
Forward Transconductance  
Diode Forward Voltage  
12.8  
-0.76  
S
V
A
-1  
Maximum Body-Diode Continuous Current  
-12  
DYNAMIC PARAMETERS  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
987  
114  
46  
1185  
10  
pF  
pF  
pF  
VGS=0V, VDS=-30V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate resistance  
VGS=0V, VDS=0V, f=1MHz  
7
SWITCHING PARAMETERS  
Qg(10V)  
Total Gate Charge (10V)  
Total Gate Charge (4.5V)  
Gate Source Charge  
Gate Drain Charge  
15.8  
7.4  
3
20  
9
nC  
nC  
nC  
nC  
ns  
Qg(4.5V)  
V
GS=-10V, VDS=-30V, ID=-12A  
Qgs  
Qgd  
tD(on)  
tr  
3.5  
9
Turn-On DelayTime  
Turn-On Rise Time  
Turn-Off DelayTime  
Turn-Off Fall Time  
VGS=-10V, VDS=-30V, RL=2.5,  
10  
25  
11  
27.5  
30  
ns  
tD(off)  
tf  
RGEN=3Ω  
ns  
ns  
trr  
IF=-12A, dI/dt=100A/µs  
IF=-12A, dI/dt=100A/µs  
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
35  
ns  
Qrr  
nC  
A: The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The  
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application  
depends on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.  
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper  
dissipation limit for cases where additional heatsinking is used.  
C: Repetitive rating, pulse width limited by junction temperature T J(MAX)=175°C.  
D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.  
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.  
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink,  
assuming a maximum junction temperature of T J(MAX)=175°C.  
G. The maximum current rating is limited by bond-wires.  
H. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T A=25°C. The SOA  
curve provides a single pulse rating.  
*This device is guaranteed green after data code 8X11 (Sep 1 ST 2008).  
Rev 7 : May 2010  
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL  
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING  
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,  
FUNCTIONS AND RELIABILITY WITHOUT NOTICE  
Alpha & Omega Semiconductor, Ltd.  
AOD407  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
30  
25  
20  
15  
10  
5
10  
8
-10V  
-6V  
-5V  
VDS=-5V  
-7V  
6
-4.5V  
125°C  
VGS=-4V  
4
25°C  
-3.5V  
-3V  
2
0
0
0
1
2
3
4
5
0
1
2
3
4
5
-VGS(Volts)  
-VDS (Volts)  
Figure 2: Transfer Characteristics  
Fig 1: On-Region Characteristics  
220  
200  
180  
160  
140  
120  
100  
80  
2
VGS=-10V  
ID=-12A  
1.8  
1.6  
1.4  
1.2  
1
VGS=-4.5V  
VGS=-4.5V  
ID=-8A  
VGS=-10V  
0.8  
0
25  
50  
75  
100  
125  
150  
175  
0
5
10  
15  
20  
25  
-ID (A)  
Temperature (°C)  
Figure 3: On-Resistance vs. Drain Current and  
Gate Voltage  
Figure 4: On-Resistance vs. Junction  
Temperature  
300  
250  
200  
150  
100  
50  
1.0E+01  
1.0E+00  
1.0E-01  
1.0E-02  
1.0E-03  
1.0E-04  
1.0E-05  
1.0E-06  
ID=-12A  
125°C  
125°C  
25°C  
25°C  
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
2
4
6
8
10  
-VSD (Volts)  
-VGS (Volts)  
Figure 6: Body-Diode Characteristics  
Figure 5: On-Resistance vs. Gate-Source Voltage  
Alpha & Omega Semiconductor, Ltd.  
AOD407  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
10  
1200  
1000  
800  
600  
400  
200  
0
Ciss  
VDS=-30V  
ID=-12A  
8
6
4
Coss  
Crss  
2
0
0
5
10  
15  
-VDS (Volts)  
20  
25  
30  
0
4
8
12  
16  
-Qg (nC)  
Figure 7: Gate-Charge Characteristics  
Figure 8: Capacitance Characteristics  
100.0  
10.0  
1.0  
200  
160  
120  
80  
TJ(Max)=175°C, TA=25°C  
10µs  
TJ(Max)=175°C  
TC=25°C  
RDS(ON)  
limited  
100µs  
1ms  
10ms  
DC  
40  
0
0.1  
0.0001  
0.001  
0.01  
0.1  
1
10  
0.1  
1
10  
100  
-VDS (Volts)  
Pulse Width (s)  
Figure 10: Single Pulse Power Rating Junction-to-  
Case (Note F)  
Figure 9: Maximum Forward Biased Safe  
Operating Area (Note F)  
10  
In descending order  
D=Ton/T  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
TJ,PK=TC+PDM.ZθJC.RθJC  
RθJC=3°C/W  
1
0.1  
PD  
Ton  
T
Single Pulse  
0.01  
0.00001  
0.0001  
0.001  
0.01  
Pulse Width (s)  
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)  
0.1  
1
10  
100  
Alpha & Omega Semiconductor, Ltd.  
AOD407  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
14  
12  
10  
8
60  
50  
40  
30  
20  
10  
0
L ID  
tA =  
BV VDD  
TA=25°C  
6
0
25  
50  
75  
100  
125  
150  
175  
0.00001  
0.0001  
Time in avalanche, tA (s)  
Figure 12: Single Pulse Avalanche capability  
0.001  
T
CASE (°C)  
Figure 13: Power De-rating (Note B)  
60  
14  
12  
10  
8
TA=25°C  
50  
40  
30  
20  
10  
0
6
4
2
0
0
25  
50  
75  
100  
125  
150  
175  
0.001  
0.01  
0.1  
1
10  
100  
1000  
T
CASE (°C)  
Pulse Width (s)  
Figure 14: Current De-rating (Note B)  
Figure 15: Single Pulse Power Rating Junction-to-  
Ambient (Note H)  
10  
1
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
D=Ton/T  
TJ,PK=TA+PDM.ZθJA.RθJA  
RθJA=50°C/W  
0.1  
0.01  
PD  
Single Pulse  
Ton  
T
0.001  
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
Pulse Width (s)  
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)  
Alpha & Omega Semiconductor, Ltd.  
AOD407  
Gate Charge Test Circuit & Waveform  
Vgs  
Qg  
-
-10V  
-
VDC  
Qgs  
Qgd  
+
Vds  
VDC  
+
DUT  
Vgs  
Ig  
Resistive Switching Test Circuit & Waveforms  
RL  
Vds  
toff  
ton  
t
td(off)  
td(on)  
t
r
f
Vgs  
-
90%  
10%  
DUT  
Vdd  
Vgs  
VDC  
+
Rg  
Vgs  
Vds  
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms  
EAR= 1/2 LIA2R  
L
Vds  
Id  
Vgs  
Vds  
-
BVDSS  
Vgs  
Vdd  
VDC  
+
Id  
Rg  
I AR  
DUT  
Vgs  
Vgs  
Diode Recovery Test Circuit & Waveforms  
Q rr = - Idt  
Vds +  
DUT  
Vgs  
trr  
Vds -  
L
-Isd  
-IF  
Isd  
Vgs  
dI/dt  
-IRM  
+
Vdd  
VDC  
Vdd  
-
-Vds  
Ig  
Alpha & Omega Semiconductor, Ltd.  

相关型号:

AOD408

N-Channel Enhancement Mode Field Effect Transistor
AOS

AOD408

N-Channel 30-V (D-S) MOSFET White LED boost converters
FREESCALE

AOD408L

N-Channel Enhancement Mode Field Effect Transistor
AOS

AOD409

P-Channel Enhancement Mode Field Effect Transistor
AOS

AOD409

P-Channel 60-V (D-S) MOSFET White LED boost converters
FREESCALE

AOD409L

P-Channel Enhancement Mode Field Effect Transistor
AOS

AOD409_11

P-Channel Enhancement Mode Field Effect Transistor
AOS

AOD410

N-Channel Enhancement Mode Field Effect Transistor
AOS

AOD410

N-Channel 30-V (D-S) MOSFET High performance trench technology
FREESCALE

AOD4100

N-Channel Enhancement Mode Field Effect Transistor
AOS

AOD4102

N-Channel Enhancement Mode Field Effect Transistor
AOS

AOD4102_10

30V N-Channel MOSFET
AOS