AOD4120_08 [AOS]

N-Channel Enhancement Mode Field Effect Transistor; N沟道增强型网络场效晶体管
AOD4120_08
型号: AOD4120_08
厂家: ALPHA & OMEGA SEMICONDUCTORS    ALPHA & OMEGA SEMICONDUCTORS
描述:

N-Channel Enhancement Mode Field Effect Transistor
N沟道增强型网络场效晶体管

晶体 晶体管
文件: 总6页 (文件大小:179K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
AOD4120  
N-Channel Enhancement Mode Field Effect Transistor  
General Description  
Features  
The AOD4120 uses advanced trench technology and  
design to provide excellent RDS(ON) with low gate  
charge. This device is suitable for use in PWM, load  
switching and general purpose applications.  
VDS (V) = 20V  
ID = 25A (VGS = 10V)  
R
R
R
DS(ON) <18 mΩ (VGS = 10V)  
DS(ON) <25 mΩ (VGS = 4.5V)  
DS(ON) <75 mΩ (VGS = 2.5V)  
-RoHS Compliant  
-Halogen Free*  
100% UIS Tested!  
100% Rg Tested!  
TO-252  
D-PAK  
D
Bottom View  
Top View  
D
G
G
S
S
S
G
Absolute Maximum Ratings TA=25°C unless otherwise noted  
Parameter  
Symbol  
Maximum  
Units  
VDS  
Drain-Source Voltage  
20  
±16  
25  
V
VGS  
Gate-Source Voltage  
V
A
TC=25°C G  
TC=100°C  
Continuous Drain  
Current  
Pulsed Drain Current C  
Avalanche Current C  
ID  
19  
IDM  
IAR  
EAR  
75  
13  
A
Repetitive avalanche energy L=0.3mH C  
25  
mJ  
TC=25°C  
33  
PD  
W
Power Dissipation B  
TC=100°C  
16.7  
2.5  
TA=25°C  
PDSM  
W
Power Dissipation A  
TA=70°C  
1.7  
TJ, TSTG  
Junction and Storage Temperature Range  
-55 to 175  
°C  
Thermal Characteristics  
Parameter  
Maximum Junction-to-Ambient A  
Maximum Junction-to-Ambient A  
Maximum Junction-to-Case B  
Symbol  
Typ  
17  
Max  
25  
Units  
°C/W  
°C/W  
°C/W  
t 10s  
RθJA  
Steady-State  
Steady-State  
40  
50  
RθJC  
3.6  
4.5  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOD4120  
Electrical Characteristics (TJ=25°C unless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
STATIC PARAMETERS  
BVDSS  
Drain-Source Breakdown Voltage  
ID=250uA, VGS=0V  
20  
V
V
DS=16V, VGS=0V  
1
5
IDSS  
Zero Gate Voltage Drain Current  
uA  
TJ=55°C  
IGSS  
Gate-Body leakage current  
Gate Threshold Voltage  
On state drain current  
V
DS=0V, VGS=±16V  
100  
2
nA  
V
VGS(th)  
ID(ON)  
VDS=VGS, ID=250μA  
GS=10V, VDS=5V  
VGS=10V, ID=20A  
0.6  
75  
1.26  
V
A
14  
21  
18  
TJ=125°C  
RDS(ON)  
Static Drain-Source On-Resistance  
mΩ  
V
V
V
GS=4.5V, ID=10A  
GS=2.5V, ID=2A  
DS=5V, ID=20A  
20  
25  
75  
57  
gFS  
VSD  
IS  
Forward Transconductance  
Diode Forward Voltage  
Maximum Body-Diode Continuous Current G  
19  
S
V
A
IS=1A, VGS=0V  
0.77  
1
30  
DYNAMIC PARAMETERS  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
900  
162  
105  
0.9  
pF  
pF  
pF  
Ω
VGS=0V, VDS=10V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate resistance  
VGS=0V, VDS=0V, f=1MHz  
1.35  
SWITCHING PARAMETERS  
Qg(10V)  
Total Gate Charge  
Total Gate Charge  
Gate Source Charge  
Gate Drain Charge  
Turn-On DelayTime  
Turn-On Rise Time  
Turn-Off DelayTime  
Turn-Off Fall Time  
15  
7.2  
1.8  
2.8  
4.5  
9.2  
18.7  
3.3  
18  
18  
9
nC  
nC  
nC  
nC  
ns  
Qg(4.5V)  
VGS=10V, VDS=10V, ID=20A  
Qgs  
Qgd  
tD(on)  
tr  
VGS=10V, VDS=10V, RL=0.5Ω,  
RGEN=3Ω  
ns  
tD(off)  
tf  
ns  
ns  
trr  
IF=20A, dI/dt=100A/μs  
IF=20A, dI/dt=100A/μs  
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
ns  
Qrr  
9.5  
nC  
A: The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with  
T A =25°C. The Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given  
application depends on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.  
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper  
dissipation limit for cases where additional heatsinking is used.  
C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C.  
D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.  
E. The static characteristics in Figures 1 to 6 are obtained using <300 μs pulses, duty cycle 0.5% max.  
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a  
maximum junction temperature of TJ(MAX)=175°C.  
G. The maximum current rating is limited by bond-wires.  
H. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. The SOA  
curve provides a single pulse rating.  
*This device is guaranteed green after data code 8X11 (Sep 1ST 2008).  
Rev4: Nov 2008  
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL  
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING  
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,  
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOD4120  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
30  
25  
20  
15  
10  
5
100  
80  
60  
40  
20  
0
10V  
25°C  
-40°C  
VDS=5V  
8V  
6V  
125°C  
4.5V  
3.5V  
VGS=3V  
4
0
0
1
2
3
5
1
2
3
4
5
VGS(Volts)  
VDS (Volts)  
Figure 2: Transfer Characteristics  
Fig 1: On-Region Characteristics  
1.60  
1.40  
1.20  
1.00  
0.80  
0.60  
80  
70  
60  
50  
40  
30  
20  
10  
0
VGS=10V, 20A  
VGS=2.5V  
VGS=4.5V, 10A  
VGS=4.5V  
VGS=2.5V, 4A  
VGS=10V  
15
0
5
10  
25  
30  
-50 -25  
0
25  
50  
75 100 125 150 175  
ID (A)  
Figure 3: On-Resistance vs. Drain Current and  
Gate Voltage  
Temperature (°C)  
Figure 4: On-Resistance vs. Junction Temperature  
35  
30  
25  
20  
15  
10  
100  
ID=20A  
10  
1
125°C  
125°C  
0.1  
-40°C  
0.01  
25°C  
0.001  
0.0001  
0.00001  
25°C  
3
4
5
6
7
8
9
10  
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
V
GS (Volts)  
VSD (Volts)  
Figure 6: Body-Diode Characteristics  
Figure 5: On-Resistance vs. Gate-Source Voltage  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOD4120  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
1400  
1200  
1000  
800  
600  
400  
200  
0
10  
8
Ciss  
VDS=12.5V  
ID=20A  
6
4
Coss  
2
Crss  
0
0
3
6
9
12  
15  
0
5
10  
15  
20  
Qg (nC)  
Figure 7: Gate-Charge Characteristics  
V
DS (Volts)  
Figure 8: Capacitance Characteristics  
100  
10  
1
200  
160  
120  
80  
10μs  
100μs  
TJ(Max)=175°C  
TC=25°C  
DC  
1ms  
RDS(ON)  
limited  
40  
TJ(Max)=175°C, TC=25°C  
0
0.1  
0.0001  
0.001  
0.01  
0.1  
1
10  
0.1  
1
10  
100  
Pulse Width (s)  
VDS (Volts)  
Figure 10: Single Pulse Power Rating Junction-to-  
Case (Note F)  
Figure 9: Maximum Forward Biased Safe  
Operating Area (Note F)  
10  
1
D=Ton/T  
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
T
J,PK=TC+PDM.ZθJC.RθJC  
RθJC=4.5°C/W  
PD  
0.1  
Ton  
T
Single Pulse  
0.0001  
0.01  
0.00001  
0.001  
0.01  
0.1  
1
10  
100  
Pulse Width (s)  
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOD4120  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
40  
35  
30  
25  
20  
15  
10  
5
35  
30  
25  
20  
15  
L ID  
tA  
=
BV VDD  
TA=25°C  
10  
0
0.000001  
0.00001  
Time in avalanche, tA (s)  
Figure 12: Single Pulse Avalanche capability  
0.0001  
0.001  
0
25  
50  
75  
100  
125  
150  
175  
T
CASE (°C)  
Figure 13: Power De-rating (Note B)  
50  
30  
25  
20  
15  
10  
5
TA=25°C  
40  
30  
20  
10  
0
0
0.01  
0.1  
1
10  
100  
1000  
0
25  
50  
75  
100  
125  
150  
175  
Pulse Width (s)  
T
CASE (°C)  
Figure 15: Single Pulse Power Rating Junction-to-  
Ambient (Note H)  
Figure 14: Current De-rating (Note B)  
10  
1
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
0.1  
PD  
D=Ton/T  
J,PK=TA+PDM.ZθJA.RθJA  
RθJA=50°C/W  
0.01  
T
Ton  
T
Single Pulse  
0.001  
0.001  
0.00001  
0.0001  
0.01  
0.1  
Pulse Width (s)  
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)  
1
10  
100  
1000  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOD4120  
Gate Charge Test Circuit & Waveform  
Vgs  
Qg  
10V  
+
VDC  
+
Qgs  
Qgd  
Vds  
VDC  
-
-
DUT  
Vgs  
Ig  
Charge  
Resistive Switching Test Circuit & Waveforms  
RL  
Vds  
Vds  
90%  
+
DUT  
Vdd  
Vgs  
VDC  
Rg  
-
10%  
Vgs  
Vgs  
td(on)  
t
r
td(off)  
t
f
ton  
toff  
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms  
L
EAR= 1/2 LIA2R  
BVDSS  
Vds  
Id  
Vgs  
Vds  
+
Vgs  
Vdd  
I AR  
VDC  
Id  
Rg  
-
DUT  
Vgs  
Vgs  
Diode Recovery Test Circuit & Waveforms  
Qrr = - Idt  
Vds +  
Vds -  
Ig  
DUT  
Vgs  
trr  
L
Isd  
I F  
Isd  
Vgs  
dI/dt  
I RM  
+
Vdd  
VDC  
Vdd  
-
Vds  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  

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