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UT61L1024(E) [ETC]

ASYNCHRONOUS STATIC RAM- High Speed ; 异步静态RAM-高速\n
UT61L1024(E)
型号： UT61L1024(E)
厂家： ETC    ETC
描述：

ASYNCHRONOUS STATIC RAM- High Speed
异步静态RAM-高速\n
文件： 总14页 (文件大小：116K)
中文：  中文翻译
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UTRON  
UT61L1024(E)  
128K X 8 BIT HIGH SPEED CMOS SRAM  
Rev 1.1  
REVISION HISTORY  
REVISION  
DESCRIPTION  
Draft Date  
Rev. 1.0  
Original.  
Nov. 06 2002  
1.Add order information for lead free product  
2.Revised timing read/write waveform  
3.Add *VIL=-3.0V for pulse width less than 10ns into DC table  
Rev. 1.1  
May. 22 2003  
UTRON TECHNOLOGY INC.  
P80040  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882  
FAX: 886-3-5777919  
1
UTRON  
UT61L1024(E)  
128K X 8 BIT HIGH SPEED CMOS SRAM  
Rev 1.1  
FEATURES  
GENERAL DESCRIPTION  
The UT61L1024(E) is a 1,048,576-bit high-speed  
CMOS static random access memory organized  
as 131,072 words by 8 bits. It is fabricated using  
high performance, high reliability CMOS  
technology.  
ꢀ Fast access time : 12/15ns (max.)  
ꢀ Low power operating : 60mA (typ.)  
ꢀ Single 3.0V~3.6V power supply  
ꢀ Operating temperature :  
℃
℃
Extended : -20 ~80  
ꢀ All inputs and outputs TTL compatible  
ꢀ Fully static operation  
ꢀ Three state outputs  
The UT61L1024(E) is designed for high-speed  
system applications. It is particularly suited for use  
in high-density high-speed system applications.  
Data retention voltage : 2V (min.)  
ꢀ
ꢀ Package : 32-pin 300 mil skinny PDIP  
32-pin 300 mil SOJ  
The UT61L1024(E) operates from a single 3.3V  
power supply and all inputs and outputs are fully  
TTL compatible.  
32-pin 450mil SOP  
32-pin 8mm x 20mm TSOP-1  
32-pin 8mm x 13.4mm STSOP  
PIN CONFIGURATION  
FUNCTIONAL BLOCK DIAGRAM  
NC  
Vcc  
A15  
1
2
32  
A16  
31  
30  
29  
2048 X 512  
CE2  
A14  
A12  
3
A0-A16  
DECODER  
MEMORY  
ARRAY  
4
WE  
A13  
A8  
5
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
A7  
A6  
Vcc  
Vss  
6
A5  
A4  
A9  
7
A11  
8
A3  
9
OE  
I/O DATA  
CIRCUIT  
A2  
A10  
I/O1-I/O8  
10  
11  
COLUMN I/O  
A1  
CE  
A0  
I/O8  
12  
13  
14  
15  
16  
I/O1  
I/O2  
I/O3  
Vss  
I/O7  
I/O6  
I/O5  
I/O4  
CE  
CE2  
OE  
CONTROL  
CIRCUIT  
PDIP / SOJ/SOP  
WE  
OE  
A11  
A9  
1
2
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
PIN DESCRIPTION  
A10  
CE  
A8  
3
A13  
WE  
I/O8  
I/O7  
I/O6  
I/O5  
I/O4  
Vss  
I/O3  
I/O2  
I/O1  
A0  
4
SYMBOL  
A0 - A16  
I/O1 - I/O8  
DESCRIPTION  
Address Inputs  
Data Inputs/Outputs  
5
CE2  
A15  
6
7
Chip enable 1,2 Inputs  
,CE2  
CE  
WE  
Vcc  
NC  
A16  
A14  
A12  
A7  
8
UT61L1024(E)  
Write Enable Input  
Output Enable Input  
9
10  
11  
12  
13  
14  
15  
16  
OE  
VCC  
VSS  
NC  
Power Supply  
Ground  
No Connection  
A6  
A1  
A2  
A3  
A5  
A4  
TSOP-I/STSOP  
UTRON TECHNOLOGY INC.  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882 FAX: 886-3-5777919  
P80040  
2
UTRON  
UT61L1024(E)  
128K X 8 BIT HIGH SPEED CMOS SRAM  
Rev 1.1  
ABSOLUTE MAXIMUM RATINGS*  
PARAMETER  
SYMBOL  
VTERM  
TA  
RATING  
-0.5 to 4.6  
-20 to 80  
-65 to 150  
1
UNIT  
V
℃
Terminal Voltage with Respect to Vss  
Operating Temperature  
Storage Temperature  
TSTG  
℃
W
Power Dissipation  
PD  
DC Output Current  
Soldering Temperature (under 10 sec)  
IOUT  
Tsolder  
50  
260  
mA  
℃
*Stress greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a  
stress rating only and functional operation of the device or any other conditions above those indicated in the operational  
sections of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect  
device reliability.  
TRUTH TABLE  
MODE  
I/O OPERATION  
SUPPLY CURRENT  
CE  
H
X
L
L
OE  
X
X
H
L
X
WE  
X
X
H
H
L
CE2  
X
L
H
H
Standby  
Standby  
Output Disable  
Read  
High - Z  
High -Z  
High - Z  
DOUT  
ISB,ISB1  
ISB,ISB1  
ICC  
ICC  
ICC  
Write  
L
H
DIN  
Note: H = VIH, L=VIL, X = Don't care.  
∼
℃
℃
DC ELECTRICAL CHARACTERISTICS  
(VCC = 3.0V 3.6V, TA = -20 to 80  
)
PARAMETER  
Power Voltage  
Input High Voltage  
Input Low Voltage  
Input Leakage Current  
SYMBOL TEST CONDITION  
MIN.  
3.0  
2.0  
- 0.5  
- 1  
MAX.  
3.6  
VCC+0.5  
0.6  
UNIT  
Vcc  
VIH  
V
V
V
*
VIL  
ILI  
1
A
µ
≦
≦
VSS VIN VCC  
ILO  
≦
≦
VSS VI/O VCC  
= V or CE2 = V  
Output Leakage Current  
- 1  
1
CE  
A
µ
IH  
IL  
or  
= VIH or  
= VIL  
OE  
WE  
Output High Voltage  
Output Low Voltage  
Operating Power  
Supply Current  
VOH  
VOL  
ICC  
IOH = - 4mA  
IOL = 8mA  
Cycle time=Min, II/O = 0mA  
2.2  
-
V
V
mA  
mA  
-
-
-
0.4  
100  
90  
- 12  
- 15  
.
= V , CE2 = V  
IL IH  
CE  
CE  
CE  
Standby Power  
Supply Current  
ISB  
-
-
20  
3
mA  
mA  
= V or CE2 = V  
IH  
IL  
ISB1  
≧
≦
VCC-0.2V ;or CE2 0.2V  
Notes:  
1. Overshoot : Vcc+3.0v for pulse width less than 8ns.  
2. Undershoot : Vss-3.0v for pulse width less than 8ns.  
3. Overshoot and Undershoot are sampled, not 100% tested.  
UTRON TECHNOLOGY INC.  
P80040  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882  
FAX: 886-3-5777919  
3
UTRON  
UT61L1024(E)  
128K X 8 BIT HIGH SPEED CMOS SRAM  
Rev 1.1  
℃
(TA=25 , f=1.0MHz)  
CAPACITANCE  
PARAMETER  
Input Capacitance  
SYMBOL  
CIN  
MIN.  
-
MAX.  
8
UNIT  
pF  
Input/Output Capacitance  
CI/O  
-
10  
pF  
Note : These parameters are guaranteed by device characterization, but not production tested.  
AC TEST CONDITIONS  
Input Pulse Levels  
0V to 3.0V  
3ns  
1.5V  
Input Rise and Fall Times  
Input and Output Timing Reference Levels  
Output Load  
CL=30pF, IOH/IOL=-4mA/8mA  
∼
℃
℃
)
AC ELECTRICAL CHARACTERISTICS  
(VCC = 3.0V 3.6V , TA = -20 to 80  
(1) READ CYCLE  
UT61L1024-12 UT61L1024-15  
PARAMETER  
SYMBOL  
UNIT  
MIN.  
MAX. MIN.  
MAX.  
Read Cycle Time  
Address Access Time  
Chip Enable Access Time  
Output Enable Access Time  
Chip Enable to Output in Low Z  
Output Enable to Output in Low Z  
Chip Disable to Output in High Z  
Output Disable to Output in High Z  
Output Hold from Address Change  
tRC  
tAA  
12  
-
-
-
12  
12  
6
-
-
6
6
-
15  
-
-
-
15  
15  
7
-
-
7
7
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
tACE1, tACE1  
tOE  
tCLZ1*, tCLZ2*  
tOLZ*  
tCHZ1*, tCHZ2*  
tOHZ*  
-
-
3
0
-
-
3
4
0
-
-
3
tOH  
(2) WRITE CYCLE  
PARAMETER  
UT61L1024-12 UT61L1024-15  
SYMBOL  
UNIT  
MIN.  
12  
10  
10  
0
MAX. MIN.  
MAX.  
Write Cycle Time  
tWC  
tAW  
tCW1, tCW2  
tAS  
tWP  
tWR  
tDW  
tDH  
tOW*  
-
-
-
-
-
-
-
-
-
7
15  
12  
12  
0
-
-
-
-
-
-
-
-
-
8
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Address Valid to End of Write  
Chip Enable to End of Write  
Address Set-up Time  
Write Pulse Width  
Write Recovery Time  
Data to Write Time Overlap  
Data Hold from End of Write Time  
Output Active from End of Write  
Write to Output in High Z  
9
0
10  
0
7
8
0
0
3
4
tWHZ*  
-
-
*These parameters are guaranteed by device characterization, but not production tested.  
UTRON TECHNOLOGY INC.  
P80040  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882  
FAX: 886-3-5777919  
4
UTRON  
UT61L1024(E)  
128K X 8 BIT HIGH SPEED CMOS SRAM  
Rev 1.1  
TIMING WAVEFORMS  
READ CYCLE 1 (Address Controlled) (1,2)  
tRC  
Address  
tAA  
tOH  
tOH  
Previous data valid  
Dout  
Data Valid  
READ CYCLE 2 ( and CE2 and  
Controlled) (1,3,4,5)  
OE  
CE  
tRC  
Address  
tAA  
CE  
tACE  
CE2  
OE  
tCHZ  
tOHZ  
tOH  
tOE  
tCLZ  
tOLZ  
Dout  
High-Z  
High-Z  
Data Valid  
Notes :  
1.  
is high for read cycle.  
WE  
2.Device is continuously selected  
=low,  
=low, CE2=high.  
CE  
OE  
3.Address must be valid prior to or coincident with  
=low, CE2=high; otherwise tAA is the limiting parameter.  
CE  
4.tCLZ, tOLZ, tCHZ and tOHZ are specified with CL=5pF. Transition is measured 500mV from steady state.  
±
5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tOHZ is less than tOLZ  
.
UTRON TECHNOLOGY INC.  
P80040  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882  
FAX: 886-3-5777919  
5
UTRON  
UT61L1024(E)  
128K X 8 BIT HIGH SPEED CMOS SRAM  
Rev 1.1  
WRITE CYCLE 1 (  
Controlled) (1,2,3,5,6)  
WE  
tWC  
Address  
CE  
tAW  
tCW  
CE2  
tAS  
tWP  
tWR  
WE  
tWHZ  
(4)  
tOW  
High-Z  
Dout  
Din  
(4)  
tDW  
tDH  
Data Valid  
WRITE CYCLE 2 (  
and CE2 Controlled) (1,2,5,6)  
CE  
tWC  
Address  
tAW  
CE  
tWR  
tAS  
tCW  
CE2  
WE  
tWP  
tWHZ  
High-Z  
(4)  
Dout  
Din  
tDW  
tDH  
Data Valid  
UTRON TECHNOLOGY INC.  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882 FAX: 886-3-5777919  
P80040  
6
UTRON  
UT61L1024(E)  
128K X 8 BIT HIGH SPEED CMOS SRAM  
Rev 1.1  
Notes :  
1.  
,
must be high or CE2 must be low during all address transitions.  
WE CE  
2.A write occurs during the overlap of a low  
, high CE2, low  
.
WE  
CE  
3. During a  
controlled write cycle with  
OE  
low, tWP must be greater than tWHZ+tDW to allow the drivers to turn off and data to  
WE  
be placed on the bus.  
4.During this period, I/O pins are in the output state, and input signals must not be applied.  
5. If the low transition and CE2 high transition occurs simultaneously with or after low transition, the outputs remain in a  
CE  
high impedance state.  
6.tOW and tWHZ are specified with CL = 5pF. Transition is measured 500mV from steady state.  
WE  
±
℃
℃
)
DATA RETENTION CHARACTERISTICS  
(TA = -20 to 80  
PARAMETER  
SYMBOL TEST CONDITION  
MIN. MAX. UNIT  
Vcc for Data Retention  
VDR  
IDR  
2.0  
3.6  
V
≧
VCC-0.2V or CE2 ≤ 0.2V  
CE  
Vcc=2V  
Data Retention Current  
-
3
mA  
≧
VCC-0.2V or CE2 ≤ 0.2V  
CE  
Chip Disable to Data  
Retention Time  
Recovery Time  
tCDR  
tR  
See Data Retention Waveforms  
0
5
-
-
ms  
ms  
DATA RETENTION WAVEFORM  
Low Vcc Data Retention Waveform (1) (  
controlled)  
CE  
≧
VDR 2V  
VCC  
CE  
Vcc(min.)  
Vcc(min.)  
tCDR  
tR  
≧
CE  
VCC-0.2V  
VIH  
VIH  
Low Vcc Data Retention Waveform (2) (CE2 controlled)  
≧
VDR 2V  
VCC  
VCC(min.)  
VCC(min.)  
t
CDR  
t
R
≦
CE2  
0.2V  
CE2  
VIL  
VIL  
UTRON TECHNOLOGY INC.  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882 FAX: 886-3-5777919  
P80040  
7
UTRON  
UT61L1024(E)  
128K X 8 BIT HIGH SPEED CMOS SRAM  
Rev 1.1  
PACKAGE OUTLINE DIMENSION  
32-pin Skinny PDIP Package Outline Dimension  
UNIT  
INCH(BASE)  
MM(REF)  
SYMBOL  
±
0.130 0.005  
±
3.302 0.127  
±
0.457 0.102  
A
B
±
0.018 0.004  
±
±
0.254 0.102  
c
0.010 0.004  
±
±
40.640 0.127  
D
1.600 0.005  
±
±
8.001 0.254  
E
0.315 0.010  
±
±
E1  
e1  
eB  
L
0.288 0.004  
7.315 0.102  
0.100 (TYP)  
2.540 (TYP)  
±
±
0.350 0.020  
8.890 0.508  
0.125 (MIN)  
3.175 (MIN)  
o
o
10o  
0
10o  
∼
∼
£c  
0
UTRON TECHNOLOGY INC.  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882 FAX: 886-3-5777919  
P80040  
8
UTRON  
UT61L1024(E)  
128K X 8 BIT HIGH SPEED CMOS SRAM  
Rev 1.1  
32-pin 300mil SOJ Package Outline Dimension  
UNIT  
INCH(BASE)  
0.148 (MAX)  
0.026 (MIN)  
MM(REF)  
SYMBOL  
A
A1  
A2  
B
D
E
3.759 (MAX)  
0.660 (MIN)  
±
±
0.100 0.005  
2.540 0.127  
0.018 (TYP)  
0.830 (MAX)  
0.335 (TYP)  
0.457 (TYP)  
21.082 (MAX)  
8.509 (TYP)  
±
±
E1  
e
0.300 0.005  
7.620 0.127  
0.050 (TYP)  
1.270 (TYP)  
±
±
L
0.086 0.010  
2.184 0.254  
y
0.003 (MAX)  
0.076 (MAX)  
UTRON TECHNOLOGY INC.  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882 FAX: 886-3-5777919  
P80040  
9
UTRON  
UT61L1024(E)  
128K X 8 BIT HIGH SPEED CMOS SRAM  
Rev 1.1  
32-pin 8mm × 20mm TSOP-I Package Outline Dimension  
HD  
C
L
1
32  
16  
17  
y
Seating Plane  
"A"  
D
17  
16  
GAUGE PLANE  
SEATING PLANE  
32  
1
"A" DETAIL VIEW  
L1  
UNIT  
INCH(BASE)  
0.047 (MAX)  
MM(REF)  
1.20 (MAX)  
SYMBOL  
A
±
±
0.10 0.05  
A1  
A2  
0.004 0.002  
±
±
0.039 0.002  
1.00 0.05  
0.008 + 0.002  
- 0.001  
0.20 + 0.05  
-0.03  
b
±
±
18.40 0.10  
D
E
0.724 0.004  
±
±
0.315 0.004  
8.00 0.10  
e
0.020 (TYP)  
0.50 (TYP)  
±
±
20.00 0.20  
HD  
L1  
y
0.787 0.008  
±
±
0.0315 0.004  
0.80 0.10  
0.003 (MAX)  
0.076 (MAX)  
o
o
Θ
∼
∼
0
5o  
0
5o  
UTRON TECHNOLOGY INC.  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882 FAX: 886-3-5777919  
P80040  
10  
UTRON  
UT61L1024(E)  
128K X 8 BIT HIGH SPEED CMOS SRAM  
Rev 1.1  
32-pin 8mm x 13.4mm STSOP Package Outline Dimension  
HD  
c
L
32  
1
17  
16  
"A"  
y
Seating Plane  
D
16  
17  
GAUGE PLANE  
0
SEATING PLANE  
L1  
"A" DATAIL VIEW  
1
32  
UNIT  
INCH(BASE)  
0.047 (MAX)  
MM(REF)  
SYMBOL  
A
A1  
A2  
b
1.20 (MAX)  
±
±
0.10 0.05  
±
1.00 0.05  
±
0.200 0.025  
0.004 0.002  
±
0.039 0.002  
±
0.008 0.001  
±
±
11.800 0.100  
D
0.465 0.004  
±
±
E
0.315 0.004  
8.000 0.100  
e
0.020 (TYP)  
0.50 (TYP)  
±
±
13.40 0.20.  
HD  
L1  
y
0.528 0.008  
±
±
0.0315 0.004  
0.80 0.10  
0.003 (MAX)  
0.076 (MAX)  
o
o
Θ
∼
∼
0
5o  
0
5o  
UTRON TECHNOLOGY INC.  
P80040  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882 FAX: 886-3-5777919  
11  
UTRON  
UT61L1024(E)  
128K X 8 BIT HIGH SPEED CMOS SRAM  
Rev 1.1  
32-pin 450mil SOP Package Outline Dimension  
UNIT  
INCH(BASE)  
0.118 (MAX)  
0.004 (MIN)  
0.111 (MAX)  
0.016 (TYP)  
0.817 (MAX)  
MM(REF)  
SYMBOL  
A
A1  
A2  
b
2.997 (MAX)  
0.102 (MIN)  
2.82 (MAX)  
0.406 (TYP)  
20.75 (MAX)  
D
±
±
11.303 0.127  
E
0.445 0.005  
±
±
E1  
e
0.555 0.012  
14.097 0.305  
0.050 (TYP)  
1.270 (TYP)  
±
±
0.881 0.203  
L
0.0347 0.008  
±
±
L1  
S
y
Θ
0.055 0.008  
1.397 0.203  
0.026 (MAX)  
0.004 (MAX)  
0o ~10o  
0.660 (MAX)  
0.101 (MAX)  
0o ~10o  
UTRON TECHNOLOGY INC.  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882 FAX: 886-3-5777919  
P80040  
12  
UTRON  
UT61L1024(E)  
128K X 8 BIT HIGH SPEED CMOS SRAM  
Rev 1.1  
ORDERING INFORMATION  
PART NO.  
ACCESS TIME (ns)  
PACKAGE  
32PIN SKINNY PDIP  
32PIN SKINNY PDIP  
32PIN SOJ  
32PIN SOJ  
32PIN SOP  
UT61L1024KC-12E  
UT61L1024KC-15E  
UT61L1024JC-12E  
UT61L1024JC-15E  
UT61L1024SC-12E  
UT61L1024SC-15E  
UT61L1024LC-12E  
UT61L1024LC-15E  
UT61L1024LS-12E  
UT61L1024LS-15E  
12  
15  
12  
15  
12  
15  
12  
15  
12  
15  
32PIN SOP  
32PIN TSOP-1  
32PIN TSOP-1  
32PIN STSOP  
32PIN STSOP  
ORDERING INFORMATION (for lead free product)  
PART NO.  
ACCESS TIME (ns)  
PACKAGE  
32PIN SKINNY PDIP  
32PIN SKINNY PDIP  
32PIN SOJ  
32PIN SOJ  
32PIN SOP  
UT61L1024KCL-12E  
UT61L1024KCL-15E  
UT61L1024JCL-12E  
UT61L1024JCL-15E  
UT61L1024SCL-12E  
UT61L1024SCL-15E  
UT61L1024LCL-12E  
UT61L1024LCL-15E  
UT61L1024LSL-12E  
UT61L1024LSL-15E  
12  
15  
12  
15  
12  
15  
12  
15  
12  
15  
32PIN SOP  
32PIN TSOP-1  
32PIN TSOP-1  
32PIN STSOP  
32PIN STSOP  
UTRON TECHNOLOGY INC.  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882 FAX: 886-3-5777919  
P80040  
13  
UTRON  
UT61L1024(E)  
128K X 8 BIT HIGH SPEED CMOS SRAM  
Rev 1.1  
This page is left blank intentionally.  
UTRON TECHNOLOGY INC.  
P80040  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882  
FAX: 886-3-5777919  
14  

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