FDPF18N50T [FAIRCHILD]
Power Field-Effect Transistor, 18A I(D), 500V, 0.265ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-220AB, LEAD FREE, TO-220F, 3 PIN;
| 型号： | FDPF18N50T |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Power Field-Effect Transistor, 18A I(D), 500V, 0.265ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-220AB, LEAD FREE, TO-220F, 3 PIN 局域网 开关 脉冲 晶体管 |
| 文件： | 总10页 (文件大小：371K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
April 2007
TM
UniFET
FDP18N50 / FDPF18N50
500V N-Channel MOSFET
Features
Description
•
•
•
•
•
•
18A, 500V, RDS(on) = 0.265Ω @VGS = 10 V
Low gate charge ( typical 45 nC)
Low Crss ( typical 25 pF)
Fast switching
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary, planar
stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the avalanche
and commutation mode. These devices are well suited for high
efficient switched mode power supplies and active power factor
correction.
100% avalanche tested
Improved dv/dt capability
D
G
TO-220F
FDPF Series
S
TO-220
G
G D
S
D S
FDP Series
Absolute Maximum Ratings
Symbol
Parameter
FDP18N50 FDPF18N50
Unit
VDSS
Drain-Source Voltage
Drain Current
500
V
ID
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
18
10.8
18 *
10.8 ∗
A
A
(Note 1)
(Note 2)
IDM
Drain Current
- Pulsed
72
72 ∗
A
V
VGSS
EAS
IAR
Gate-Source voltage
±30
945
18
Single Pulsed Avalanche Energy
Avalanche Current
mJ
A
(Note 1)
(Note 1)
(Note 3)
EAR
dv/dt
PD
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
23.5
4.5
mJ
V/ns
Power Dissipation
(TC = 25°C)
- Derate above 25°C
235
1.88
38.5
0.3
W
W/°C
TJ, TSTG
TL
Operating and Storage Temperature Range
-55 to +150
300
°C
Maximum Lead Temperature for Soldering Purpose,
1/8” from Case for 5 Seconds
°C
* Drain current limited by maximum junction temperature
Thermal Characteristics
Symbol
Parameter
FDP18N50 FDPF18N50
Unit
°C/W
°C/W
°C/W
RθJC
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case-to-Sink Typ.
Thermal Resistance, Junction-to-Ambient
0.53
0.5
3.3
--
RθCS
RθJA
62.5
62.5
©2007 Fairchild Semiconductor Corporation
FDP18N50 / FDPF18N50 Rev. B
1
www.fairchildsemi.com
Package Marking and Ordering Information
Device Marking
FDP18N50
Device
FDP18N50
FDPF18N50
Package
TO-220
Reel Size
Tape Width
Quantity
-
-
-
-
50
50
FDPF18N50
TO-220F
Electrical Characteristics
T
= 25°C unless otherwise noted
C
Symbol
Parameter
Conditions
Min. Typ. Max Units
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0V, ID = 250μA
500
--
--
--
--
V
ΔBVDSS
Breakdown Voltage Temperature
Coefficient
ID = 250μA, Referenced to 25°C
0.5
V/°C
/
ΔTJ
IDSS
Zero Gate Voltage Drain Current
VDS = 500V, VGS = 0V
VDS = 400V, TC = 125°C
--
--
--
--
1
10
μA
μA
IGSSF
IGSSR
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
VGS = 30V, VDS = 0V
VGS = -30V, VDS = 0V
--
--
--
--
100
nA
nA
-100
On Characteristics
VGS(th) Gate Threshold Voltage
RDS(on)
VDS = VGS, ID = 250μA
VGS = 10V, ID = 9A
VDS = 40V, ID = 9A
3.0
--
--
0.220
25
5.0
0.265
--
V
Ω
S
Static Drain-Source
On-Resistance
gFS
Forward Transconductance
(Note 4)
--
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
VDS = 25V, VGS = 0V,
f = 1.0MHz
--
--
--
2200
330
25
2860
430
40
pF
pF
pF
Output Capacitance
Reverse Transfer Capacitance
Switching Characteristics
td(on) Turn-On Delay Time
tr
td(off)
tf
VDD = 250V, ID = 18A
RG = 25Ω
--
--
--
--
--
--
--
55
165
95
120
340
200
190
60
ns
ns
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
ns
(Note 4, 5)
(Note 4, 5)
90
ns
Qg
VDS = 400V, ID = 18A
VGS = 10V
45
nC
nC
nC
Qgs
Qgd
12.5
19
--
--
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
Maximum Pulsed Drain-Source Diode Forward Current
--
--
--
--
--
--
--
18
72
1.4
--
A
A
ISM
VSD
trr
Drain-Source Diode Forward Voltage
Reverse Recovery Time
VGS = 0V, IS = 18A
--
V
VGS = 0V, IS = 18A
500
5.4
ns
μC
dIF/dt =100A/μs
(Note 4)
Qrr
Reverse Recovery Charge
--
NOTES:
1. Repetitive Rating: Pulse width limited by maximum junction temperature
2. L = 5.2mH, I = 18A, V = 50V, R = 25Ω, Starting T = 25°C
AS
DD
G
J
3. I ≤ 18A, di/dt ≤ 200A/μs, V ≤ BV
, Starting T = 25°C
SD
DD
DSS
J
4. Pulse Test: Pulse width ≤ 300μs, Duty Cycle ≤ 2%
5. Essentially Independent of Operating Temperature Typical Characteristics
2
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FDP18N50 / FDPF18N50 Rev. B
Typical Performance Characteristics
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
102
101
100
VGS
102
101
100
10-1
Top :
15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
Bottom : 5.5 V
150oC
25oC
-55oC
* Notes :
1. 250μs Pulse Test
* Notes :
1. VDS = 40V
2. 250μs Pulse Test
o
2. TC = 25 C
10-1
100
101
2
4
6
8
10 12
VDS, Drain-Source Voltage [V]
VGS, Gate-Source Voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperatue
102
101
100
0.6
0.5
VGS = 10V
0.4
0.3
VGS = 20V
150oC
25oC
0.2
* Notes :
1. VGS = 0V
2. 250μs Pulse Test
o
* Note : TJ = 25 C
0.1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
0
5
10 15 20 25 30 35 40 45 50 55 60 65 70
VSD, Source-Drain voltage [V]
ID, Drain Current [A]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
5000
12
C
C
iss = Cgs + Cgd (Cds = shorted)
oss = Cds + Cgd
Crss = Cgd
10
8
4000
3000
2000
1000
0
VDS = 100V
VDS = 250V
Coss
VDS = 400V
C
iss
6
4
* Note :
1. VGS = 0 V
2. f = 1 MHz
C
rss
2
* Note : ID = 18A
0
10-1
100
101
0
10
20
30
40
50
VDS, Drain-Source Voltage [V]
QG, Total Gate Charge [nC]
3
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FDP18N50 / FDPF18N50 Rev. B
Typical Performance Characteristics (Continued)
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
3.0
2.5
2.0
1.5
1.0
1.2
1.1
1.0
* Notes :
1. VGS = 0 V
0.9
* Notes :
1. VGS = 10 V
2. ID = 250μA
0.5
2. ID = 9 A
0.8
-100
0.0
-100
-50
0
50
100
150
200
-50
0
50
100
150
200
T, Junction Temperature [oC]
TJ, Junction Temperature [oC]
J
Figure 9-1. Maximum Safe Operating Area
- FDP18N50
Figure 9-2. Maximum Safe Operating Area
- FDPF18N50
102
102
10 μs
10 μs
100 μs
1 ms
10 ms
100 ms
DC
100 μs
1 ms
101
101
100
10-1
10-2
10 ms
100 ms
Operation in This Area
is Limited by R DS(on)
DC
Operation in This Area
is Limited by R DS(on)
100
-1
10
* Notes :
* Notes :
1. TC = 25 o
C
2. TJ = 150 o
C
1. TC = 25 o
C
2. TJ = 150 o
C
3. Single Pulse
3. Single Pulse
-2
10
100
101
102
100
101
102
VDS, Drain-Source Voltage [V]
VDS, Drain-Source Voltage [V]
Figure 10. Maximum Drain Currentvs. Case Temperature
20
15
10
5
0
25
50
75
100
125
150
TC, Case Temperature [oC]
4
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FDP18N50 / FDPF18N50 Rev. B
Typical Performance Characteristics (Continued)
Figure 11-1. Transient Thermal Response Curve - FDP18N50
1 00
D = 0.5
0 .2
10 -1
0.1
PDM
0.05
t1
t2
*
N o te s
:
0 .02
0 .01
o
1 . Z θ JC (t)
=
0.53 C /W M ax.
10 -2
2 . D u ty F actor, D = t1/t2
3 . T JM
-
T C
=
P D M
* Z θ JC (t)
sing le p ulse
10 -3
1 0-5
1 0-4
10 -2
10 -1
1 00
10 1
t1 , S q u a re W a ve P u lse D u ra tio n [se c]
Figure 11-2. Transient Thermal Response Curve - FDPF18N50
D = 0.5
1 00
0 .2
0.1
0.05
PDM
10 -1
0 .02
0 .01
t1
t2
*
N o te s
:
o
1 . Z θ JC (t)
=
3.3 C /W M ax.
2 . D u ty F actor, D = t1/t2
3 . T JM
-
T C
=
P D M
* Z θ JC (t)
sing le pu lse
10 -3
10 -2
1 0-5
1 0-4
10 -2
10 -1
1 00
10 1
t1 , S q u a re W a ve P u lse D u ra tio n [se c]
5
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FDP18N50 / FDPF18N50 Rev. B
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
6
www.fairchildsemi.com
FDP18N50 / FDPF18N50 Rev. B
Peak Diode Recovery dv/dt Test Circuit & Waveforms
7
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FDP18N50 / FDPF18N50 Rev. B
Mechanical Dimensions
TO - 220
Dimensions in Millimeters
8
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FDP18N50 / FDPF18N50 Rev. B
Mechanical Dimensions
TO-220F
2.54 ±0.20
10.16 ±0.20
ø3.18 ±0.10
(7.00)
(0.70)
(1.00x45°)
MAX1.47
0.80 ±0.10
#1
0.35 ±0.10
+0.10
–0.05
0.50
2.76 ±0.20
2.54TYP
2.54TYP
[2.54 ±0.20]
[2.54 ±0.20]
9.40 ±0.20
9
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FDP18N50 / FDPF18N50 Rev. B
tm
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(a) are intended for surgical implant into the body or (b) support
or sustain life, and (c) whose failure to perform when properly
used in accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a significant
injury of the user.
2. A critical component in any component of a life support,
device, or system whose failure to perform can be reasonably
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or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In Design
This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
Preliminary
First Production
Full Production
This datasheet contains preliminary data; supplementary data will be
published at a later date. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve design.
No Identification Needed
This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice to
improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product that has been dis-
continued by Fairchild Semiconductor.The datasheet is printed for refer-
ence information only.
Rev. I26
10
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FDP18N50 / FDPF18N50 Rev. B
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