FDW254P_NL [FAIRCHILD]
Power Field-Effect Transistor, 9.2A I(D), 20V, 0.012ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TSSOP-8;
| 型号： | FDW254P_NL |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Power Field-Effect Transistor, 9.2A I(D), 20V, 0.012ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TSSOP-8 开关 脉冲 光电二极管 晶体管 |
| 文件： | 总5页 (文件大小：92K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
January 2001
FDW254P
P-Channel 1.8V Specified PowerTrench MOSFET
General Description
Features
This P-Channel 1.8V specified MOSFET is a rugged
gate version of Fairchild Semiconductor’s advanced
PowerTrench process. It has been optimized for power
management applications with a wide range of gate
drive voltage (1.8V – 8V).
• –9.2 A, –20 V.
RDS(ON) = 12 mΩ @ VGS = –4.5 V
RDS(ON) = 15 mΩ @ VGS = –2.5 V
RDS(ON) = 21.5 mΩ @ VGS = –1.8 V
• Rds ratings for use with 1.8 V logic
• Low gate charge
Applications
• Load switch
• High performance trench technology for extremely
• Motor drive
low RDS(ON)
• DC/DC conversion
• Power management
• Low profile TSSOP-8 package
D
S
5
6
7
8
4
3
2
1
S
D
G
S
S
D
TSSOP-8
Pin 1
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
VDSS
Parameter
Drain-Source Voltage
Ratings
–20
Units
V
VGSS
ID
Gate-Source Voltage
Drain Current – Continuous
– Pulsed
V
A
±8
(Note 1)
–9.2
–50
1.3
PD
Power Dissipation
(Note 1a)
(Note 1b)
W
0.6
TJ, TSTG
Operating and Storage Junction Temperature Range
°C
–55 to +150
Thermal Characteristics
Thermal Resistance, Junction-to-Ambient
(Note 1a)
(Note 1b)
96
RθJA
°C/W
208
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
254P
FDW254P
13’’
12mm
3000 units
FDW254P Rev D (W)
2001 Fairchild Semiconductor Corporation
Electrical Characteristics
TA = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
Drain–Source Breakdown Voltage
–20
V
V
GS = 0 V, ID = –250 µA
∆BVDSS
∆TJ
Breakdown Voltage Temperature
Coefficient
–11
ID = –250 µA, Referenced to 25°C
mV/°C
IDSS
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
VDS = –16 V, VGS = 0 V
–1
µA
nA
nA
IGSSF
IGSSR
VGS = –8 V,
VGS = 8 V
VDS = 0 V
VDS = 0 V
–100
100
On Characteristics
(Note 2)
VGS(th)
Gate Threshold Voltage
–0.4
–0.6
2
–1.5
V
V
DS = VGS, ID = –250 µA
∆VGS(th)
∆TJ
Gate Threshold Voltage
Temperature Coefficient
ID = –250 µA, Referenced to 25°C
mV/°C
mΩ
RDS(on)
Static Drain–Source
On–Resistance
VGS = –4.5 V,
VGS = –2.5 V,
VGS = –1.8 V,
ID = –9.2 A
ID = –7.9 A
ID = –6.5 A
9
12
15
21.5
18
11
14
12
VGS=–4.5 V, ID =–9.2 A, TJ=125°C
ID(on)
gFS
On–State Drain Current
VGS = –4.5 V,
VDS = –5 V,
VDS = –5 V
ID = –9.2 A
–50
A
S
Forward Transconductance
54
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
5878
994
pF
pF
pF
VDS = –10 V,
f = 1.0 MHz
V GS = 0 V,
Output Capacitance
Reverse Transfer Capacitance
559
Switching Characteristics (Note 2)
td(on)
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
15
15
27
27
ns
ns
VDD = –10 V,
VGS = –4.5 V,
ID = –1 A,
RGEN = 6 Ω
Tr
Td(off)
tf
210
100
60
336
160
96
ns
ns
Qg
nC
nC
nC
V
DS = –10 V,
ID = –9.2 A,
VGS = –4.5 V
Qgs
Qgd
7
13
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain–Source Diode Forward Current
–1.2
–1.2
A
V
VSD
Drain–Source Diode Forward
Voltage
VGS = 0 V, IS = –1.2 A (Note 2)
–0.5
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) RθJA is 96°C/W (steady state) when mounted on a 1 inch² copper pad on FR-4.
b) RθJA is 208°C/W (steady state) when mounted on a minimum copper pad on FR-4.
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDW254P Rev. D (W)
Typical Characteristics
50
2
1.8
1.6
1.4
1.2
1
VGS = -4.5V
VGS = -1.5V
-2.0V
-3.0V
40
-1.5V
-2.5V
30
-2.0V
20
10
0
-2.5V
-3.0V
30
-3.5V
-4.5V
0.8
0
0.5
1
1.5
2
0
10
20
40
50
-VDS, DRAIN TO SOURCE VOLTAGE (V)
-ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.035
1.5
1.4
1.3
1.2
1.1
1
ID = -4.6A
ID = -9.2A
0.03
0.025
0.02
VGS = -4.5V
TA = 125oC
0.015
0.01
0.9
0.8
0.7
TA = 25oC
0.005
0
1
2
3
4
5
-50
-25
0
25
50
75
100
125
150
-VGS, GATE TO SOURCE VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (oC)
Figure 3. On-Resistance Variation
withTemperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
100
50
40
30
20
10
0
TA = -55oC
VGS = 0V
25oC
125oC
VDS = -5V
10
1
TA = 125oC
25oC
0.1
-55oC
0.01
0.001
0
0.2
0.4
0.6
0.8
1
1.2
0.5
1
1.5
2
-VSD, BODY DIODE FORWARD VOLTAGE (V)
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDW254P Rev. D (W)
Typical Characteristics
5
10000
8000
6000
4000
2000
0
VDS = -6V
f = 1 MHz
VGS = 0 V
ID = -9.2A
-8V
4
3
2
1
0
-10V
CISS
COSS
CRSS
0
10
20
30
40
50
60
70
0
5
10
15
20
Qg, GATE CHARGE (nC)
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
100
10
50
40
30
20
10
0
µ
100
10ms
100ms
s
SINGLE PULSE
RθJA = 208°C/W
RDS(ON) LIMIT
TA = 25°C
1s
10s
1
DC
VGS = -4.5V
SINGLE PULSE
RθJA = 208oC/W
TA = 25oC
0.1
0.01
0.01
0.1
1
10
100
0.01
0.1
1
10
100
1000
-VDS, DRAIN-SOURCE VOLTAGE (V)
t1, TIME (sec)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
RθJA(t) = r(t) + Rθ
JA
0.2
RθJA = 208 °C/W
0.1
0.1
0.05
0.02
P(pk)
t1
0.01
0.01
t2
TJ - TA = P * RθJA(t)
SINGLE PULSE
Duty Cycle, D = t1 / t2
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
FDW254P Rev. D (W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
â
SMART START™
STAR*POWER™
Stealth™
VCX™
FAST
ACEx™
Bottomless™
CoolFET™
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
FASTr™
FRFET™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
CROSSVOLT™
DenseTrench™
DOME™
POP™
Power247™
PowerTrenchâ
QFET™
EcoSPARK™
E2CMOSTM
TinyLogic™
QS™
EnSignaTM
TruTranslation™
UHC™
QT Optoelectronics™
Quiet Series™
SILENTSWITCHERâ
FACT™
FACT Quiet Series™
UltraFETâ
STAR*POWER is used under license
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITYARISING OUT OF THE APPLICATION OR USE OFANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICESORSYSTEMSWITHOUTTHEEXPRESSWRITTENAPPROVALOFFAIRCHILDSEMICONDUCTORCORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H4
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