ICS840051AGIT [ICSI]
FEMTOCLOCKS? CRYSTAL-TO LVCMOS/LVTTL FREQUENCY SYNTHESIZER; FEMTOCLOCKS⑩ CRYSTAL -TO LVCMOS / LVTTL频率合成器
| 型号： | ICS840051AGIT |
| 厂家： | 
INTEGRATED CIRCUIT SOLUTION INC |
| 描述： | FEMTOCLOCKS? CRYSTAL-TO LVCMOS/LVTTL FREQUENCY SYNTHESIZER |
| 文件： | 总10页 (文件大小：205K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ICS840051I
Integrated
Circuit
Systems, Inc.
F
EMTO
C
LOCKS™ CRYSTAL
-TO-
LVCMOS/LVTTL CLOCK
GENERATOR
GENERAL DESCRIPTION
FEATURES
The ICS840051I is a Gigabit Ethernet Clock • 1 LVCMOS/LVTTL output, 15Ω output impedance
ICS
Generator and a member of the HiPerClocksTM
• Crystal oscillator interface designed for
family of high performance devices from ICS.The
18pF parallel resonant crystals
HiPerClockS™
ICS840051I can synthesize 10 Gigabit Ethernet,
SONET, or Serial ATA reference clock fre-
• Output frequency range: 70MHz - 170MHz
• VCO range: 560MHz - 680MHz
quencies with the appropriate choice of crystal and output
divider.The ICS840051I has excellent phase jitter performance
and is packaged in a small 8-pin TSSOP, making it ideal for
use in systems with limited board space.
• RMS phase jitter at 155.52MHz (1.875MHz - 20MHz):
0.48ps (typical)
• RMS phase noise at 155.52MHz
Offset Noise Power
100Hz ............... -99.7 dBc/Hz
1KHz ................ -120 dBc/Hz
10KHz ................ -128 dBc/Hz
100KHz ................ -127 dBc/Hz
• 3.3V or 2.5V operating supply
• -40°C to 85°C ambient operating temperature
• Lead-Free fully RoHS compliant
FREQUENCY TABLE
Inputs
Output Frequency
(MHz)
Crystal Frequency (MHz)
20.141601
20.141601
19.53125
19.53125
19.44
FREQ_SEL
0
1
0
1
0
1
0
1
161.132812
80.566406
156.25
78.125
155.52
77.76
19.44
18.75
150
18.75
75
BLOCK DIAGRAM
PIN ASSIGNMENT
Pullup
OE
VDDA
OE
VDD
1
2
3
4
8
7
6
5
Pulldown
FREQ_SEL
Q0
XTAL_OUT
XTAL_IN
GND
FREQ_SEL
XTAL_IN
OSC
0
1
÷4 (default)
÷8
Phase
Detector
VCO
560MHz-680MHz
Q0
XTAL_OUT
ICS840051I
8-Lead TSSOP
4.40mm x 3.0mm x 0.925mm
package body
÷32
(fixed)
G Package
TopView
840051AGI
www.icst.com/products/hiperclocks.html
REV. A JANUARY 14, 2005
1
ICS840051I
Integrated
Circuit
Systems, Inc.
F
EMTO
C
LOCKS™ CRYSTAL
-TO-
LVCMOS/LVTTL CLOCK
GENERATOR
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1
VDDA
Power
Input
Analog supply pin.
Output enable pin. When HIGH, Q0 output is enabled. When LOW,
forces Q0 to HiZ state. LVCMOS/LVTTL interface levels. See Table 3A.
Crystal oscillator interface. XTAL_IN is the input,
XTAL_OUT is the output.
2
OE
Pullup
XTAL_OUT,
XTAL_IN
3, 4
Input
5
6
FREQ_SEL
GND
Input
Pulldown Frequency select pin. LVCMOS/LVTTL interface levels. See Table 3B.
Power supply ground.
Power
Single-ended clock output. LVCMOS/LVTTL interface levels.
15Ω output impedance.
Core supply pin.
7
8
Q0
Output
Power
VDD
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol Parameter
Test Conditions
Minimum
Typical Maximum Units
CIN
Input Capacitance
4
pF
pF
pF
KΩ
KΩ
Ω
VDD, VDDA = 3.465V
VDD, VDDA = 2.625V
7
CPD
Power Dissipation Capacitance
Input Pullup Resistor
7
RPULLUP
51
51
15
RPULLDOWN Input Pulldown Resistor
ROUT Output Impedance
TABLE 3A. CONTROL FUNCTION TABLE
Control Input
Output
Q0
OE
0
Hi-Z
1
Active
TABLE 3B. FREQ_SEL FUNCTION TABLE
Control Input
N Divider
FRE_SEL
0
1
÷4 (default)
÷8
840051AGI
www.icst.com/products/hiperclocks.html
REV. A JANUARY 14, 2005
2
ICS840051I
Integrated
Circuit
Systems, Inc.
F
EMTO
C
LOCKS™ CRYSTAL
-TO-
LVCMOS/LVTTL CLOCK
GENERATOR
ABSOLUTE MAXIMUM RATINGS
SupplyVoltage, V
4.6V
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device.These ratings are stress specifications only.Functional
operation of product at these conditions or any conditions be-
yond those listed in the DC Characteristics or AC Character-
istics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
DD
Inputs, V
-0.5V to VDD + 0.5 V
-0.5V to VDD + 0.5V
101.7°C/W (0 mps)
-65°C to 150°C
I
Outputs, VO
PackageThermal Impedance, θ
JA
StorageTemperature, T
STG
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDA = 3.3V 5ꢀ, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum
3.135
Typical
3.3
Maximum Units
VDD
VDDA
IDD
Core Supply Voltage
3.465
3.465
60
V
Analog Supply Voltage
Power Supply Current
Analog Supply Current
3.135
3.3
V
mA
mA
IDDA
10
TABLE 4B. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDA = 2.5V 5ꢀ, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum
2.375
Typical
2.5
Maximum Units
VDD
VDDA
IDD
Core Supply Voltage
2.625
2.625
55
V
Analog Supply Voltage
Power Supply Current
Analog Supply Current
2.375
2.5
V
mA
mA
IDDA
10
TABLE 4C. LVCMOS/LVTTL DC CHARACTERISTICS, VDD = VDDA = 3.3V 5ꢀ, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
VIH
VIL
Input High Voltage
2
VDD + 0.3
V
V
Input Low Voltage
-0.3
0.8
150
5
FREQ_SEL
OE
V
DD = VIN = 3.465V or 2.625V
DD = VIN = 3.465V or 2.625V
µA
µA
µA
µA
V
IIH
Input High Current
V
FREQ_SEL
OE
V
DD = 3.465V or 2.625V, VIN = 0V
DD = 3.465V or 2.625V, VIN = 0V
-5
-150
2.6
IIL
Input Low Current
V
V
DD = 3.465V
DD = 2.625V
VOH
VOL
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
V
1.8
V
VDD = 3.465V or 2.625V
0.5
V
NOTE 1: Outputs terminated with 50Ω to VDD/2. See Parameter Measurement Information Section,
"Output Load Test Circuit" diagrams.
840051AGI
www.icst.com/products/hiperclocks.html
REV. A JANUARY 14, 2005
3
ICS840051I
Integrated
Circuit
Systems, Inc.
F
EMTO
C
LOCKS™ CRYSTAL
-TO-
LVCMOS/LVTTL CLOCK
GENERATOR
TABLE 5. CRYSTAL CHARACTERISTICS
Parameter
Test Conditions
Minimum
Typical Maximum Units
Fundamental
Mode of Oscillation
Frequency
17.5
21.25
50
MHz
Ω
Equivalent Series Resistance (ESR)
Shunt Capacitance
7
pF
TABLE 6A. AC CHARACTERISTICS, VDD = VDDA = 3.3V 5ꢀ, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
fOUT
Output Frequency
70
170
MHz
RMS Phase Jitter ( Random);
NOTE 1
155.52MHz, Integration Range:
1.875MHz - 20MHz
tjit(Ø)
0.48
ps
tR / tF
odc
Output Rise/Fall Time
Output Duty Cycle
20ꢀ to 80ꢀ
150
48
500
52
ps
ꢀ
NOTE 1: Please refer to the Phase Noise Plots.
TABLE 6B. AC CHARACTERISTICS, VDD = VDDA = 2.5V 5ꢀ, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
fOUT
Output Frequency
70
170
MHz
RMS Phase Jitter ( Random);
NOTE 1
155.52MHz, Integration Range:
1.875MHz - 20MHz
tjit(Ø)
0.50
ps
tR / tF
odc
Output Rise/Fall Time
Output Duty Cycle
20ꢀ to 80ꢀ
200
49
600
51
ps
ꢀ
NOTE 1: Please refer to the Phase Noise Plots.
840051AGI
www.icst.com/products/hiperclocks.html
REV. A JANUARY 14, 2005
4
ICS840051I
Integrated
Circuit
Systems, Inc.
F
EMTO
C
LOCKS™ CRYSTAL
-TO-
LVCMOS/LVTTL CLOCK
GENERATOR
TYPICAL PHASE NOISE AT 155.52MHZ (3.3V)
0
-10
-20
-30
-40
-50
10GigE Filter
155.52MHz
RMS Phase Jitter (Random)
1.875Mhz to 20MHz = 0.48ps (typical)
-60
-70
-80
-90
-100
-110
-120
-130
Raw Phase Noise Data
-140
-150
-160
-170
Phase Noise Result by adding
10GigE Filter to raw data
-180
-190
100
1k
10k
100k
1M
10M
100M
OFFSET FREQUENCY (HZ)
TYPICAL PHASE NOISE AT 155.52MHZ (2.5V)
0
-10
-20
-30
-40
-50
10GigE Filter
155.52MHz
RMS Phase Jitter (Random)
-60
-70
-80
-90
1.875Mhz to 20MHz = 0.50ps (typical)
-100
-110
Raw Phase Noise Data
-120
-130
-140
-150
-160
-170
-180
Phase Noise Result by adding
10GigE Filter to raw data
-190
100
1k
10k
100k
1M
10M
100M
OFFSET FREQUENCY (HZ)
840051AGI
www.icst.com/products/hiperclocks.html
REV. A JANUARY 14, 2005
5
ICS840051I
Integrated
Circuit
Systems, Inc.
F
EMTO
C
LOCKS™ CRYSTAL
-TO-
LVCMOS/LVTTL CLOCK
GENERATOR
PARAMETER MEASUREMENT INFORMATION
1.65V 5ꢀ
1.25V 5ꢀ
SCOPE
SCOPE
VDD
VDDA
,
VDD
VDDA
,
Qx
Qx
LVCMOS
GND
LVCMOS
GND
-1.25V 5ꢀ
-1.65V 5ꢀ
3.3V CORE/3.3V OUTPUT LOAD AC TEST CIRCUIT
2.5V CORE/2.5V OUTPUT
L
OAD AC TEST
CIRCUIT
Phase Noise Plot
VDD
2
Q0
Pulse Width
tPERIOD
Phase Noise Mask
tPW
odc =
Offset Frequency
f1
f2
tPERIOD
RMS Jitter = Area Under the Masked Phase Noise Plot
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
RMS PHASE JITTER
80ꢀ
tF
80ꢀ
tR
20ꢀ
20ꢀ
Clock
Outputs
OUTPUT RISE/FALL TIME
840051AGI
www.icst.com/products/hiperclocks.html
REV. A JANUARY 14, 2005
6
ICS840051I
Integrated
Circuit
Systems, Inc.
F
EMTO
C
LOCKS™ CRYSTAL
-TO-
LVCMOS/LVTTL CLOCK
GENERATOR
APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins are
vulnerable to random noise.The ICS840051I provides separate
power supplies to isolate any high switching noise from the out-
puts to the internal PLL.VDD andVDDA should be individually con-
nected to the power supply plane through vias, and bypass ca-
pacitors should be used for each pin. To achieve optimum
jitter performance, power supply isolation is required. Figure 1
illustrates how a 10Ω resistor along with a 10µF and a .01µF
bypass capacitor should be connected to each VDDA pin.
3.3V or 2.5V
VDD
.01µF
.01µF
10Ω
VDDA
10µF
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
The ICS840051I has been characterized with 18pF parallel parallel resonant crystal and were chosen to minimize the ppm
resonant crystals. The capacitor values, C1 and C2, shown in error. The optimum C1 and C2 values can be slightly adjusted
Figure 2 below were determined using a 26.04167MHz, 18pF for different board layouts.
XTAL_OUT
C1
33p
X1
18pF Parallel Crystal
XTAL_IN
C2
22p
Figure 2. CRYSTAL INPUt INTERFACE
840051AGI
www.icst.com/products/hiperclocks.html
REV. A JANUARY 14, 2005
7
ICS840051I
Integrated
Circuit
Systems, Inc.
F
EMTO
C
LOCKS™ CRYSTAL
-TO-
LVCMOS/LVTTL CLOCK
GENERATOR
RELIABILITY INFORMATION
TABLE 7. θJAVS. AIR FLOW TABLE FOR 8 LEAD TSSOP
θJA byVelocity (Meters per Second)
0
1
2.5
89.8°C/W
Multi-Layer PCB, JEDEC Standard Test Boards
101.7°C/W
90.5°C/W
TRANSISTOR COUNT
The transistor count for ICS840051I is: 1927
840051AGI
www.icst.com/products/hiperclocks.html
REV. A JANUARY 14, 2005
8
ICS840051I
Integrated
Circuit
Systems, Inc.
F
EMTO
C
LOCKS™ CRYSTAL
-TO-
LVCMOS/LVTTL CLOCK
GENERATOR
PACKAGE OUTLINE - G SUFFIX FOR 8 LEAD TSSOP
TABLE 8. PACKAGE DIMENSIONS
Millimeters
SYMBOL
Minimum
Maximum
N
A
8
--
1.20
0.15
1.05
0.30
0.20
3.10
A1
A2
b
0.05
0.80
0.19
0.09
2.90
c
D
E
6.40 BASIC
0.65 BASIC
E1
e
4.30
4.50
L
0.45
0°
0.75
8°
α
aaa
--
0.10
Reference Document: JEDEC Publication 95, MO-153
840051AGI
www.icst.com/products/hiperclocks.html
REV. A JANUARY 14, 2005
9
ICS840051I
Integrated
Circuit
Systems, Inc.
F
EMTO
CLOCKS™ CRYSTAL- -
TO
LVCMOS/LVTTL CLOCK
GENERATOR
TABLE 9. ORDERING INFORMATION
Part/Order Number
ICS840051AGI
Marking
051AI
051AI
TBD
Package
Shipping Packaging
Temperature
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
8 Lead TSSOP
8 Lead TSSOP
tube
ICS840051AGIT
ICS840051AGILF
ICS840051AGILFT
2500 tape & reel
tube
8 Lead "Lead-Free" TSSOP
8 Lead "Lead-Free" TSSOP
TBD
2500 tape & reel
The aforementioned trademarks, HiPerClockS™ and FemtoClocks™ are a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not
recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product
for use in life support devices or critical medical instruments.
840051AGI
www.icst.com/products/hiperclocks.html
REV. A JANUARY 14, 2005
10
相关型号：
ICS84021AYLF
Clock Generator, 260MHz, PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026BBA, LQFP-32
IDT
ICS840245AGILF
Clock Generator, 75MHz, PDSO16, 4.40 X 5 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-16
IDT
©2020 ICPDF网 联系我们和版权申明