IRDC3629A [INFINEON]

USER GUIDE FOR IR3629A EVALUATION BOARD; 用户指南IR3629A评估板
IRDC3629A
型号: IRDC3629A
厂家: Infineon    Infineon
描述:

USER GUIDE FOR IR3629A EVALUATION BOARD
用户指南IR3629A评估板

文件: 总16页 (文件大小:947K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
IRDC3629A  
USER GUIDE FOR IR3629A EVALUATION BOARD  
(Vin=12V, Vo=1.8V, Io=25A)  
DESCRIPTION  
An output over-current protection function is  
implemented by sensing the voltage developed  
across the on-resistance of the synchronous  
rectifier MOSFET for optimum cost and  
performance.  
The IR3629A is a synchronous buck controller,  
providing a compact, high performance and  
flexible solution in a small 3mmx4mm MLPD  
package.  
Key features offered by the IR3629A include  
programmable soft-start ramp, precision 0.6V  
reference voltage, thermal protection, fixed  
This user guide contains the schematic and bill of  
materials for the IR3629A evaluation board. The  
guide describes operation and use of the  
300kHz switching frequency requiring  
no  
evaluation board itself. Detailed  
application  
external component, input under-voltage  
lockout for proper start-up, and pre-bias start-  
up.  
information for the IR3629A integrated circuit is  
available in the IR3629A data sheet.  
BOARD FEATURES  
Vin = +12V (13.2V Max)  
Vout = +1.8V @ 0-25A  
IRF6712 as Controller MOSFET  
IRF6715 as Synchronous MOSFET  
L = 0.6uH  
Cin=2x270uF (OS-CON cap) + 2x10uF (ceramic 1206)  
Cout=2x330uF(SP cap)  
Optional external supply connection for Vc  
Optional Power-good output connection  
1
IRDC3629A  
CONNECTIONS and OPERATING INSTRUCTIONS  
A well regulated +12V input supply should be connected to VIN+ and VIN-. A maximum of 20A load can be  
connected to VOUT+ and VOUT-. The connection diagram is shown in Fig. 1  
IR3629A demo board can also be powered by two separate power supplies, one is the input voltage (Vin)  
between VIN+ and VIN-, the other is bias voltage (Vcc) between Vc-ext and PGND. In this case, a well  
regulated 5V~12V power supply should be connected to Vc-ext and PGND and R14 should be removed.  
Inputs and outputs of the board are listed in Table I.  
Table I. Connections  
Connection  
VIN+  
Signal Name  
Vin (+12V)  
VIN-  
Ground of Vin  
Vc-ext  
Optional Vcc input  
PGND  
VOUT-  
VOUT+  
GND  
Ground for optional Vcc input  
Ground of Vout  
Vout (+1.8V)  
Bias Voltage Ground  
LAYOUT  
The PCB is a 6-layer board. All of layers are 2 Oz. copper. Power supply decoupling capacitors, the charge-  
pump capacitor and feedback components are located close to the IR3629A. The feedback resistors are  
connected to the output voltage at the point of regulation and are located close to the IC.  
The input and output energy storage capacitors and the power inductor are located on bottom side of the  
board, to improve efficiency, the circuit board is designed to minimize the length of the on-board power  
ground current path.  
2
IRDC3629A  
IR3629A Demo Board  
Vin= 12V  
Vo=1.8V  
Fig. 1 Connection diagram of the evaluation board for IR3629A (Top view)  
Fig. 2 Bottom view of the evaluation board for IR3629A  
3
IRDC3629A  
IR3629A PCB Layers  
Top Layer  
Bottom Layer  
4
IRDC3629A  
IR3629A PCB Layers  
AGND  
PGND  
Single point  
connection  
between PGND  
and AGND  
Mid-layer1  
Mid-layer2  
5
IRDC3629A  
IR3629A PCB Layers  
Mid-layer3  
Mid-layer4  
6
IRDC3629A  
IR3629A Demo Board Schematic  
PGND  
Vc-ext  
Vin  
Vin+  
Vin+  
Vin-  
1
1
R14  
68  
+
C6  
10uF  
C1  
C4  
0.1uF  
C3  
10uF  
C2  
10uF  
C5  
10uF  
270uF  
3
D1  
1
1
R15  
N/A  
BAT54S  
PGND  
C22  
Vin-  
C25  
0.1uF  
C12  
0.1uF  
1uF  
U1  
En  
2
11  
10  
6
Vcc  
Vc  
HDrv  
R17  
Q1  
C23  
PGood  
4.99K  
Vout  
Vout+  
Vout+  
SS/SD  
GND  
N3064730  
Vout  
5
5
IRF6712 SQ  
1
1
0.1uF  
C24  
SW  
L1  
12  
3
R7  
10K  
OCSet  
No Stuff  
1
7
N3065200  
Q2  
1
2
PGood  
Vsens  
IR3629A  
N3065372  
5
0.6uH  
IRF6715 MX  
C14  
0.1uF  
C21  
330uF  
C20  
330uF  
C16  
C17  
C18  
C19  
C15  
LDrv  
Vout-  
Vout-  
C10  
C11  
No Stuff No Stuff No Stuff No Stuff No Stuff  
R5  
9
8
4
1
0.1uF  
AGND  
3.09K  
Comp  
Fb  
PGND  
39pF  
13  
C26  
1nF  
Thermal  
R1  
R12  
3.65K  
1
26.7K  
C9  
N/A  
R9  
0
R10  
No Stuff  
C8  
R4  
3.57K  
0.56nF  
R2  
R6  
20  
31.6k  
R3  
15.8K  
R*  
0
A
B
Fig. 3 Schematic of the IR3629A evaluation board with 12Vin and1.8V output voltage  
7
IRDC3629A  
BILL OF MATERIALS  
Item  
Quantity  
Reference  
Value  
Description  
Size  
-
Manufacturer  
Part Number  
16SVPC270M  
OS-CON CAP, 16V,  
20%  
1
2
1
C1  
270uF  
Sanyo  
Murata  
C2,C3,  
C5,C6  
Ceramic, 25V, X7R,  
10%  
4
10uF  
1206  
GRM31CR61C106KA88  
C4,C10,C12  
C14,C23,C2  
5
Ceramic, 25V, X7R,  
10%  
3
4
5
6
6
1
1
2
0.1uF  
560pF  
39pF  
603  
603  
603  
-
TDK  
Murata  
C1608X7R1H104K  
GRM1885C1H561JA01D  
GRM1885C1H390JA01D  
EEFSX0D331XE  
C8  
Ceramic, 50V, C0G, 5%  
Ceramic, 50V, C0G, 5%  
SP-CAP, 2V, 6mOhm  
C11  
Murata  
C20,C21  
330uF  
Panasonic  
Ceramic, 16V, X5R,  
10%  
7
1
C22  
1uF  
603  
TDK  
C1608X5R1C105K  
Ceramic, 50V, X7R,  
10%  
8
1
1
1
C26  
D1  
1000pF  
BAT54S  
0.6uH  
603  
SOT-23  
-
Panasonic  
Vishay  
ECJ1VB1H102K  
BAT54S  
9
Dual Schottky Diode  
1.5mOhm  
10  
L1  
Delta  
MPL104-0R6  
IRF6712  
SQ  
NFET, 25V, 3.8mOhm,  
12nC  
DirectFET  
SQ  
11  
1
Q1  
IR  
IRF6712SPbF  
IRF6715  
MX  
NFET, 25V, 1.3mOhm,  
40nC  
DirectFET  
MX  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
1
1
1
1
1
1
1
1
1
1
1
1
Q2  
R9  
IR  
IRF6715MPbF  
0
Thick film, 1%, 1/10W  
Thick film, 1%, 1/10W  
Thick film, 1%, 1/10W  
Thick film, 1%, 1/10W  
Thick film, 1%, 1/10W  
Thick film, 1%, 1/10W  
Thick film, 1%, 1/10W  
Thick film, 1%, 1/10W  
Thick film, 1%, 1/10W  
Thick film, 1%, 1/10W  
Thick film, 1%, 1/4W  
603  
603  
603  
603  
603  
603  
603  
603  
603  
603  
1206  
any  
any  
any  
any  
any  
any  
any  
any  
any  
any  
any  
any  
any  
any  
any  
any  
any  
any  
any  
any  
any  
any  
R1  
26.7K  
31.6K  
10K  
R2  
R7  
R3  
15.8K  
3.57K  
3.09K  
20  
R4  
R5  
R6  
R12  
R17  
R14  
3.65K  
4.99K  
68  
8
IRDC3629A  
BILL OF MATERIALS (cont.)  
Item  
Quantity  
Reference  
Value  
Description  
Size  
Manufacturer  
Part Number  
MLPD  
3x4  
24  
25  
1
2
U1  
IR3629A  
No Stuff  
PWM Controller  
IR  
IR3629AMPbF  
C9, C24  
603  
C15,C16,C1  
7,C18,C19  
26  
27  
6
2
No Stuff  
No Stuff  
1206  
603  
R10, R15  
Banana Jack,  
Insulated, Solder  
Terminal, Black  
Johnson  
Components  
28  
29  
30  
2
1
1
-
-
-
-
-
-
-
-
-
105-0853-001  
105-0852-001  
105-0854-001  
Banana Jack,  
Insulated, Solder  
Terminal, Red  
Johnson  
Components  
Banana Jack,  
Insulated, Solder  
Terminal, Green  
Johnson  
Components  
9
IRDC3629A  
TRACKING OPERATING PERFORMANCE  
Vin=12.0V, Vo=1.8V, Fs=300kHz, Room Temperature, No Air Flow  
Fig. 5 Prebias Start Up  
Ch1:Vin, Ch2:Vout, Ch3:Vss  
Fig. 4 Start Up at 25A  
Ch1:PGood, Ch2:Vss, Ch3:Vin, Ch4:Vout  
Fig. 7 Gate Signals at 25A Load  
Ch1:SW, Ch2:HDRV, Ch3:LDRV  
Fig. 6 Output Voltage Ripple at 25A Load  
Ch1:Vout, Ch3:SW  
Fig. 8 Transient Response  
Ch1:Vout, Ch4:Io(0-12.5A)  
Fig. 9 Shorted Hiccup Condition Recovery  
Ch2:Vout, Ch3:Vss, Ch4:Io  
10  
IRDC3629A  
TYPICAL OPERATING PERFORMANCE  
Vin=12.0V, Vo=1.8V, Io=0-25A, Fs=300kHz, Air Flow=200LFM  
Fig. 10 Bode Plot of Control Loop  
11  
IRDC3629A  
TYPICAL OPERATING PERFORMANCE  
Vin=12.0V, Vo=1.8V, Fs=300kHz, Room Temp, No Air Flow  
IR3629A Efficiency  
100  
90  
80  
70  
60  
50  
40  
0.0  
2.5  
5.0  
7.5  
10.0  
12.5  
15.0  
17.5  
20.0  
Iout(A)  
Fig. 11 Efficiency vs. Load  
2
1
Fig. 12 Thermal Image of IR3629A Demo Board at Io=20A  
(1: IR3629A, 2: IRF6715, 3: IRF6712)  
12  
IRDC3629A  
PCB Metal and Components Placement  
. The lead land width should be equal to the nominal part lead width. The minimum lead to lead spacing should be  
0.2mm to minimize shorting.  
. The lead land length should be equal to maximum part lead length + 0.3 mm outboard extension + 0.05mm  
inboard extension. The outboard extension ensures a large and inspectable toe fillet, and the inboard extension will  
accommodate any part misalignment and ensure a fillet.  
. The center pad land length and width should be equal to maximum part pad length and width. However, the  
minimum metal to metal spacing should be 0.17mm for 2 oz. Copper (0.1mm for 1 oz. Copper and 0.23mm for  
3 oz. Copper).  
. Two 0.30mm diameter via should be placed in the center of the pad land and connected to ground to minimize the  
noise effect on the IC.  
13  
13  
IRDC3629A  
Solder Resist  
. The solder resist should be pulled away from the metal lead lands by a minimum of 0.06mm. The solder resist mis-  
alignment is a maximum of 0.05mm and it is recommended that the lead lands are all Non Solder Mask Defined  
(NSMD). Therefore pulling the S/R 0.06mm will always ensure NSMD pads.  
. The minimum solder resist width is 0.13mm.  
At the inside corner of the solder resist where the lead land groups meet, it is recommended to provide a fillet so a  
solder resist width of 0.17mm remains.  
. The land pad should be Non Solder Mask Defined (NSMD), with a minimum pullback of the solder resist off the  
copper of 0.06mm to accommodate solder resist mis-alignment.  
.Ensure that the solder resist in-between the lead lands and the pad land is 0.15mm due to the high aspect ratio of  
the solder resist strip separating the lead lands from the pad land.  
.Each via in the land pad should be tented or plugged from bottom boardside with solder resist.  
14  
14  
IRDC3629A  
Stencil Design  
. The stencil apertures for the lead lands should be approximately 80% of the area of the lead lands. Reducing the  
amount of solder deposited will minimize the occurrence of lead shorts. Since for 0.5mm pitch devices the leads are  
only 0.25mm wide, the stencil apertures should not be made narrower; openings in stencils < 0.25mm wide are  
difficult to maintain repeatable solder release.  
. The stencil lead land apertures should therefore be shortened in length by 80% and centered on the lead land.  
. The land pad aperture should deposit approximately 50% area of solder on the center pad. If too much solder is  
deposited on the center pad the part will float and the lead lands will be open.  
. The maximum length and width of the land pad stencil aperture should be equal to the solder resist opening minus  
an annular 0.2mm pull back to decrease the incidence of shorting the center land to the lead lands when the part is  
pushed into the solder paste.  
15  
15  
IRDC3629A  
IR3629A MLPD Package  
3x4-12Lead  
D
E/2  
E
S
Y
VGED-4  
M
B
O
L
MILLIMETERS  
INCHES  
MIN  
0.80  
0.00  
NOM  
0.90  
MAX  
MIN  
NOM  
.035  
MAX  
.039  
A
A1  
A3  
b
1.00 .032  
0.02  
0.05 .000 .0008  
.008 REF  
.0019  
0.20 REF  
0.25  
A
0.18  
3.0  
0.30 .0071 .0096  
.0118  
.145  
A3  
SEATING PLANE  
D2  
D
_
3.70 .118  
_
A1  
4.00 BSC  
3.00 BSC  
_
.157 BSC  
E
.118 BSC  
D2  
E2  
L
1.40  
0.30  
1.80 .055  
0.50 .012  
_
.070  
.019  
0.40  
.016  
e
0.50 PITCH  
12  
.020 PITCH  
N
10  
6
E2  
ND  
6
Terminal 1  
Identifier  
Leads on 2 sides  
b
e
L
(ND-1) x e  
TAPE & REEL ORIENTATION  
Figure A  
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105  
TAC Fax: (310) 252-7903  
This product has been designed and qualified for the Industrial market.  
Visit us at www.irf.com for sales contact information  
Data and specifications subject to change without notice. 02/01  
16  

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