SP000898878 [INFINEON]
HALF BRDG BASED IGBT DRIVER,;
| 型号： | SP000898878 |
| 厂家： | 
Infineon |
| 描述： | HALF BRDG BASED IGBT DRIVER, 驱动 双极性晶体管 接口集成电路 |
| 文件： | 总29页 (文件大小：1696K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EiceDRIVER™
1ED020I12-B2
Single IGBT Driver IC
Final Data Sheet
Rev. 2.0, 2012-07-31
Industrial Power Control
Edition 2012-07-31
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2012 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
EiceDRIVER™
1ED020I12-B2
Revision History
Page or Item
Subjects (major changes since previous revision)
Rev. 2.0, 2012-07-31
Trademarks of Infineon Technologies AG
AURIX™, BlueMoon™, C166™, CanPAK™, CIPOS™, CIPURSE™, COMNEON™, EconoPACK™, CoolMOS™,
CoolSET™, CORECONTROL™, CROSSAVE™, DAVE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™,
EconoPIM™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, I²RF™, ISOFACE™, IsoPACK™,
MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OmniTune™, OptiMOS™, ORIGA™, PRIMARION™,
PrimePACK™, PrimeSTACK™, PRO-SIL™, PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™,
SINDRION™, SIPMOS™, SMARTi™, SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™,
TRENCHSTOP™, TriCore™, X-GOLD™, X-PMU™, XMM™, XPOSYS™.
Other Trademarks
Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™,
PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR
development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™,
FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG.
FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of
Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data
Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of
MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics
Corporation. Mifare™ of NXP. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™
of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc.,
OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc.
RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc.
SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden
Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA.
UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™
of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of
Diodes Zetex Limited.
Last Trademarks Update 2010-10-26
Final Data Sheet
3
Rev. 2.0, 2012-07-31
EiceDRIVER™
1ED020I12-B2
Table of Contents
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1
2
3
3.1
3.2
Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4
4.1
4.2
4.3
4.3.1
4.3.2
4.3.3
4.3.4
4.4
4.5
4.6
4.6.1
4.6.2
4.6.3
4.7
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Internal Protection Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Undervoltage Lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
READY Status Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Active Shut-Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Non-Inverting and Inverting Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Driver Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
External Protection Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Desaturation Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5
5.1
5.2
5.3
Electrical Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Recommended Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Voltage Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Logic Input and Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Dynamic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Desaturation Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Active Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.4
5.4.1
5.4.2
5.4.3
5.4.4
5.4.5
5.4.6
5.4.7
5.4.8
6
Insulation Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Certified according to DIN EN 60747-5-2 (VDE 0884 Teil 2): 2003-01. Basic Insulation . . . . . . . . . . 24
Recognized under UL 1577 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Reliability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.1
6.2
6.3
7
8
Timing Diagramms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
9
9.1
9.2
Application Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Reference Layout for Thermal Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Printed Circuit Board Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Final Data Sheet
4
Rev. 2.0, 2012-07-31
EiceDRIVER™
1ED020I12-B2
List of Figures
Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
Figure 7
Figure 8
Figure 9
Typical Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Block Diagram 1ED020I12-B2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
PG-DSO-16-15 (top view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Application Example Bipolar Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Application Example Unipolar Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Propagation Delay, Rise and Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Typical Switching Behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
DESAT Switch-Off Behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
UVLO Behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 10 PG-DSO-16-15 (Plastic (Green) Dual Small Outline Package) . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 11 Reference Layout for Thermal Data (Copper thickness 102 μm) . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Final Data Sheet
5
Rev. 2.0, 2012-07-31
EiceDRIVER™
1ED020I12-B2
List of Tables
Table 1
Table 2
Table 3
Table 4
Table 5
Table 6
Table 7
Table 8
Table 9
Table 10
Table 11
Table 12
Table 13
Table 14
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Recommended Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Voltage Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Logic Input and Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Dynamic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Desaturation Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Active Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
According to DIN EN 60747-5-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Recognized under UL 1577 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Final Data Sheet
6
Rev. 2.0, 2012-07-31
EiceDRIVER™
Single IGBT Driver IC
1ED020I12-B2
1
Overview
Main Features
•
•
•
•
•
Single channel isolated IGBT Driver
For 600V/1200 V IGBTs
2 A rail-to-rail output
Vcesat-detection
Active Miller Clamp
Product Highlights
•
•
•
•
Coreless transformer isolated driver
Basic insulation according to DIN EN 60747-5-2
Integrated protection features
Suitable for operation at high ambient temperature
Typical Application
•
•
•
•
AC and Brushless DC Motor Drives
High Voltage DC/DC-Converter
UPS-Systems
Welding
Description
The 1ED020I12-B2 is a galvanic isolated single channel IGBT driver in PG-DSO-16-15 package that provides an
output current capability of typically 2A.
All logic pins are 5V CMOS compatible and could be directly connected to a microcontroller.
The data transfer across galvanic isolation is realized by the integrated Coreless Transformer Technology.
The 1ED020I12-B2 provides several protection features like IGBT desaturation protection, active Miller clamping
and active shut down.
Product Name
Gate Drive Current
Package
1ED020I12-B2
±2 A
PG-DSO-16-15
Final Data Sheet
7
Rev. 2.0, 2012-07-31
EiceDRIVER™
1ED020I12-B2
Overview
Input Side
VCC1
Output Side
VCC2_H
DESAT
CLAMP
OUT
EiceDRIVERTM
1ED020I12-B2
IN+, IN-, /RST
/FLT, RDY
GND2
GND1
VCC1
VEE2_H
VCC2_L
CPU
DESAT
CLAMP
OUT
EiceDRIVERTM
1ED020I12-B2
IN+, IN-, /RST
/FLT, RDY
GND2
GND1
VEE2_L
Figure 1
Typical Application
Final Data Sheet
8
Rev. 2.0, 2012-07-31
EiceDRIVER™
1ED020I12-B2
Block Diagram
2
Block Diagram
VCC1
IN+
VCC2
15
10
UVLO
UVLO
5
&
K4
2V
delay
delay
CLAMP
7
&
TX
RX
1
VCC1
VCC2
VEE2
IN-
11
12
&
VCC1
OUT
6
RDY
&
/RDY
VEE2
DECODER RX
TX ENCODER
1
NC
4
VCC2
VCC1
I3
&
&
K3
/FLT
DESAT
13
14
2
≥1
S
9V
FLT Q
1
R
≥1
VCC1
GND2
3
RST
2
/RST
delay
1
VEE2
1ED020I12-B2
1
9
16
1
8
GND1
GND1
Figure 2
Block Diagram 1ED020I12-B2
Final Data Sheet
9
Rev. 2.0, 2012-07-31
EiceDRIVER™
1ED020I12-B2
Pin Configuration and FunctionalityPin Configuration
3
Pin Configuration and Functionality
3.1
Pin Configuration
Table 1
Pin Configuration
Pin No. Name
Function
1
VEE2
DESAT
GND2
NC
Negative power supply output side
Desaturation protection
Signal ground output side
Not connected
2
3
4
5
VCC2
OUT
Positive power supply output side
Driver output
6
7
CLAMP
VEE2
GND1
IN+
Miller clamping
8
Negative power supply output side
Ground input side
9
10
11
12
13
14
15
16
Non inverted driver input
Inverted driver input
IN-
RDY
Ready output
/FLT
Fault output, low active
Reset input, low active
Positive power supply input side
Ground input side
/RST
VCC1
GND1
VEE2
DESAT
GND2
NC
GND1
VCC1
/RST
1
2
3
4
5
6
7
8
16
15
14
/FLT 13
RDY 12
IN- 11
VCC2
OUT
CLAMP
VEE2
IN+ 10
GND1
9
Figure 3
PG-DSO-16-15 (top view)
Final Data Sheet
10
Rev. 2.0, 2012-07-31
EiceDRIVER™
1ED020I12-B2
Pin Configuration and FunctionalityPin Functionality
3.2
Pin Functionality
GND1
Ground connection of the input side.
IN+ Non Inverting Driver Input
IN+ control signal for the driver output if IN- is set to low. (The IGBT is on if IN+ = high and IN- = low)
A minimum pulse width is defined to make the IC robust against glitches at IN+. An internal Pull-Down-Resistor
ensures IGBT Off-State.
IN- Inverting Driver Input
IN- control signal for driver output if IN+ is set to high. (IGBT is on if IN- = low and IN+ = high)
A minimum pulse width is defined to make the IC robust against glitches at IN-. An internal Pull-Up-Resistor
ensures IGBT Off-State.
/RST Reset Input
Function 1: Enable/shutdown of the input chip. (The IGBT is off if /RST = low). A minimum pulse width is defined
to make the IC robust against glitches at /RST.
Function 2: Resets the DESAT-FAULT-state of the chip if /RST is low for a time TRST. An internal Pull-Up-Resistor
is used to ensure /FLT status output.
/FLT Fault Output
Open-drain output to report a desaturation error of the IGBT (/FLT is low if desaturation occurs)
RDY Ready Status
Open-drain output to report the correct operation of the device (RDY = high if both chips are above the UVLO level
and the internal chip transmission is faultless).
VCC1
5 V power supply of the input chip
VEE2
Negative power supply pins of the output chip. If no negative supply voltage is available, all VEE2 pins have to be
connected to GND2.
DESAT Desaturation Detection Input
Monitoring of the IGBT saturation voltage (VCE) to detect desaturation caused by short circuits. If OUT is high, VCE
is above a defined value and a certain blanking time has expired, the desaturation protection is activated and the
IGBT is switched off. The blanking time is adjustable by an external capacitor.
CLAMP Miller Clamping
Ties the gate voltage to ground after the IGBT has been switched off at a defined voltage to avoid a parasitic
switch-on of the IGBT.During turn-off, the gate voltage is monitored and the clamp output is activated when the
gate voltage goes below 2 V (related to VEE2). The clamp is designed for a Miller current up to 2 A.
Final Data Sheet
11
Rev. 2.0, 2012-07-31
EiceDRIVER™
1ED020I12-B2
Pin Configuration and FunctionalityPin Functionality
GND2 Reference Ground
Reference ground of the output chip.
OUT Driver Output
Output pin to drive an IGBT. The voltage is switched between VEE2 and VCC2. In normal operating mode Vout
is controlled by IN+, IN- and /RST. During error mode (UVLO, internal error or DESAT) Vout is set to VEE2
independent of the input control signals.
VCC2
Positive power supply pin of the output side.
Final Data Sheet
12
Rev. 2.0, 2012-07-31
EiceDRIVER™
1ED020I12-B2
Functional DescriptionIntroduction
4
Functional Description
4.1
Introduction
The 1ED020I12-B2 is an advanced IGBT gate driver that can be also used for driving power MOS devices. Control
and protection functions are included to make possible the design of high reliability systems.
The device consists of two galvanic separated parts. The input chip can be directly connected to a standard 5 V
DSP or microcontroller with CMOS in/output and the output chip is connected to the high voltage side.
The rail-to-rail driver output enables the user to provide easy clamping of the IGBTs gate voltage during short
circuit of the IGBT. So an increase of short circuit current due to the feedback via the Miller capacitance can be
avoided. Further, a rail-to-rail output reduces power dissipation.
The device also includes IGBT desaturation protection with /FLT status output.
The READY status output reports if the device is supplied and operates correctly.
+5V
+15V
VCC1
GND1
VCC2
100n
1µ
1k
DESAT
CLAMP
OUT
SGND
IN+
10R
IN+
NC
GND2
VEE2
IN-
220p
RDY
FLT
RST
RDY
/FLT
/RST
1µ
-8V
Figure 4
Application Example Bipolar Supply
4.2
Supply
The driver 1ED020I12-B2 is designed to support two different supply configurations, bipolar supply and unipolar
supply.
In bipolar supply the driver is typically supplied with a positive voltage of 15V at VCC2 and a negative voltage of
-8V at VEE2, please refer to Figure 4. Negative supply prevents a dynamic turn on due to the additional charge
which is generated from IGBT input capacitance times negative supply voltage. If an appropriate negative supply
voltage is used, connecting CLAMP to IGBT gate is redundant and therefore typically not necessary.
For unipolar supply configuration the driver is typically supplied with a positive voltage of 15V at VCC2. Erratically
dynamic turn on of the IGBT could be prevented with active Miller clamp function, so CLAMP output is directly
connected to IGBT gate, please refer to Figure 5.
Final Data Sheet
13
Rev. 2.0, 2012-07-31
EiceDRIVER™
1ED020I12-B2
Functional DescriptionInternal Protection Features
+5V
+15V
VCC1
GND1
VCC2
1µ
100n
1k
DESAT
CLAMP
OUT
SGND
IN+
10R
IN+
NC
GND2
VEE2
IN-
220p
RDY
FLT
RST
RDY
/FLT
/RST
Figure 5
Application Example Unipolar Supply
4.3
Internal Protection Features
4.3.1
Undervoltage Lockout (UVLO)
To ensure correct switching of IGBTs the device is equipped with an undervoltage lockout for both chips, refer to
Figure 9.
If the power supply voltage VVCC1 of the input chip drops below VUVLOL1 a turn-off signal is sent to the output chip
before power-down. The IGBT is switched off and the signals at IN+ and IN- are ignored as long as VVCC1 reaches
the power-up voltage VUVLOH1
.
If the power supply voltage VVCC2 of the output chip goes down below VUVLOL2 the IGBT is switched off and signals
from the input chip are ignored as long as VVCC2 reaches the power-up voltage VUVLOH2. VEE2 is not monitored,
otherwise negative supply voltage range from 0 V to -12 V would not be possible.
4.3.2
READY Status Output
The READY output shows the status of three internal protection features.
•
•
•
UVLO of the input chip
UVLO of the output chip after a short delay
Internal signal transmission after a short delay
It is not necessary to reset the READY signal since its state only depends on the status of the former mentioned
protection signals.
4.3.3
Watchdog Timer
During normal operation the internal signal transmission is monitored by a watchdog timer. If the transmission fails
for a given time, the IGBT is switched off and the READY output reports an internal error.
4.3.4
Active Shut-Down
The Active Shut-Down feature ensures a safe IGBT off-state if the output chip is not connected to the power
supply, IGBT gate is clamped at OUT to VEE2.
Final Data Sheet
14
Rev. 2.0, 2012-07-31
EiceDRIVER™
1ED020I12-B2
Functional DescriptionNon-Inverting and Inverting Inputs
4.4
Non-Inverting and Inverting Inputs
There are two possible input modes to control the IGBT. At non-inverting mode IN+ controls the driver output while
IN- is set to low. At inverting mode IN- controls the driver output while IN+ is set to high, please see Figure 7. A
minimum input pulse width is defined to filter occasional glitches.
4.5
Driver Output
The output driver sections uses only MOSFETs to provide a rail-to-rail output. This feature permits that tight control
of gate voltage during on-state and short circuit can be maintained as long as the drivers supply is stable. Due to
the low internal voltage drop, switching behaviour of the IGBT is predominantly governed by the gate resistor.
Furthermore, it reduces the power to be dissipated by the driver.
4.6
External Protection Features
4.6.1
Desaturation Protection
A desaturation protection ensures the protection of the IGBT at short circuit. When the DESAT voltage goes up
and reaches 9 V, the output is driven low. Further, the /FLT output is activated, please refer to Figure 8. A
programmable blanking time is used to allow enough time for IGBT saturation. Blanking time is provided by a
highly precise internal current source and an external capacitor.
4.6.2
Active Miller Clamp
In a half bridge configuration the switched off IGBT tends to dynamically turn on during turn on phase of the
opposite IGBT. A Miller clamp allows sinking the Miller current across a low impedance path in this high dV/dt
situation. Therefore in many applications, the use of a negative supply voltage can be avoided.
During turn-off, the gate voltage is monitored and the clamp output is activated when the gate voltage goes below
typical 2 V (related to VEE2). The clamp is designed for a Miller current up to 2 A.
4.6.3
Short Circuit Clamping
During short circuit the IGBTs gate voltage tends to rise because of the feedback via the Miller capacitance. An
additional protection circuit connected to OUT and CLAMP limits this voltage to a value slightly higher than the
supply voltage. A current of maximum 500 mA for 10 μs may be fed back to the supply through one of this paths.
If higher currents are expected or a tighter clamping is desired external Schottky diodes may be added.
4.7
RESET
The reset inputs have two functions.
Firstly, /RST is in charge of setting back the /FLT output. If /RST is low longer than a given time, /FLT will be
cleared at the rising edge of /RST, refer to Figure 8; otherwise, it will remain unchanged. Moreover, it works as
enable/shutdown of the input logic, refer to Figure 7.
Final Data Sheet
15
Rev. 2.0, 2012-07-31
EiceDRIVER™
1ED020I12-B2
Electrical ParametersAbsolute Maximum Ratings
5
Electrical Parameters
5.1
Absolute Maximum Ratings
Note:Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction of
the integrated circuit. Unless otherwise noted all parameters refer to GND1.
Table 2
Absolute Maximum Ratings
Parameter
Symbol
Values
Max.
Unit
Note /
Test Condition
Min.
-0.3
-12
–
1)
Positive power supply output side
VVCC2
VVEE2
Vmax2
20
0.3
28
V
V
V
1)
Negative power supply output side
Maximum power supply voltage output side
–
(VVCC2 - VVEE2
)
Gate driver output
VOUT
IOUT
IOUT
V
–
–
VEE2-0.3 Vmax2+0.3 V
–
Gate driver high output maximum current
2.4
2.4
A
A
t = 2 µs
t = 2 µs
Gate & Clamp driver low output maximum
current
Maximum short circuit clamping time
tCLP
–
10
μs
ICLAMP/OUT =
500 mA
Positive power supply input side
VVCC1
-0.3
-0.3
6.5
6.5
V
V
–
–
Logic input voltages
(IN+,IN-,RST)
VLogicIN
Opendrain Logic output voltage (FLT)
Opendrain Logic output voltage (RDY)
Opendrain Logic output current (FLT)
Opendrain Logic output current (RDY)
Pin DESAT voltage
VFLT#
VRDY
IFLT#
-0.3
-0.3
–
6.5
6.5
10
V
–
–
–
V
mA
mA
V
IRDY
–
10
–
1)
VDESAT
-0.3
VVCC2
+0.3
3)
Pin CLAMP voltage
VCLAMP
-0.3
VVCC2
V
+0.32)
Input to output isolation voltage (GND2)
Junction temperature
VISO
-1200
1200
150
150
100
700
160
125
1
V
TJ
-40
-55
–
°C
–
–
Storage temperature
TS
°C
Power dissipation, per input part
Power dissipation, per output part
Thermal resistance (Input part)
Thermal resistance (Output chip active)
ESD Capability
PD, IN
PD, OUT
RTHJA,IN
RTHJA,OUT
VESD
mW
mW
K/W
K/W
kV
4)@TA = 25°C
4) @TA = 25°C
4) @TA = 25°C
4) @TA = 25°C
–
–
–
–
Human Body
Model5)
1) With respect to GND2.
Final Data Sheet
16
Rev. 2.0, 2012-07-31
EiceDRIVER™
1ED020I12-B2
Electrical ParametersOperating Parameters
2) May be exceeded during short circuit clamping.
3) With respect to VEE2.
4)Output IC power dissipation is derated linearly at 10 mW/°C above 62°C. Input IC power dissipation does not require derating.
See Figure 11 for reference layouts for these thermal data. Thermal performance may change significantly with layout and heat
dissipation of components in close proximity.
5) According to EIA/JESD22-A114-B (discharging a 100 pF capacitor through a 1.5 kΩ series resistor).
5.2
Operating Parameters
Note:Within the operating range the IC operates as described in the functional description. Unless otherwise
noted all parameters refer to GND1.
Table 3
Operating Parameters
Parameter
Symbol
Values
Max.
Unit
Note /
Test Condition
Min.
13
1)
Positive power supply output side
Negative power supply output side
VVCC2
VVEE2
Vmax2
20
0
V
V
V
1)
-12
–
Maximum power supply voltage
output side
28
–
(VVCC2 - VVEE2
)
Positive power supply input side
VVCC1
4.5
5.5
5.5
V
V
–
–
Logic input voltages
(IN+,IN-,RST)
VLogicIN
-0.3
2)
Pin CLAMP voltage
Pin DESAT voltage
Pin TLSET voltage
Ambient temperature
VCLAMP
VDESAT
VTLSET
TA
V
VEE2-0.3
VVCC2
VVCC2
VVCC2
105
V
–
1)
-0.3
-0.3
-40
–
V
1)
V
°C
kV/μs
–
Common mode transient immunity3) |DVISO/dt|
50
@ 500 V
1) With respect to GND2.
2) May be exceeded during short circuit clamping.
3) The parameter is not subject to production test - verified by design/characterization
5.3
Recommended Operating Parameters
Note:Unless otherwise noted all parameters refer to GND1.
Table 4
Recommended Operating Parameters
Symbol
Parameter
Value
15
Unit
V
Note / Test Condition
1)
Positive power supply output side
Negative power supply output side
VVCC2
VVEE2
VVCC1
1)
-8
V
Positive power supply input side
1) With respect to GND2.
5
V
–
Final Data Sheet
17
Rev. 2.0, 2012-07-31
EiceDRIVER™
1ED020I12-B2
Electrical ParametersElectrical Characteristics
5.4
Electrical Characteristics
Note:The electrical characteristics include the spread of values in supply voltages, load and junction temperatures
given below. Typical values represent the median values at TA = 25°C. Unless otherwise noted all voltages
are given with respect to their respective GND (GND1 for pins 9 to 16, GND2 for pins 1 to 8).
5.4.1
Voltage Supply
Table 5
Voltage Supply
Symbol
Parameter
Values
Typ.
Unit
Note /
Test Condition
Min.
–
Max.
4.3
–
UVLO Threshold Input
Chip
VUVLOH1
VUVLOH1
4.1
3.8
–
V
V
V
–
–
–
3.5
0.15
UVLO Hysteresis Input VHYS1
Chip (VUVLOH1 - VUVLOL1
–
)
UVLO Threshold Output VUVLOH2
–
12.0
11.0
0.9
12.6
–
V
V
V
–
–
–
Chip
VUVLOL2
10.4
0.7
UVLO Hysteresis Output VHYS2
–
Chip (VUVLOH1 - VUVLOL1
)
Quiescent Current Input IQ1
–
7
9
mA
VVCC1 = 5 V
Chip
IN+ = High,
IN- = Low
=>OUT = High,
RDY = High,
/FLT = High
Quiescent Current
Output Chip
IQ2
–
4
6
mA
V
V
VCC2 = 15 V
VEE2 = -8 V
IN+ = High,
IN- = Low
=>OUT = High,
RDY = High,
/FLT = High
Final Data Sheet
18
Rev. 2.0, 2012-07-31
EiceDRIVER™
1ED020I12-B2
Electrical ParametersElectrical Characteristics
5.4.2
Logic Input and Output
Table 6
Logic Input and Output
Symbol
Parameter
Values
Typ.
–
Unit
Note /
Test Condition
Min.
Max.
IN+,IN-, RST Low Input Voltage VIN+L
VIN-L
VRSTL#
IN+,IN-, RST High Input Voltage VIN+H
VIN-H
,
,
–
1.5
V
–
,
,
3.5
–
–
–
V
–
VRSTH#
IN-, RST Input Current
IIN-, IRST#
-400
–
-100
μA
V
V
IN- = GND1
RST# = GND1
IN+ Input Current
IIN+
,
100
400
–
μA
μA
V
IN+ = VCC1
RDY,FLT Pull Up Current
I
PRDY, IPFLT# -400
-100
V
V
RDY = GND1
FLT# = GND1
Input Pulse Suppression IN+,
IN-
TMININ+
TMININ-
,
30
40
40
–
–
–
–
ns
ns
ns
–
–
–
Input Pulse Suppression RST
for ENABLE/SHUTDOWN
TMINRST
30
Pulse Width RST
for Reseting FLT
TRST
800
FLT Low Voltage
RDY Low Voltage
VFLTL
–
–
–
–
300
300
mV
mV
I
I
SINK(FLT#) = 5 mA
SINK(RDY) = 5 mA
VRDYL
Final Data Sheet
19
Rev. 2.0, 2012-07-31
EiceDRIVER™
1ED020I12-B2
Electrical ParametersElectrical Characteristics
5.4.3
Gate Driver
Table 7
Gate Driver
Parameter
Symbol
Values
Typ.
Unit
Note /
Test Condition
Min.
Max.
High Level Output
Voltage
VOUTH1
VOUTH2
VOUTH3
VOUTH4
V
V
V
CC2 -1.2
V
V
V
V
CC2 -0.8
CC2 -2.0
CC2 -5
–
–
–
–
–
V
V
V
V
A
I
I
I
I
OUTH = -20 mA
OUTH = -200 mA
OUTH = -1 A
CC2 -2.5
CC2 -9
CC2 -10
OUTH = -2 A
High Level Output Peak IOUTH
Current
-1.5
-2.0
IN+ = High,
IN- = Low;
OUT = High
Low Level Output
Voltage
VOUTL1
VOUTL2
VOUTL3
VOUTL4
–
V
V
V
V
VEE2 +0.04 VVEE2+0.09
V
V
V
V
A
I
I
I
I
OUTL = 20 mA
OUTL = 200 mA
OUTL = 1 A
–
VEE2 +0.3
VEE2 +2.1
VEE2 +7
V
V
–
VEE2+0.85
VEE2+5
–
–
OUTL = 2 A
Low Level Output Peak IOUTL
Current
1.5
2.0
–
IN+ = Low,
IN- = Low;
OUT = Low,
V
V
VCC2 = 15 V,
VEE2 = -8 V
5.4.4
Active Miller Clamp
Table 8
Active Miller Clamp
Symbol
Parameter
Values
Typ.
Unit
Note / Test Condition
Min.
Max.
Low Level Clamp
Voltage
VCLAMPL1
VCLAMPL2
VCLAMPL3
ICLAMPL
–
–
–
2
V
V
V
–
VEE2+0.03
V
V
V
–
VEE2 +0.08 V
I
I
I
OUTL = 20 mA
OUTL = 200 mA
OUTL = 1 A
VEE2+0.3
VEE2+1.9
VEE2 +0.8
VEE2 +4.8
V
V
A
1)
Low Level Clamp
Current
Clamp Threshold
Voltage
VCLAMP
1.6
2.1
2.4
V
Related to VEE2
1) The parameter is not subject to production test - verified by design/characterization
Final Data Sheet
20
Rev. 2.0, 2012-07-31
EiceDRIVER™
1ED020I12-B2
Electrical ParametersElectrical Characteristics
5.4.5
Short Circuit Clamping
Table 9
Short Circuit Clamping
Symbol
Parameter
Values
Typ.
Unit
Note /
Test Condition
Min.
Max.
Clamping voltage (OUT) VCLPout
(VOUT - VVCC2
–
0.8
1.3
0.7
1.3
V
IN+ = High,
IN- = Low,
OUT = High
)
I
OUT = 500 mA
pulse test,
CLPmax = 10 μs)
t
Clamping voltage
VCLPclamp
–
–
–
V
V
IN+ = High, IN- =
Low,
OUT = High
(CLAMP) (VVCLAMP-VVCC2
)
I
CLAMP = 500 mA
(pulse test,
CLPmax = 10 μs)
t
Clamping voltage
(CLAMP)
VCLPclamp
1.1
IN+ = High, IN- =
Low,
OUT = High
I
CLAMP = 20 mA
5.4.6
Dynamic Characteristics
Dynamic characteristics are measured with VVCC1 = 5 V, VVCC2 = 15 V and VVEE2 = -8 V.
Table 10
Dynamic Characteristics
Symbol
Parameter
Values
Typ.
Unit
Note /
Test Condition
Min.
Max.
Input IN+, IN- to output
propa-gation delay ON
TPDON
145
170
165
-5
195
ns
ns
ns
CLOAD = 100 pF
V
V
IN+ = 50%,
OUT=50% @ 25°C
Input IN+, IN- to output
propa-gation delay OFF
TPDOFF
TPDISTO
145
-35
190
25
Input IN+, IN- to output
propa-gation delay
distortion (TPDOFF - TPDON
)
1)
IN+, IN- input to output
propagation delay ON
variation due to temp
TPDONt
–
–
–
–
–
–
25
40
20
ns
ns
ns
C
= 100 pF
LOAD
V
V
IN+ = 50%,
OUT=50%
IN+, IN- input to output
propagation delay OFF
variation due to temp
TPDOFFt
1)CLOAD = 100 pF
V
V
1)CLOAD = 100 pF
V
V
IN+ = 50%,
OUT=50%
IN+, IN- input to output
propagation delay
distortion variation due to
TPDISTOt
IN+ = 50%,
OUT=50%
temp (TPDOFF-TPDON
)
Final Data Sheet
21
Rev. 2.0, 2012-07-31
EiceDRIVER™
1ED020I12-B2
Electrical ParametersElectrical Characteristics
Table 10
Dynamic Characteristics (cont’d)
Parameter
Symbol
Min.
Values
Typ.
Unit
Note /
Test Condition
Max.
Rise Time
Fall Time
TRISE
10
30
60
ns
ns
ns
ns
C
LOAD = 1 nF
VL 10%, VH 90%
LOAD = 34 nF
VL 10%, VH 90%
LOAD = 1 nF
VL 10%, VH 90%
LOAD = 34 nF
200
10
400
50
800
90
C
TFALL
C
200
350
600
C
VL 10%, VH 90%
1) The parameter is not subject to production test - verified by design/characterization
5.4.7
Desaturation Protection
Table 11
Desaturation Protection
Parameter
Symbol
Min.
Values
Typ.
Unit
Note /
Test Condition
Max.
Blanking Capacitor
Charge Current
IDESATC
450
500
550
μA
V
V
V
VCC2 =15 V,
VEE2=- 8 V
DESAT = 2 V
Blanking Capacitor
Discharge Current
IDESATD
9
14
–
mA
V
V
V
VCC2 =15 V,
VEE2 = -8 V
DESAT = 6 V
Desaturation Reference VDESAT
Level
8.3
–
9
9.5
–
V
V
VCC2 = 15 V
Desaturation Filter Time TDESATfilter
250
ns
V
V
V
VCC2 = 15 V,
VEE2 = -8 V
DESAT = 9 V
Desaturation Sense to TDESATOUT
OUT Low Delay
–
350
–
430
2.25
0.95
–
ns
μs
V
V
OUT = 90%
C
LOAD = 1 nF
FLT# = 10%;
IFLT # = 5 mA
Desaturation Sense to TDESATFLT
FLT Low Delay
–
V
Desaturation Low
Voltage
VDESATL
0.4
–
0.6
400
IN+ = Low, IN- = Low,
OUT = Low
Leading edge blanking TDESATleb
ns
Not subject of
production test
Final Data Sheet
22
Rev. 2.0, 2012-07-31
EiceDRIVER™
1ED020I12-B2
Electrical ParametersElectrical Characteristics
5.4.8
Active Shut Down
Table 12
Active Shut Down
Symbol
Parameter
Values
Typ.
Unit
Note /
Test Condition
Min.
Max.
1)
Active Shut Down Voltage VACTSD
–
–
2.0
V
I
V
OUT = -200 mA,
CC2 open
1) With reference to VEE2
Final Data Sheet
23
Rev. 2.0, 2012-07-31
EiceDRIVER™
1ED020I12-B2
Insulation CharacteristicsCertified according to DIN EN 60747-5-2 (VDE 0884
6
Insulation Characteristics
Insulation characteristics are guaranteed only within the safety maximum ratings which must be ensured by
protective circuits in application. Surface mount classification is class A in accordance with CECCOO802.
This coupler is suitable for “basic insulation” only within the safety ratings. Compliance with the safety ratings shall
be ensured by means of suitable protective circuits.
6.1
Certified according to DIN EN 60747-5-2 (VDE 0884 Teil 2): 2003-01. Basic
Insulation
Table 13
According to DIN EN 60747-5-2
Description
Symbol
Characteristic
Unit
Installation classification per EN 60664-1, Table 1
for rated mains voltage ≤ 150 VRMS
for rated mains voltage ≤ 300 VRMS
–
I-IV
I-III
I-II
for rated mains voltage ≤ 600 VRMS
Climatic Classification
40/105/21
2
–
Pollution Degree (EN 60664-1)
Minimum External Clearance
–
CLR
CPG
CTI
8.12
mm
mm
–
Minimum External Creepage
8.24
Minimum Comparative Tracking Index
Maximum Repetitive Insulation Voltage
Input to output test voltage, method b1)
175
VIORM
VPR
1420
2663
VPEAK
VPEAK
VIORM * 1.875 = VPR, 100% production test with tm = 1 sec,
partial discharge < 5 pC
Input to output test voltage, method a1)
VPR
2272
VPEAK
VIORM * 1.6 = VPR, 100% production test with tm = 60 sec,
partial discharge < 5 pC
Highest Allowable Overvoltage
Maximum Surge Insulation Voltage
Insulation Resistance at TS, VIO = 500 V
VIOTM
VIOSM
RIO
6000
6000
> 109
VPEAK
V
Ω
1) Refer to VDE 0884 for a detailed description of Method a and Method b partial discharge test profiles.
6.2
Recognized under UL 1577
Table 14
Recognized under UL 1577
Description
Symbol
VISO
Characteristic
3750
Unit
Vrms
Vrms
Insulation Withstand Voltage / 1 min
Insulation Test Voltage / 1 s
VISO
4500
6.3
Reliability
For Qualification Report please contact your local Infineon Technologies office.
Final Data Sheet
24
Rev. 2.0, 2012-07-31
EiceDRIVER™
1ED020I12-B2
Timing DiagrammsReliability
7
Timing Diagramms
50%
IN+
90%
10%
50%
OUT
TRISE
TFALL
TPDON
TPDOFF
Figure 6
Propagation Delay, Rise and Fall Time
IN+
IN-
/RST
OUT
Figure 7
Typical Switching Behavior
Final Data Sheet
25
Rev. 2.0, 2012-07-31
EiceDRIVER™
1ED020I12-B2
Timing DiagrammsReliability
IN+
TPDON
TPDON
TPDOFF
OUT
TDESATfilter
TDESATOUT
VDESAT typ. 9V
TDESATleb
TDESATleb
DESAT
blanking time
TDESATFLT
/FLT
/RST
>TRSTmin
Figure 8
DESAT Switch-Off Behavior
ESD diode conduction
IN+
VUVLOH1
VUVLOL1
VCC1
VUVLOH2
VUVLOL2
VCC2
OUT
RDY
/FLT
/RST
Figure 9
UVLO Behavior
Final Data Sheet
26
Rev. 2.0, 2012-07-31
EiceDRIVER™
1ED020I12-B2
Package OutlinesReliability
8
Package Outlines
DOCUMENT NO.
Z8B00166131
0
SCALE
1.0
0
1.0
MILLIMETERS
INCHES
DIM
MIN
-
MAX
2.64
0.29
0.48
0.32
10.47
10.41
7.59
MIN
-
MAX
0.104
0.011
0.019
0.013
0.412
0.410
0.299
2mm
A
A1
b
c
D
E
E1
e
N
L
h
ꢀ
0.12
0.35
0.23
10.21
10.16
7.42
1.27 BSC
16
0.005
0.014
0.009
0.402
0.400
0.292
EUROPEAN PROJECTION
0.050 BSC
16
ISSUE DATE
31.07.2012
0.61
0.25
0°
1.02
0.41
8°
0.024
0.010
0°
0.040
0.016
8°
REVISION
02
Figure 10 PG-DSO-16-15 (Plastic (Green) Dual Small Outline Package)
Final Data Sheet 27
Rev. 2.0, 2012-07-31
EiceDRIVER™
1ED020I12-B2
Application NotesReference Layout for Thermal Data
9
Application Notes
9.1
Reference Layout for Thermal Data
The PCB layout shown in Figure 11 represents the reference layout used for the thermal characterisation. Pins 9
and 16 (GND1) and pins 1 and 8 (VEE2) require ground plane connections for achiving maximum power
dissipation. The 1ED020I12-B2 is conceived to dissipate most of the heat generated through this pins.
Top Layer
Bottom Layer
Figure 11 Reference Layout for Thermal Data (Copper thickness 102 μm)
9.2
Printed Circuit Board Guidelines
Following factors should be taken into account for an optimum PCB layout.
•
•
Sufficient spacing should be kept between high voltage isolated side and low voltage side circuits.
The same minimum distance between two adjacent high-side isolated parts of the PCB should be maintained
to increase the effective isolation and reduce parasitic coupling.
•
•
In order to ensure low supply ripple and clean switching signals, bypass capacitor trace lengths should be kept
as short as possible.
Lowest trace length for VEE2 to GND2 decoupling could be achieved with capacitor closed to pins 1 and 3.
Final Data Sheet
28
Rev. 2.0, 2012-07-31
w w w . i n f i n e o n . c o m
Published by Infineon Technologies AG
相关型号：
SP000923330
Hall Effect Sensor, 15.9mT Min, 36mT Max, 0-25mA, Rectangular, Surface Mount, SOT-23, SMD-3
INFINEON
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