PSMN7R0-100ES,127_技术文档

PSMN7R0-100ES

N-channel 100V 6.8 mΩ standard level MOSFET in I2PAK.

Rev. 03 — 23 February 2010

Product data sheet

1. Product profile

1.1 General description

Standard level N-channel MOSFET in I2PAK package qualified to 175C. This product is

designed and qualified for use in a wide range of industrial, communications and domestic

equipment.

1.2 Features and benefits

High efficiency due to low switching

Suitable for standard level gate drive

and conduction losses

1.3 Applications

DC-to-DC converters

Load switching

Motor control

Server power supplies

1.4 Quick reference data

Table 1.

Quick reference

Symbol Parameter

Conditions

drain-source voltage T_j≥ 25 °C; T_j≤ 175 °C

Min

Typ

Max Unit

V_DS

I_D

-

100

V

A

[1]

drain current

T_mb= 25 °C; V_GS= 10 V;

see Figure 1

P_tot

total power

dissipation

T_mb= 25 °C; see Figure 2

-

269

175

W

T_j

junction temperature

-55

°C

Avalanche ruggedness

E_DS(AL)Snon-repetitive

drain-source

V_GS= 10 V; T_j(init)= 25 °C;

I_D= 100 A; V_sup≤ 100 V;

unclamped; R_GS= 50 Ω

-

315

mJ

avalanche energy

Dynamic characteristics

Q_GD

gate-drain charge

V_GS= 10 V; I_D= 25 A;

V_DS= 50 V; see Figure 15

and 14

-

36

-

nC

Q_G(tot)

total gate charge

V_GS= 10 V; I_D= 25 A;

V_DS= 50 V; see Figure 14

and 15

125

PSMN7R0-100ES

NXP Semiconductors

N-channel 100V 6.8 mΩ standard level MOSFET in I2PAK.

Table 1.

Quick reference

Symbol Parameter

Static characteristics

Conditions

Min

Typ

Max Unit

R_DSon

drain-source

on-state resistance

V_GS= 10 V; I_D= 15 A;

T_j= 100 °C; see Figure 12

-

12

mΩ

V_GS= 10 V; I_D= 15 A;

5.4

6.8

T_j= 25 °C; see Figure 13

[1] Continuous current is limited by package

2. Pinning information

Table 2.

Pinning information

Symbol Description

1

Simplified outline

Graphic symbol

G

D

S

D

gate

mb

D

2

drain

source

3

G

mb

mounting base; connected to

drain

mbb076

S

1

2 3

SOT226 (I2PAK)

3. Ordering information

Table 3.

Ordering information

Type number

Package

Name

Description

Version

PSMN7R0-100ES I2PAK

plastic single-ended package (I2PAK); TO-262

SOT226

PSMN7R0-100ES_3

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Product data sheet

Rev. 03 — 23 February 2010

2 of 15

PSMN7R0-100ES

NXP Semiconductors

N-channel 100V 6.8 mΩ standard level MOSFET in I2PAK.

4. Limiting values

Table 4.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

V_DS

Parameter

Conditions

Min

Max

100

20

Unit

V

drain-source voltage

drain-gate voltage

gate-source voltage

drain current

T_j≥ 25 °C; T_j≤ 175 °C

T_j≤ 175 °C; T_j≥ 25 °C; R_GS= 20 kΩ

-

V_DGR

V_GS

-

V

-20

V

I_D

V_GS= 10 V; T_mb= 100 °C; see Figure 1

V_GS= 10 V; T_mb= 25 °C; see Figure 1

t_p≤ 10 µs; pulsed; T_mb= 25 °C; see Figure 3

T_mb= 25 °C; see Figure 2

-

85

A

[1]

-

100

475

269

175

260

A

I_DM

peak drain current

-

A

P_tot

T_stg

T_j

total power dissipation

storage temperature

junction temperature

peak soldering temperature

-

W

°C

-55

-

T_sld(M)

Source-drain diode

[1]

I_S

source current

peak source current

T_mb= 25 °C;

-

100

475

A

I_SM

t_p≤ 10 µs; pulsed; T_mb= 25 °C

Avalanche ruggedness

E_DS(AL)Snon-repetitive drain-source V_GS= 10 V; T_j(init)= 25 °C; I_D= 100 A;

-

315

mJ

avalanche energy

V_sup≤ 100 V; unclamped; R_GS= 50 Ω

[1] Continuous current is limited by package

03aa16

003aad558

120

150

I_D

(A)

P

(%)

der

80

100

(1)

40

50

0

50

100

150

200

0

50

100

150

T_mb( C)

200

°

T

mb

(°C)

Fig 1. Continuous drain current as a function of

mounting base temperature

Fig 2. Normalized total power dissipation as a

function of mounting base temperature

PSMN7R0-100ES_3

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Product data sheet

Rev. 03 — 23 February 2010

3 of 15

PSMN7R0-100ES

NXP Semiconductors

N-channel 100V 6.8 mΩ standard level MOSFET in I2PAK.

003aad559

10³

I

D

Limit R

= V / I

DS D

DSon

(A)

t

= 10 s

μ

p

10²

100

s

μ

10

1

DC

1 ms

10 ms

100 ms

10^-1

1

10

10²

10³

V

(V)

DS

Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage

PSMN7R0-100ES_3

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Product data sheet

Rev. 03 — 23 February 2010

4 of 15

PSMN7R0-100ES

NXP Semiconductors

N-channel 100V 6.8 mΩ standard level MOSFET in I2PAK.

5. Thermal characteristics

Table 5.

Symbol

R_th(j-mb)

Thermal characteristics

Parameter

Conditions

Min

Typ

Max

Unit

thermal resistance from junction to

mounting base

see Figure 4

-

0.3

0.56

K/W

R_th(j-a)

thermal resistance from junction to

ambient

vertical in free air

-

60

-

K/W

003aad560

1

Z_{th (j-mb)}

(K/W)

= 0.5

δ

10^-1

10^-2

10^-3

10^-4

0.2

0.1

0.05

0.02

t_p

δ =

P

T

single shot

t

t_p

T

1e-6

10^-5

10^-4

10^-3

10^-2

10^-1

1

10

t_p(s)

Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration

PSMN7R0-100ES_3

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Product data sheet

Rev. 03 — 23 February 2010

5 of 15

PSMN7R0-100ES

NXP Semiconductors

N-channel 100V 6.8 mΩ standard level MOSFET in I2PAK.

6. Characteristics

Table 6.

Symbol

Characteristics

Parameter

Conditions

Min

Typ

Max

Unit

Static characteristics

V_(BR)DSS

drain-source

breakdown voltage

I_D= 0.25 mA; V_GS= 0 V; T_j= -55 °C

I_D= 0.25 mA; V_GS= 0 V; T_j= 25 °C

90

100

1

-

V

-

V_GS(th)

gate-source threshold I_D= 1 mA; V_DS= V_GS; T_j= 175 °C; see Figure 10

voltage

-

I_D= 1 mA; V_DS= V_GS; T_j= 25 °C; see Figure 11

2

3

4

and 10

I_D= 1 mA; V_DS= V_GS; T_j= -55 °C; see Figure 10

-

4.8

150

4

V

I_DSS

drain leakage current

gate leakage current

V_DS= 100 V; V_GS= 0 V; T_j= 125 °C

-

µA

nA

mΩ

Ω

V_DS= 100 V; V_GS= 0 V; T_j= 25 °C

0.08

10

-

I_GSS

V_GS= 20 V; V_DS= 0 V; T_j= 25 °C

100

12

19

6.8

-

V_GS= -20 V; V_DS= 0 V; T_j= 25 °C

R_DSon

drain-source on-state

resistance

V_GS= 10 V; I_D= 15 A; T_j= 100 °C; see Figure 12

V_GS= 10 V; I_D= 15 A; T_j= 175 °C; see Figure 12

V_GS= 10 V; I_D= 15 A; T_j= 25 °C; see Figure 13

15

5.4

0.74

R_G

internal gate resistance f = 1 MHz

(AC)

Dynamic characteristics

Q_G(tot)

total gate charge

I_D= 25 A; V_DS= 50 V; V_GS= 10 V; see Figure 14

and 15

-

125

-

nC

I_D= 0 A; V_DS= 0 V; V_GS= 10 V

-

100

28

-

nC

Q_GS

gate-source charge

I_D= 25 A; V_DS= 50 V; V_GS= 10 V; see Figure 15

and 14

Q_GS(th)

Q_GS(th-pl)

Q_GD

pre-threshold

gate-source charge

I_D= 25 A; V_DS= 50 V; V_GS= 10 V; see Figure 15

-

19.4

9

-

nC

V

post-threshold

gate-source charge

gate-drain charge

I_D= 25 A; V_DS= 50 V; V_GS= 10 V; see Figure 15

and 14

36

V_GS(pl)

gate-source plateau

voltage

V_DS= 50 V; see Figure 15 and 14

4.3

C_iss

C_oss

C_rss

input capacitance

output capacitance

V_DS= 50 V; V_GS= 0 V; f = 1 MHz; T_j= 25 °C;

see Figure 16

-

6686

438

-

pF

reverse transfer

capacitance

272

t_d(on)

t_r

t_d(off)

t_f

turn-on delay time

rise time

V_DS= 50 V; R_L= 2 Ω; V_GS= 10 V;

R_G(ext)= 4.7 Ω; T_j= 25 °C

-

34.6

45.6

103.9

49.5

-

ns

turn-off delay time

fall time

PSMN7R0-100ES_3

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Product data sheet

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PSMN7R0-100ES

NXP Semiconductors

N-channel 100V 6.8 mΩ standard level MOSFET in I2PAK.

Table 6.

Symbol

Characteristics …continued

Parameter

Conditions

Min

Typ

Max

Unit

Source-drain diode

V_SD

t_rr

source-drain voltage

I_S= 25 A; V_GS= 0 V; T_j= 25 °C; see Figure 17

-

0.8

64

1.2

V

reverse recovery time

recovered charge

I_S= 25 A; dI_S/dt = 100 A/µs; V_GS= 0 V;

V_DS= 50 V

-

ns

nC

Q_r

167

003aad562

003aad566

300

I_D

(A)

240

12000

20

6

5.5

C

(pF)

10

C_{is s}

10000

5

180

120

60

8000

6000

4000

2000

C_{rs s}

4.5

V_GS(V) = 4

0

1

2

3

4

0

5

10

15

20

_GS(V)

V

_DS(V)

V

Fig 5. Output characteristics: drain current as a

function of drain-source voltage; typical values

Fig 6. Input and reverse transfer capacitances as a

function of gate-source voltage; typical values

003aad572

003aad568

240

60

I_D

g_fs

(A)

(S)

180

120

60

45

30

T = 175 C

°

j

15

0

T = 25 C

°

j

0

50

100

150

200

250

I_D(A)

0

2

4

6

V_GS(V)

Fig 7. Forward transconductance as a function of

drain current; typical values

Fig 8. Transfer characteristics: drain current as a

function of gate-source voltage; typical values

PSMN7R0-100ES_3

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Product data sheet

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PSMN7R0-100ES

NXP Semiconductors

N-channel 100V 6.8 mΩ standard level MOSFET in I2PAK.

003aad571

003aad280

5

40

V

GS(th)

(V)

R_DSon

(m

)

Ω

4

3

2

1

0

max

30

20

10

0

typ

min

−60

0

60

120

180

0

5

10

15

20

V_GS(V)

T (°C)

j

Fig 10. Gate-source threshold voltage as a function of

junction temperature

Fig 9. Drain-source on-state resistance as a function

of gate-source voltage; typical values

03aa35

003aad774

−1

10

3.2

I

D

(A)

a

min

typ

max

−2

−3

−4

−5

−6

10

2.4

10

1.6

0.8

0

-60

0

60

120

180

0

2

4

6

T (°C)

j

V

GS

(V)

Fig 11. Sub-threshold drain current as a function of

gate-source voltage

Fig 12. Normalized drain-source on-state resistance

factor as a function of junction temperature

PSMN7R0-100ES_3

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Product data sheet

Rev. 03 — 23 February 2010

8 of 15

PSMN7R0-100ES

NXP Semiconductors

N-channel 100V 6.8 mΩ standard level MOSFET in I2PAK.

003aad563

003aad569

10

20

V_GS(V) = 4.5

V

GS

(V)

R_DSon

(m

80 V

)

Ω

8

15

10

5

20 V

6

4

2

0

V

= 50 V

DS

5

6

10

20

0

50

100

150

0

20

40

60

80

100

I_D(A)

Q

(nC)

G

Fig 14. Gate-source voltage as a function of gate

charge; typical values

Fig 13. Drain-source on-state resistance as a function

of drain current; typical values

003aad567

10⁴

V

DS

C_iss

C

I

D

(pF)

V

GS(pl)

10³

V

GS(th)

V

GS

C_oss

Q

GS1

Q

GS2

Q

GS

Q

GD

C_rss

Q

G(tot)

003aaa508

10²

10^-1

1

10

10²

V

(V)

DS

Fig 15. Gate charge waveform definitions

Fig 16. Input, output and reverse transfer capacitances

as a function of drain-source voltage; typical

values

PSMN7R0-100ES_3

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Product data sheet

Rev. 03 — 23 February 2010

9 of 15

PSMN7R0-100ES

NXP Semiconductors

N-channel 100V 6.8 mΩ standard level MOSFET in I2PAK.

003aad570

100

I_S

(A)

80

60

40

20

0

T = 175 C

°

j

25 C

°

0

0.3

0.6

0.9

1.2

V

_SD(V)

Fig 17. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values

PSMN7R0-100ES_3

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Product data sheet

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PSMN7R0-100ES

NXP Semiconductors

N-channel 100V 6.8 mΩ standard level MOSFET in I2PAK.

7. Package outline

Plastic single-ended package (I2PAK); low-profile 3-lead TO-262

SOT226

A

1

E

D

1

mounting

base

D

L

1

Q

b

1

L

1

e

2

3

b

c

e

0

5

10 mm

scale

DIMENSIONS (mm are the original dimensions)

D

max

D

1

A

1

b

c

E

UNIT

A

b

e

L

Q

1

4.5

4.1

1.40

1.27

0.85

0.60

1.3

1.0

0.7

0.4

1.6

1.2

10.3

9.7

15.0

13.5

3.30

2.79

2.6

2.2

mm

11

2.54

REFERENCES

EUROPEAN

PROJECTION

OUTLINE

VERSION

ISSUE DATE

IEC

JEDEC

JEITA

06-02-14

09-08-25

SOT226

TO-262

Fig 18. Package outline SOT226 (I2PAK)

PSMN7R0-100ES_3

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Product data sheet

Rev. 03 — 23 February 2010

11 of 15

PSMN7R0-100ES

NXP Semiconductors

N-channel 100V 6.8 mΩ standard level MOSFET in I2PAK.

8. Revision history

Table 7.

Revision history

Document ID

Release date

Data sheet status

Change notice

Supersedes

PSMN7R0-100ES_3

Modifications:

20100223

Product data sheet

-

PSMN7R0-100ES_2

• Various changes to content.

PSMN7R0-100ES_2

PSMN7R0-100ES_1

20100114

Objective data sheet

-

PSMN7R0-100ES_1

-

20090917

Objective data sheet

PSMN7R0-100ES_3

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Product data sheet

Rev. 03 — 23 February 2010

12 of 15

PSMN7R0-100ES

NXP Semiconductors

N-channel 100V 6.8 mΩ standard level MOSFET in I2PAK.

9. Legal information

9.1 Data sheet status

Document status ^[1][2]

Product status^[3]

Development

Definition

Objective [short] data sheet

This document contains data from the objective specification for product development.

This document contains data from the preliminary specification.

This document contains the product specification.

Preliminary [short] data sheet Qualification

Product [short] data sheet Production

[1]

[2]

[3]

Please consult the most recently issued document before initiating or completing a design.

The term 'short data sheet' is explained in section "Definitions".

The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product

status information is available on the Internet at URL http://www.nxp.com.

Suitability for use — NXP Semiconductors products are not designed,

9.2 Definitions

authorized or warranted to be suitable for use in medical, military, aircraft,

space or life support equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors accepts no liability for inclusion and/or use of

NXP Semiconductors products in such equipment or applications and

therefore such inclusion and/or use is at the customer’s own risk.

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences of

use of such information.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

specified use without further testing or modification.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is intended

for quick reference only and should not be relied upon to contain detailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

office. In case of any inconsistency or conflict with the short data sheet, the

full data sheet shall prevail.

NXP Semiconductors does not accept any liability related to any default,

damage, costs or problem which is based on a weakness or default in the

customer application/use or the application/use of customer’s third party

customer(s) (hereinafter both referred to as “Application”). It is customer’s

sole responsibility to check whether the NXP Semiconductors product is

suitable and fit for the Application planned. Customer has to do all necessary

testing for the Application in order to avoid a default of the Application and the

product. NXP Semiconductors does not accept any liability in this respect.

Product specification — The information and data provided in a Product

data sheet shall define the specification of the product as agreed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product is

deemed to offer functions and qualities beyond those described in the

Product data sheet.

Quick reference data — The Quick reference data is an extract of the

product data given in the Limiting values and Characteristics sections of this

document, and as such is not complete, exhaustive or legally binding.

9.3 Disclaimers

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

Limited warranty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any

representations or warranties, expressed or implied, as to the accuracy or

completeness of such information and shall have no liability for the

consequences of use of such information.

In no event shall NXP Semiconductors be liable for any indirect, incidental,

punitive, special or consequential damages (including - without limitation - lost

profits, lost savings, business interruption, costs related to the removal or

replacement of any products or rework charges) whether or not such

damages are based on tort (including negligence), warranty, breach of

contract or any other legal theory.

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individual agreement. In case an individual

agreement is concluded only the terms and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

Notwithstanding any damages that customer might incur for any reason

whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards

customer for the products described herein shall be limited in accordance

with the Terms and conditions of commercial sale of NXP Semiconductors.

No offer to sell or license — Nothing in this document may be interpreted or

construed as an offer to sell products that is open for acceptance or the grant,

conveyance or implication of any license under any copyrights, patents or

other industrial or intellectual property rights.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

PSMN7R0-100ES_3

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Product data sheet

Rev. 03 — 23 February 2010

13 of 15

PSMN7R0-100ES

NXP Semiconductors

N-channel 100V 6.8 mΩ standard level MOSFET in I2PAK.

Export control — This document as well as the item(s) described herein may

be subject to export control regulations. Export might require a prior

authorization from national authorities.

customer uses the product for automotive applications beyond NXP

Semiconductors’ specifications such use shall be solely at customer’s own

risk, and (c) customer fully indemnifies NXP Semiconductors for any liability,

damages or failed product claims resulting from customer design and use of

the product for automotive applications beyond NXP Semiconductors’

standard warranty and NXP Semiconductors’ product specifications.

Non-automotive qualified products — Unless the data sheet of an NXP

Semiconductors product expressly states that the product is automotive

qualified, the product is not suitable for automotive use. It is neither qualified

nor tested in accordance with automotive testing or application requirements.

NXP Semiconductors accepts no liability for inclusion and/or use of

non-automotive qualified products in automotive equipment or applications. In

the event that customer uses the product for design-in and use in automotive

applications to automotive specifications and standards, customer (a) shall

use the product without NXP Semiconductors’ warranty of the product for

such automotive applications, use and specifications, and (b) whenever

9.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks

are the property of their respective owners.

TrenchMOS — is a trademark of NXP B.V.

10. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

PSMN7R0-100ES_3

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Product data sheet

Rev. 03 — 23 February 2010

14 of 15

PSMN7R0-100ES

NXP Semiconductors

N-channel 100V 6.8 mΩ standard level MOSFET in I2PAK.

11. Contents

1

Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1

General description . . . . . . . . . . . . . . . . . . . . . .1

Features and benefits. . . . . . . . . . . . . . . . . . . . .1

Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1

Quick reference data . . . . . . . . . . . . . . . . . . . . .1

1.1

1.2

1.3

1.4

2

3

4

5

6

7

8

Pinning information. . . . . . . . . . . . . . . . . . . . . . .2

Ordering information. . . . . . . . . . . . . . . . . . . . . .2

Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3

Thermal characteristics . . . . . . . . . . . . . . . . . . .5

Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .6

Package outline . . . . . . . . . . . . . . . . . . . . . . . . .11

Revision history. . . . . . . . . . . . . . . . . . . . . . . . .12

9

Legal information. . . . . . . . . . . . . . . . . . . . . . . .13

Data sheet status . . . . . . . . . . . . . . . . . . . . . . .13

Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .13

Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .14

9.1

9.2

9.3

9.4

10

Contact information. . . . . . . . . . . . . . . . . . . . . .14

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 23 February 2010

Document identifier: PSMN7R0-100ES_3


型号：	PSMN7R0-100ES,127
厂家：	NXP
描述：	PSMN7R0-100ES - N-channel 100V 6.8 mΩ standard level MOSFET in I2PAK. TO-262 3-Pin
文件：	总15页 (文件大小：227K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

PSMN7R0-100ES,127 [NXP]

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