FDMT1D3N08B_技术文档

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FDMT1D3N08B

N-Channel Dual Cool^TM88 PowerTrench^®MOSFET

80 V, 164 A, 1.35 mΩ

Features

General Description

Max r_DS(on)= 1.35 mΩ at V_GS= 10 V, I_D= 36 A

Max r_DS(on)= 1.8 mΩ at V_GS= 8 V, I_D= 31 A

Advanced Package and Silicon Combination for Low r_DS(on)

and High Efficiency

This N-Channel MOSFET is produced using Fairchild

Semiconductor’s

advanced

PowerTrench^®

process.

Advancements in both silicon and Dual Cool^TMpackage

technologies have been combined to offer the lowest r_DS(on)

while maintaining excellent switching performance by extremely

low Junction-to-Ambient thermal resistance.

Next Generation Enhanced Body Diode Technology,

Engineered for Soft Recovery

Applications

Low Profile 8x8 mm MLP Package

MSL1 Robust Package Design

100% UIL Tested

OringFET / Load Switching

Synchronous Rectification

DC-DC Conversion

RoHS Compliant

Pin 1

G

S

D

G

S

D

Top

Dual Cool^TM88

Bottom

MOSFET Maximum Ratings T_A= 25 °C unless otherwise noted.

Symbol

V_DS

V_GS

Parameter

Ratings

80

Units

Drain to Source Voltage

Gate to Source Voltage

Drain Current -Continuous

-Continuous

V

±20

T_C= 25 °C

_C= 100 °C

(Note 5)

(Note 1a)

(Note 4)

(Note 3)

164

T

103

I_D

A

-Continuous

T_A= 25 °C

36

-Pulsed

864

E_AS

Single Pulse Avalanche Energy

Power Dissipation

1734

178

mJ

W

T_C= 25 °C

T_A= 25 °C

P_D

(Note 1a)

3.3

T_J, T_STG

Operating and Storage Junction Temperature Range

-55 to +150

°C

Thermal Characteristics

R_θJC

R_θJA

Thermal Resistance, Junction-to-Case

(Top Source)

(Bottom Drain)

(Note 1a)

1.9

0.7

38

81

15

21

9

Thermal Resistance, Junction-to-Case

Thermal Resistance, Junction-to-Ambient

(Note 1b)

°C/W

(Note 1i)

(Note 1j)

(Note 1k)

Package Marking and Ordering Information

Device Marking

Device

Package

Dual Cool^TM88

Reel Size

Tape Width

13.3 mm

Quantity

1D3N08B

FDMT1D3N08B

13”

3000 units

Semiconductor Components Industries, LLC, 2016

November, 2016, Rev. 1.0

Publication Order Number:

FDMT1D3N08B/D

1

Electrical Characteristics T_J= 25 °C unless otherwise noted.

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Units

Off Characteristics

BV_DSS

Drain to Source Breakdown Voltage

I_D= 250 μA, V_GS= 0 V

80

V

ΔBV_DSS

ΔT_J

Breakdown Voltage Temperature

Coefficient

I

_D= 250 μA, referenced to 25 °C

50

mV/°C

I_DSS

I_GSS

Zero Gate Voltage Drain Current

Gate to Source Leakage Current

V_DS= 64 V, V_GS= 0 V

V_GS= ±20 V, V_DS= 0 V

1

μA

100

nA

On Characteristics

V_GS(th)

Gate to Source Threshold Voltage

V_GS= V_DS, I_D= 250 μA

2.0

3.2

-11

4.0

V

ΔV_GS(th)

ΔT_J

Gate to Source Threshold Voltage

Temperature Coefficient

I

_D= 250 μA, referenced to 25 °C

V_GS= 10 V, I_D= 36 A

_GS= 8 V, I_D= 31 A

mV/°C

1.1

1.3

1.8

116

1.35

1.8

r_DS(on)

g_FS

Static Drain to Source On Resistance

Forward Transconductance

V

mΩ

V_GS= 10 V, I_D= 36 A, T_J= 125 °C

V_DS= 5 V, I_D= 36 A

2.2

S

Dynamic Characteristics

C_iss

C_oss

C_rss

R_g

Input Capacitance

14000

2050

50

19600

2870

150

pF

Ω

V_DS= 40 V, V_GS= 0 V,

f = 1 MHz

Output Capacitance

Reverse Transfer Capacitance

Gate Resistance

0.1

1.4

2.1

Switching Characteristics

t_d(on)

t_r

t_d(off)

t_f

Turn-On Delay Time

Rise Time

63

56

101

90

ns

V_DD= 40 V, I_D= 36 A,

V

_GS= 10 V, R_GEN= 6 Ω

Turn-Off Delay Time

Fall Time

68

109

32

ns

20

ns

Q_g(TOT)

Q_gs

Total Gate Charge

Gate to Source Charge

Gate to Drain “Miller” Charge

Output Charge

V_GS= 0 V to 10 V

V_GS= 0 V to 8 V

186

152

67

260

213

nC

V_DD= 40 V,

_D= 36 A

I

Q_gd

37

Q_oss

V_DD= 40 V, V_GS= 0 V

185

Drain-Source Diode Characteristics

V

_GS= 0 V, I_S= 2.6 A

(Note 2)

0.7

0.8

83

1.1

1.2

V_SD

Source to Drain Diode Forward Voltage

V

V_GS= 0 V, I_S= 36 A

t_rr

Reverse Recovery Time

132

143

ns

I_F= 36 A, di/dt = 100 A/μs

Q_rr

Reverse Recovery Charge

90

nC

www.onsemi.com

2

Thermal Characteristics

R_θJC

R_θJA

Thermal Resistance, Junction-to-Case

(Top Source)

(Bottom Drain)

(Note 1a)

(Note 1b)

(Note 1c)

(Note 1d)

(Note 1e)

(Note 1f)

1.9

0.7

38

81

26

34

14

16

26

60

15

21

9

Thermal Resistance, Junction-to-Case

Thermal Resistance, Junction-to-Ambient

°C/W

(Note 1g)

(Note 1h)

(Note 1i)

(Note 1j)

(Note 1k)

(Note 1l)

11

NOTES:

1. R

is determined with the device mounted on a FR-4 board using a specified pad of 2 oz copper as shown below. R

is determined by the user's board design.

θCA

θJA

b. 81 °C/W when mounted on

a minimum pad of 2 oz copper

a. 38 °C/W when mounted on

a 1 in pad of 2 oz copper

2

c. Still air, 20.9x10.4x12.7mm Aluminum Heat Sink, 1 in pad of 2 oz copper

d. Still air, 20.9x10.4x12.7mm Aluminum Heat Sink, minimum pad of 2 oz copper

2

e. Still air, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, 1 in pad of 2 oz copper

f. Still air, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, minimum pad of 2 oz copper

2

g. 200FPM Airflow, No Heat Sink,1 in pad of 2 oz copper

h. 200FPM Airflow, No Heat Sink, minimum pad of 2 oz copper

2

i. 200FPM Airflow, 20.9x10.4x12.7mm Aluminum Heat Sink, 1 in pad of 2 oz copper

j. 200FPM Airflow, 20.9x10.4x12.7mm Aluminum Heat Sink, minimum pad of 2 oz copper

2

k. 200FPM Airflow, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, 1 in pad of 2 oz copper

l. 200FPM Airflow, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, minimum pad of 2 oz copper

2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.

3. E of 1734 mJ is based on starting T = 25 °C; N-ch: L = 3 mH, I = 34 A, V = 80 V, V =10 V. 100% test at L = 0.3 mH, I = 77 A.

AS

J

AS

DD

GS

AS

4. Pulsed Id please refer to Fig 11 SOA graph for more details.

5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal & electro-mechanical application board design.

www.onsemi.com

3

Typical Characteristics T_J= 25 °C unless otherwise noted.

320

4

3

2

1

0

V_GS= 10 V

V_GS= 8 V

V_GS= 6 V

V_GS= 7 V

240

V_GS= 6.5 V

160

V_GS= 7 V

V_GS= 6 V

80

V_GS= 10 V

V_GS= 8 V

PULSE DURATION = 80 μs

DUTY CYCLE = 0.5% MAX

PULSE DURATION = 80 μs

DUTY CYCLE = 0.5% MAX

0

0.0

0.5

1.0

1.5

2.0

0

64

128

192

256

320

V_DS, DRAIN TO SOURCE VOLTAGE (V)

I_D, DRAIN CURRENT (A)

Figure 1. On Region Characteristics

Figure2. N o r m a l i z e d O n - R e s i s ta n c e

vs. Drain Current and Gate Voltage

1.9

12

PULSE DURATION = 80 μs

DUTY CYCLE = 0.5% MAX

I_D= 36 A

1.8

1.7

1.6

1.5

1.4

1.3

1.2

1.1

1.0

0.9

0.8

0.7

V_GS= 10 V

I_D= 36 A

9

6

3

0

T_J= 125 ^o

C

T_J= 25 ^o

C

-75 -50 -25

0

25 50 75 100 125 150

4

5

6

7

8

9

10

T_J, JUNCTION TEMPERATURE (^oC)

V_GS, GATE TO SOURCE VOLTAGE (V)

Figure 3. Normalized On Resistance

vs. Junction Temperature

Figure4. On-Resistance vs. Gate to

Source Voltage

320

V_GS= 0 V

PULSE DURATION = 80 μs

DUTY CYCLE = 0.5% MAX

V_DS= 5 V

100

256

192

128

64

10

T_J= 150 ^o

C

1

T_J= 150 ^o

C

T_J= 25 ^o

C

0.1

T_J= 25 ^o

C

T_J= -55 ^o

C

0.01

0.001

T_J= -55 ^o

C

0

2

3

4

5

6

7

0.0

0.2

0.4

0.6

0.8

1.0

1.2

V_GS, GATE TO SOURCE VOLTAGE (V)

V_SD, BODY DIODE FORWARD VOLTAGE (V)

Figure 5. Transfer Characteristics

Figure6. Source to Drain Diode

Forward Voltage vs. Source Current

www.onsemi.com

4

Typical Characteristics T_J= 25 °C unless otherwise noted.

10

100000

10000

1000

100

I_D= 36 A

C_iss

V_DD= 30 V

8

V_DD= 40 V

C_oss

6

V_DD= 50 V

C_rss

4

2

0

10

f = 1 MHz

_GS= 0 V

V

1

0

40

80

120

160

200

0.1

1

10

80

V_DS, DRAIN TO SOURCE VOLTAGE (V)

Q_g, GATE CHARGE (nC)

Figure 7. Gate Charge Characteristics

Figure8. C a p a c i t a n c e v s . D r a i n

to Source Voltage

200

180

144

108

72

100

10

1

T_J= 25 ^o

C

V_GS= 10 V

T_J= 100 ^o

C

V_GS= 4.5 V

T_J= 125 ^o

C

36

R_θJC= 1.9 ^oC/W

0

0.001 0.01

0.1

1

10

100 1000 10000

25

50

75

100

125

150

T_C, CASE TEMPERATURE (^oC)

t_AV, TIME IN AVALANCHE (ms)

Figure9. U n c l a m p e d I n d u c t i v e

Switching Capability

Figure10. Maximum Continuous Drain

Current vs. Case Temperature

1000

100

10

100000

10000

1000

100

SINGLE PULSE

R_θJC= 1.9 ^oC/W

_C= 25 ^oC

T

10 μs

THIS AREA IS

LIMITED BY r_DS(on)

100 μs

1 ms

SINGLE PULSE

T_J= MAX RATED

R_θJC= 1.9 ^oC/W

1

10 ms

100 ms

CURVE BENT TO

MEASURED DATA

T

_C= 25 ^oC

0.1

10

10^-5

10^-4

10^-3

t, PULSE WIDTH (sec)

10^-2

10^-1

1

10

100

300

V_DS, DRAIN to SOURCE VOLTAGE (V)

Figure 11. Forward Bias Safe

Operating Area

Figure12. Single Pulse Maximum

Power Dissipation

www.onsemi.com

5

Typical Characteristics T_J= 25 °C unless otherwise noted.

2

DUTY CYCLE-DESCENDING ORDER

1

D = 0.5

0.2

P

DM

0.1

0.05

0.02

0.01

t

1

t

2

NOTES:

(t) = r(t) x R

0.01

SINGLE PULSE

Z

θJC

o

R

= 1.9 C/W

θJC

Peak T = P

x Z (t) + T

J

DM

θJC C

Duty Cycle, D = t / t

1

2

0.001

10^-5

10^-4

10^-3

10^-2

10^-1

1

t, RECTANGULAR PULSE DURATION (sec)

Figure 13. Junction-to-Case Transient Thermal Response Curve

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6

Dimensional Outline and Pad Layout

ON Semiconductor and the ON Logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other

countries.

ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor's product/patent

coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.

ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any

liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental

damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or

standards, regardless of any support or applications information provided by

ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual

performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. ON

Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a

critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices

intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall

indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and

reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges

that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is

subject to all applicable copyright laws and is not for resale in any manner.

www.onsemi.com

7

(2X)

8

8.00

6.90

2.00

0.05 C

A

8.00±0.10

8

B

5

1.10

5.23

KEEP OUT

AREA

4.24

3.94

PKG

L

8.00±0.10

9.00

C

(1.83)

1.55

0.48

(2.41)

1.13

0.05 C

(2X)

1

4

PKG

1

4

C

L

(1.00)

5.10

7.10

1.10

4.03

3.68

(1.56)

SEE DETAIL A

(8X)

LAND PATTERN

RECOMMENDATION

0.30

0.20

0.95

0.75

0.10

.05

C A B

6.00

C

0.05

0.00

8X

1.10

SEATING

PLANE

2.00

0.90

(0.40)

(0.50)

0.70

0.50

SCALE: 2X

1

2

3

4

PIN #1

IDENT

1.68

1.48

NOTES: UNLESS OTHERWISE SPECIFIED

A) THIS PACKAGE IS NOT PRESENTLY REGISTERED

WITH ANY STANDARDS COMMITTEE.

B) DIMENSIONS ARE INCLUSIVE OF BURRS,

MOLD FLASH, AND TIE BAR PROTRUSIONS.

C) ALL DIMENSIONS ARE IN MILLIMETERS.

D) DRAWING CONFORMS TO ASME Y14.5M-2009.

E) IT IS RECOMMENDED TO HAVE NO TRACES OR

VIAS WITHIN THE KEEP OUR AREA.

1.20

2.78

5.33

5.13

(0.91)

0.45

(1.23)

F) DRAWING FILENAME: MKT-PQFN08RREV2

8

7

6

5

0.25

7.00

6.80

(4X)

(0.60)

ON Semiconductor and

are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent

coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.

ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,

regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or

specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer

application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not

designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification

in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized

application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and

expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such

claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This

literature is subject to all applicable copyright laws and is not for resale in any manner.

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1


型号：	FDMT1D3N08B
厂家：	ONSEMI
描述：	N 沟道，双 CoolTM 88 PowerTrench® MOSFET，80V，164A，1.35mΩ
文件：	总10页 (文件大小：1609K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

FDMT1D3N08B [ONSEMI]

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