MJW16212 [ONSEMI]
POWER TRANSISTOR; 功率晶体管
| 型号： | MJW16212 |
| 厂家： | 
ONSEMI |
| 描述： | POWER TRANSISTOR |
| 文件： | 总8页 (文件大小：264K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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by MJW16212/D
SEMICONDUCTOR TECHNICAL DATA
NPN Bipolar Power Deflection Transistor
For High and Very High Resolution Monitors
The MJW16212 is a state–of–the–art SWITCHMODE bipolar power transistor. It
is specifically designed for use in horizontal deflection circuits for 20 mm diameter
neck, high and very high resolution, full page, monochrome monitors.
*Motorola Preferred Device
POWER TRANSISTOR
10 AMPERES
•
•
•
•
1500 Volt Collector–Emitter Breakdown Capability
Typical Dynamic Desaturation Specified (New Turn–Off Characteristic)
Application Specific State–of–the–Art Die Design
Fast Switching:
1500 VOLTS – V
50 AND 150 WATTS
CES
200 ns Inductive Fall Time (Typ)
2000 ns Inductive Storage Time (Typ)
•
Low Saturation Voltage:
0.15 Volts at 5.5 Amps Collector Current and 2.5 A Base Drive
Low Collector–Emitter Leakage Current — 250 µA Max at 1500 Volts — V
High Emitter–Base Breakdown Capability For High Voltage Off Drive Circuits —
8.0 Volts (Min)
•
•
CES
MAXIMUM RATINGS
Rating
Symbol
Value
1500
650
Unit
Vdc
Vdc
Vdc
V
Collector–Emitter Breakdown Voltage
Collector–Emitter Sustaining Voltage
Emitter–Base Voltage
V
CES
V
CEO(sus)
V
EBO
8.0
RMS Isolation Voltage (2)
(for 1 sec, T = 25 C,
A
Rel. Humidity < 30%)
V
ISOL
Per Fig. 14
Per Fig. 15
—
—
Collector Current — Continuous
Collector Current — Pulsed (1)
I
10
15
Adc
Adc
C
I
CM
Base Current — Continuous
Base Current — Pulsed (1)
I
5.0
10
B
I
BM
CASE 340K–01
TO–247AE
Maximum Repetitive Emitter–Base
Avalanche Energy
W (BER)
0.2
mJ
Total Power Dissipation @ T = 25 C
P
150
39
1.49
Watts
C
D
Total Power Dissipation @ T = 100 C
C
Derated above T = 25 C
C
W/ C
C
Operating and Storage Temperature Range
T , T
J
–55 to 125
stg
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
0.67
275
Unit
C/W
C
Thermal Resistance — Junction to Case
R
θJC
Lead Temperature for Soldering Purposes
1/8″ from the case for 5 seconds
T
L
(1) Pulse Test: Pulse Width = 5.0 ms, Duty Cycle
10%.
(2) Proper strike and creepage distance must be provided.
Preferred devices are Motorola recommended choices for future use and best overall value.
SCANSWITCH and SWITCHMODE are trademarks of Motorola Inc.
REV 2
Motorola, Inc. 1996
ELECTRICAL CHARACTERISTICS (T = 25 C unless otherwise noted)
C
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS (2)
Collector Cutoff Current (V
Collector Cutoff Current (V
= 1500 V, V
= 1200 V, V
= 0 V)
= 0 V)
I
—
—
—
—
250
25
µAdc
CE
CE
BE
BE
CES
Emitter–Base Leakage (V
= 8.0 Vdc, I = 0)
I
—
—
11
—
25
—
—
µAdc
Vdc
EB
C
EBO
Emitter–Base Breakdown Voltage (I = 1.0 mA, I = 0)
V
8.0
650
E
C
(BR)EBO
Collector–Emitter Sustaining Voltage (Table 1) (I = 10 mAdc, I = 0)
V
Vdc
C
B
CEO(sus)
ON CHARACTERISTICS (2)
Collector–Emitter Saturation Voltage (I = 5.5 Adc, I = 2.2 Adc)
V
V
—
—
0.15
0.14
1.0
1.0
Vdc
C
B
CE(sat)
Collector–Emitter Saturation Voltage (I = 3.0 Adc, I = 400 mAdc)
C
B
Base–Emitter Saturation Voltage (I = 5.5 Adc, I = 2.2 Adc)
—
0.9
1.5
Vdc
—
C
B
BE(sat)
DC Current Gain (I = 1.0 A, V
= 5.0 Vdc)
CE
= 5.0 Vdc)
CE
h
t
—
4.0
24
6.0
—
10
C
FE
DC Current Gain (I = 10 A, V
C
DYNAMIC CHARACTERISTICS
Dynamic Desaturation Interval (I = 5.5 A, I = 2.2 A, LB = 1.5 µH)
—
—
350
180
—
ns
C
B1
ds
Output Capacitance
(V = 10 Vdc, I = 0, f = 100 kHz)
test
C
350
pF
ob
T
CE
Gain Bandwidth Product
(V = 10 Vdc, I = 0.5 A, f = 1.0 MHz)
test
E
f
—
—
—
2.75
35
—
—
—
MHz
µJ
CE
Emitter–Base Turn–Off Energy
(EB = 500 ns, R
C
EB
(off)
c–hs
= 22 Ω)
(avalanche) BE
Collector–Heatsink Capacitance — MJF16212 Isolated Package
C
5.0
pF
(Mounted on a 1″ x 2″ x 1/16″ Copper Heatsink, V
= 0, f
= 100 kHz)
test
CE
SWITCHING CHARACTERISTICS
Inductive Load (I = 5.5 A, I = 2.2 A), High Resolution Deflection
Simulator Circuit Table 2
ns
C
B
Storage
Fall Time
t
t
—
—
2000
200
4000
350
sv
fi
(2) Pulse Test: Pulse Width = 300 µs, Duty Cycle
2.0%.
SAFE OPERATING AREA
100
50
18
20
I
T
/I = 5
10 µs
C B
10
5
≤ 100°C
14
10
6
J
100
ns
2
5 ms
MJH16212
1
0.5
II
DC
0.2
BONDING WIRE LIMIT
THERMAL LIMIT
0.1
0.05
SECOND BREAKDOWN
T
= 25
°C
2
J
0.02
0.01
1
2
3
5
7
10
20 30 50 70100 200300 500700 1K
0
300
V
600
900
1200
1500
V
, COLLECTOR–EMITTER VOLTAGE (V)
, COLLECTOR–EMITTER VOLTAGE (V)
CE
CE
Figure 2. Maximum Reverse Bias
Safe Operating Area
Figure 1. Maximum Forward Bias
Safe Operating Area
3–2
Motorola Bipolar Power Transistor Device Data
SAFE OPERATING AREA (continued)
1
FORWARD BIAS
SECOND BREAKDOWN
DERATING
There are two limitations on the power handling ability of a
transistor: average junction temperature and second break-
0.8
0.6
0.4
0.2
0
down. Safe operating area curves indicate I – V
limits of
C
CE
the transistor that must be observed for reliable operation;
i.e., the transistor must not be subjected to greater dissipa-
tion than the curves indicate.
THERMAL
DERATING
The data of Figure 1 is based on T = 25 C; T
is
J(pk)
C
variable depending on power level. Second breakdown pulse
limits are valid for duty cycles to 10% but must be derated
when T ≥ 25 C. Second breakdown limitations do not der-
C
ate the same as thermal limitations. Allowable current at the
voltages shown on Figure 1 may be found at any case tem-
perature by using the appropriate curve on Figure 3.
At high case temperatures, thermal limitations will reduce
the power that can be handled to values less than the limita-
tions imposed by second breakdown.
25
45
65
85
125
105
T
, CASE TEMPERATURE (°C)
C
Figure 3. Power Derating
REVERSE BIAS
RC snubbing, load line shaping, etc.
For inductive loads, high voltage and high current must be
sustained simultaneously during turn–off, in most cases, with
the base–to–emitter junction reverse biased. Under these
conditions the collector voltage must be held to a safe level
at or below a specific value of collector current. This can be
accomplished by several means such as active clamping,
The safe level for these devices is specified as Reverse
Biased Safe Operating Area and represents the voltage–
current condition allowable during reverse biased turnoff.
This rating is verified under clamped conditions so that the
device is never subjected to an avalanche mode. Figure 2
gives the RBSOA characteristics.
Table 1. RBSOA/V
Test Circuit
(BR)CEO(SUS)
+ V
≈ 11 V
0.02 µF
100
H.P. 214
OR EQUIV.
P.G.
2N6191
20
+
–
10 µF
0
R
B1
A
≈
– 35 V
R
B2
0.02 µF
+
–
F
50
2N5337
– V
1
µ
500
100
I
C(pk)
T
+ V
1
I
C
0 V
*I
– V
C
V
CE(pk)
L
L
(I )
A
T.U.T.
coil Cpk
V
CE
T
MR856
V
1
V
CC
*I
B
50
T
adjusted to obtain I
I
1
C(pk)
V
CC
B1
clamp
I
B
V
RBSOA
L = 200 µH
(BR)CEO
I
L = 10 mH
B2
R
V
= ∞
= 20 Volts
R
= 0
B2
CC
B2
V
R
= 20 Volts
CC
B1
selected for desired I
B1
*Tektronix
*P–6042 or
*Equivalent
Note: Adjust –V to obtain desired V
at Point A.
BE(off)
3–3
Motorola Bipolar Power Transistor Device Data
10
10
7
5
7
5
I
= 2
4
5.5
8
10 A
C
3
2
I
T
/I = 5
C B
3
2
= 100°C
J
1
0.7
0.5
= 25°C
1
0.7
0.3
0.2
T
= 25°C
J
0.5
0.1
0.07
0.05
0.03
0.02
I
/I = 10
C B
0.3
0.2
T = 100°C
J
= 25
°C
0.01
0.1
.01
.05 0.1 0.2 0.3 0.5
1
2
5 7
10
.02.03
3
0.1
0.2 0.3
0.5 0.7
1
2
3
5
7
10
I
, COLLECTOR CURRENT (A)
I
, BASE CURRENT (A)
C
B
Figure 5. Typical Emitter–Base
Saturation Voltage
Figure 4. Typical Collector–Emitter
Saturation Region
5
4
3
2
10
7
5
I
T
/I = 10
C B
V
= 10 V
= 1 MHz
= 25°C
= 100°C
CE
J
3
2
f
T
(test)
C
= 25°C
1
0.7
I
T
/I = 5
C B
0.5
= 100
°C
J
0.3
0.2
1
0
= 25
1
°C
0.1
0.1
0.2
0.3
0.5 0.7
2
3
5
7
10
0
1
2
3
4
5
6
I
, COLLECTOR CURRENT (A)
I
, COLLECTOR CURRENT (A)
C
C
Figure 7. Typical Transition Frequency
Figure 6. Typical Collector–Emitter
Saturation Voltage
10000
5000
C
2000
1000
ib
500
200
100
50
C
ob
20
f
= 1 MHz
test
10
5
2
1
5
30
70
200
1000
300 500
1
2
3
7
10
20
50
100
V
, REVERSE VOLTAGE (V)
R
Figure 8. Typical Capacitance
3–4
Motorola Bipolar Power Transistor Device Data
DYNAMIC DESATURATIION
The SCANSWITCH series of bipolar power transistors are
the voltage across the yoke drops. Roll off in the collector
current ramp results in improper beam deflection and distor-
tion of the image at the right edge of the screen. Design
changes have been made in the structure of the SCANS-
WITCH series of devices which minimize the dynamic desa-
turation interval. Dynamic desaturation has been defined in
specifically designed to meet the unique requirements of hor-
izontal deflection circuits in computer monitor applications.
Historically, deflection transistor design was focused on mini-
mizing collector current fall time. While fall time is a valid
figure of merit, a more important indicator of circuit perfor-
mance as scan rates are increased is a new characteristic,
“dynamic desaturation.” In order to assure a linear collector
current ramp, the output transistor must remain in hard satu-
ration during storage time and exhibit a rapid turn–off transi-
tion. A sluggish transition results in serious consequences.
As the saturation voltage of the output transistor increases,
terms of the time required for the V
to rise from 1.0 to
CE
5.0 volts (Figures 9 and 10) and typical performance at opti-
mized drive conditions has been specified. Optimization of
device structure results in a linear collector current ramp, ex-
cellent turn–off switching performance, and significantly low-
er overall power dissipation.
+24 V
Table 2. High Resolution Deflection Application Simulator
U2
MC7812
G
N
D
V
V
O
I
+
(IC)
C1
100
Q5
MJ11016
Q2
MJ11016
R5
1 k
+
µ
F
C2
10
µ
F
(IB)
R1
1 k
+
6.2 V
C6
100
+
C3
10
R7
2.7 k
R8
9.1 k
R9
470
µ
F
µ
F
R10
47
LY
100 V
C5
0.1
C4
0.005
Q3
MJE
15031
D2
CY
R11
470
1 W
7
6
MUR460
OSC
V
CC
OUT
(DC)
R2
R3
8
1
%
V
CE
LB
R510
250
U1
MC1391P
T1
GND
2
Q4
SYNC
R6
1 k
DUT
Q1
R12
470
1 W
D1
MUR110
R4
22
BS170
T1: Ferroxcube Pot Core #1811 P3C8
Primary/Sec. Turns Ratio = 18:6
LB = 1.5 µH
CY = 0.01 µF
LY = 13 µH
Gapped for L = 30 µH
P
5
4
I
= 1.3 A
DYNAMIC DESATURATION TIME
IS MEASURED FROM V = 1 V
B1
CE
TO V
= 5 V
CE
3
2
I
= 4.9 A
B2
1
0
t
ds
0
4
6
8
2
10
TIME (ns)
TIME (2 µs/DIV)
Figure 10. Definition of Dynamic
Desaturation Measurement
Figure 9. Deflection Simulator Circuit Base
Drive Waveform
3–5
Motorola Bipolar Power Transistor Device Data
15
1500
1000
700
10
7
I
= I
B2 B1
5
500
I
= I
B2 B1
3
2
300
200
I
= 2 (I )
B1
I
= 2 (I
)
B2
β
= 5
= 25°C
B2
B1
f
T
J
β
= 5
= 25°C
f
T
J
1
100
1
2
3
5
7
10
15
1
2
3
5
7
10
15
I
, COLLECTOR CURRENT (A)
I , COLLECTOR CURRENT (A)
C
C
Figure 11. Typical Resistive Storage Time
Figure 12. Typical Resistive Fall Time
Table 3. Resistive Load Switching
+15
1
100 µF
t and t
s
µF
150
Ω
100 Ω
f
MTP8P10
MTP8P10
V
adjusted
(off)
R
B1
MPF930
to give specified
off drive
A
+10 V
50
MPF930
R
B2
MUR105
MJE210
Ω
MTP12N10
V
250 V
CC
R
28 Ω
5.5 A
L
500 µF
I
1 µF
C
150
Ω
I
I
1.1 A
B1
V
off
Per Spec
3.3 Ω
B2
T.U.T.
A
R
R
B1
*I
C
R
L
*I
Per Spec
B
B2
V
CC
1
D = 0.5
0.5
0.2
0.2
0.1
P
(pk)
R
R
(t) = r(t) R
θ
θ
θ
JC
JC
JC
°C/W MAX
0.1
= 0.7
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
0.05
t
1
READ TIME AT t
t
1
2
SINGLE PULSE
T
– T = P R (t)
(pk) θJC
J(pk)
C
DUTY CYCLE, D = t /t
1 2
0.01
0.1
1
10
100
1000
10000
t, TIME (ms)
Figure 13. Thermal Response
3–6
Motorola Bipolar Power Transistor Device Data
EMITTER–BASE TURN–OFF ENERGY, EB
(off)
drive has two additional important advantages. First, the con-
figuration of T1 allows L to be placed outside the path of for-
b
Emitter–base turn–off energy is a new specification
included on the SCANSWITCH data sheets. Typical
techniques for driving horizontal outputs rely on a pulse
transformer to supply forward base current, and a turnoff net-
work that includes a series base inductor to limit the rate of
transition from forward to reverse. An alternate drive scheme
has been used to characterize the SCANSWITCH series of
devices (see Figure 2). This circuit ramps the base drive to
eliminate the heavy overdrive at the beginning of the collec-
tor current ramp and underdrive just prior to turn–off ob-
served in typical drive topologies. This high performance
ward base current making it unnecessary to expend energy
to reverse the current flow as in a series based inductor. Se-
cond, there is no base resistor to limit forward base current
and hence no power loss associated with setting the value of
the forward base current. The ramp generating process
stores rather than dissipates energy. Tailoring the amount of
energy stored in T1 to the amount of energy, EB
, that is
(off)
required to turn the output transistor off results in essentially
lossless operation. [Note: B+ and the primary inductance of
2
T1 (L ) are chosen such that 1/2L l = EB
P b
.]
(off)
P
TEST CONDITIONS FOR ISOLATION TESTS* (MJF16212 ONLY)
MOUNTED
FULLY ISOLATED
PACKAGE
MOUNTED
FULLY ISOLATED
PACKAGE
0.099” MIN
LEADS
LEADS
HEATSINK
HEATSINK
0.110” MIN
Figure 14. Screw or Clip Mounting Position
for Isolation Test Number 1
Figure 15. Screw or Clip Mounting Position
for Isolation Test Number 2
* Measurement made between leads and heatsink with all leads shorted together
MOUNTING INFORMATION** (MJF16212 ONLY)
4–40 SCREW
CLIP
PLAIN WASHER
HEATSINK
COMPRESSION WASHER
NUT
HEATSINK
Figure 16a. Screw–Mounted
Figure 16b. Clip–Mounted
Figure 16. Typical Mounting Techniques*
Laboratorytestsonalimitednumberofsamplesindicate, whenusingthescrewandcompressionwashermountingtechnique, ascrew
.
torque of 6 to 8 in lbs is sufficient to provide maximum power dissipation capability. The compression washer helps to maintain a con-
stant pressure on the package over time and during large temperature excursions.
Destructive laboratory tests show that using a hex head 4-40 screw, without washers, and applying a torque in excess of 20 in lbs will
.
cause the plastic to crack around the mounting hole, resulting in a loss of isolation capability.
.
Additional tests on slotted 4-40 screws indicate that the screw slot fails between 15 to 20 in lbs without adversely affecting the pack-
age. However, in order to positively ensure the package integrity of the fully isolated device, Motorola does not recommend exceeding 10
.
in lbs of mounting torque under any mounting conditions.
**For more information about mounting power semiconductors see Application Note AN1040.
Motorola Bipolar Power Transistor Device Data
3–7
PACKAGE DIMENSIONS
–T–
E
–Q–
M
M
0.25 (0.010)
T B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
–B–
C
4
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
U
L
MILLIMETERS
INCHES
DIM
A
B
C
D
E
MIN
19.7
15.3
4.7
1.0
1.27 REF
2.0
5.5 BSC
2.2
0.4
14.2
MAX
20.3
15.9
5.3
MIN
MAX
0.799
0.626
0.209
0.055
A
K
0.776
0.602
0.185
0.039
0.050 REF
0.079
R
1
2
3
1.4
F
2.4
0.094
–Y–
G
H
J
K
L
0.216 BSC
P
2.6
0.8
14.8
0.087
0.016
0.559
0.102
0.031
0.583
5.5 NOM
0.217 NOM
P
3.7
3.55
5.0 NOM
5.5 BSC
3.0
4.3
3.65
0.146
0.140
0.197 NOM
0.217 BSC
0.118 0.134
0.169
0.144
V
H
Q
R
U
V
F
J
G
D
3.4
M
S
0.25 (0.010)
Y
Q
STYLE 3:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
CASE 340K–01
ISSUE O
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
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MJW16212/D
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