NSVT3906DXV6T1G [ONSEMI]
双 PNP 双极晶体管;型号: | NSVT3906DXV6T1G |
厂家: | ONSEMI |
描述: | 双 PNP 双极晶体管 小信号双极晶体管 |
文件: | 总8页 (文件大小:103K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NST3906DXV6T1,
NST3906DXV6T5
Dual General Purpose
Transistor
The NST3906DXV6T1 device is a spin- off of our popular
SOT-23/SOT-323 three-leaded device. It is designed for general
purpose amplifier applications and is housed in the SOT- 563
six-leaded surface mount package. By putting two discrete devices in
one package, this device is ideal for low-power surface mount
applications where board space is at a premium.
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(3)
(2)
(1)
Q
Q
1
2
• h , 100-300
FE
• Low V , ≤ 0.4 V
CE(sat)
• Simplifies Circuit Design
• Reduces Board Space
(4)
(5)
(6)
NST3906DXV6T1
• Reduces Component Count
• Lead-Free Solder Plating
4
5
6
MAXIMUM RATINGS
Rating
3
2
1
Symbol
Value
-40
Unit
Vdc
Vdc
Vdc
mAdc
V
Collector- Emitter Voltage
Collector- Base Voltage
Emitter- Base Voltage
Collector Current - Continuous
Electrostatic Discharge
V
CEO
V
CBO
V
EBO
SOT-563
CASE 463A
PLASTIC
-40
-5.0
-200
I
C
MARKING DIAGRAM
ESD
HBM>16000,
MM>2000
A2 D
THERMAL CHARACTERISTICS
Characteristic
(One Junction Heated)
A2 = Specific Device Code
= Date Code
Symbol
Max
Unit
D
Total Device Dissipation
T = 25°C
A
P
357
(Note 1)
2.9
mW
D
Derate above 25°C
mW/°C
°C/W
(Note 1)
ORDERING INFORMATION
Thermal Resistance
Junction-to-Ambient
R
350
(Note 1)
q
JA
Device
Package
Shipping
NST3906DXV6T1 SOT-563
4 mm pitch
4000/Tape & Reel
Characteristic
(Both Junctions Heated)
Symbol
Max
Unit
NST3906DXV6T5 SOT-563
2 mm pitch
8000/Tape & Reel
Total Device Dissipation
T = 25°C
A
P
500
(Note 1)
4.0
mW
D
Derate above 25°C
mW/°C
°C/W
°C
(Note 1)
Thermal Resistance
Junction-to-Ambient
R
250
(Note 1)
q
JA
Junction and Storage
Temperature Range
T , T
J
- 55 to +150
stg
1. FR-4 @ Minimum Pad
Semiconductor Components Industries, LLC, 2003
1
Publication Order Number:
March, 2003 - Rev. 0
NST3906DXV6T1/D
NST3906DXV6T1, NST3906DXV6T5
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
Characteristic
Symbol
Min
Max
Unit
OFF CHARACTERISTICS
Collector- Emitter Breakdown Voltage (Note 2)
Collector- Base Breakdown Voltage
Emitter- Base Breakdown Voltage
Base Cutoff Current
V
-40
-40
-5.0
-
-
-
Vdc
Vdc
(BR)CEO
(BR)CBO
(BR)EBO
V
V
-
Vdc
I
BL
-50
-50
nAdc
nAdc
Collector Cutoff Current
I
-
CEX
ON CHARACTERISTICS (Note 2)
DC Current Gain
h
FE
-
(I = -0.1 mAdc, V = -1.0 Vdc)
60
80
-
-
C
CE
(I = -1.0 mAdc, V = -1.0 Vdc)
C
CE
(I = -10 mAdc, V = -1.0 Vdc)
100
60
30
300
-
-
C
CE
(I = -50 mAdc, V = -1.0 Vdc)
C
CE
(I = -100 mAdc, V = -1.0 Vdc)
C
CE
Collector- Emitter Saturation Voltage
(I = -10 mAdc, I = -1.0 mAdc)
V
Vdc
Vdc
CE(sat)
-
-
-0.25
-0.4
C
B
(I = -50 mAdc, I = -5.0 mAdc)
C
B
Base- Emitter Saturation Voltage
(I = -10 mAdc, I = -1.0 mAdc)
V
BE(sat)
-0.65
-
-0.85
-0.95
C
B
(I = -50 mAdc, I = -5.0 mAdc)
C
B
SMALL- SIGNAL CHARACTERISTICS
Current- Gain - Bandwidth Product
Output Capacitance
f
250
-
MHz
pF
T
C
-
-
4.5
10.0
12
obo
Input Capacitance
C
pF
ibo
Input Impedance
h
2.0
k Ω
ie
re
fe
(V = -10 Vdc, I = -1.0 mAdc, f = 1.0 kHz)
CE
C
- 4
Voltage Feedback Ratio
(V = -10 Vdc, I = -1.0 mAdc, f = 1.0 kHz)
h
h
0.1
100
3.0
-
10
400
60
X 10
CE
C
Small- Signal Current Gain
-
(V = -10 Vdc, I = -1.0 mAdc, f = 1.0 kHz)
CE
C
Output Admittance
h
oe
mmhos
dB
(V = -10 Vdc, I = -1.0 mAdc, f = 1.0 kHz)
CE
C
Noise Figure
NF
4.0
(V = -5.0 Vdc, I = -100 mAdc, R = 1.0 k Ω, f = 1.0 kHz)
CE
C
S
SWITCHING CHARACTERISTICS
Delay Time
Rise Time
Storage Time
Fall Time
(V
= -3.0 Vdc, V = 0.5 Vdc)
t
t
-
-
-
-
35
35
CC
BE
d
ns
ns
(I = -10 mAdc, I = -1.0 mAdc)
C
t
r
B1
(V
CC
= -3.0 Vdc, I = -10 mAdc)
225
75
C
s
(I = I = -1.0 mAdc)
B1
t
f
B2
2. Pulse Test: Pulse Width ≤ 300 µs; Duty Cycle ≤ 2.0%.
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2
NST3906DXV6T1, NST3906DXV6T5
3 V
3 V
< 1 ns
+9.1 V
275
275
< 1 ns
+0.5 V
10 k
10 k
0
C < 4 pF*
s
C < 4 pF*
s
1N916
10.6 V
300 ns
10 < t < 500 ms
1
t
1
10.9 V
DUTY CYCLE = 2%
DUTY CYCLE = 2%
* Total shunt capacitance of test jig and connectors
Figure 1. Delay and Rise Time
Equivalent Test Circuit
Figure 2. Storage and Fall Time
Equivalent Test Circuit
TYPICAL TRANSIENT CHARACTERISTICS
10
7.0
C
obo
5.0
C
ibo
3.0
2.0
1.0
0.1
0.2 0.3 0.5 0.7 1.0
2.0 3.0 5.0 7.0 10
20 30 40
REVERSE BIAS (VOLTS)
Figure 3. Capacitance
T = 25°C
J
T = 125°C
J
500
500
I /I = 10
C B
V
= 40 V
CC
300
200
300
200
I = I
B1 B2
I /I = 20
C B
100
70
100
70
t @ V = 3.0 V
r CC
50
50
15 V
30
30
20
I /I = 10
C B
20
40 V
10
10
2.0 V
7
5
7
5
t @ V = 0 V
OB
d
1.0
2.0 3.0 5.0 7.0 10
20 30 50 70 100
200
200
1.0
2.0 3.0 5.0 7.0 10
20 30 50
70 100
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 5. Fall Time
Figure 4. Turn- On Time
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3
NST3906DXV6T1, NST3906DXV6T5
TYPICAL AUDIO SMALL-SIGNAL CHARACTERISTICS
NOISE FIGURE VARIATIONS
(VCE = -5.0 Vdc, TA = 25°C, Bandwidth = 1.0 Hz)
5.0
4.0
3.0
2.0
1.0
0
12
SOURCE RESISTANCE = 200 W
= 1.0 mA
f = 1.0 kHz
I
= 1.0 mA
C
I
C
10
8
I
C
= 0.5 mA
SOURCE RESISTANCE = 200 W
= 0.5 mA
I
C
SOURCE RESISTANCE = 2.0 k
= 50 mA
6
I
C
4
I
= 50 mA
C
SOURCE RESISTANCE = 2.0 k
= 100 mA
I
= 100 mA
C
2
I
C
0
0.1 0.2
0.4
1.0 2.0 4.0
10
20
40
100
0.1 0.2
0.4
1.0 2.0
4.0
10
20
40
100
f, FREQUENCY (kHz)
R , SOURCE RESISTANCE (k OHMS)
g
Figure 6.
Figure 7.
h PARAMETERS
(VCE = -10 Vdc, f = 1.0 kHz, TA = 25°C)
300
200
100
70
50
30
20
100
70
10
7
50
30
5
0.1
0.2 0.3
0.5 0.7 1.0
2.0 3.0
5.0 7.0 10
0.1
0.2 0.3
0.5 0.7 1.0
2.0 3.0
5.0 7.0 10
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 8. Current Gain
Figure 9. Output Admittance
20
10
10
7.0
5.0
7.0
5.0
3.0
2.0
3.0
2.0
1.0
0.7
0.5
1.0
0.7
0.5
0.3
0.2
0.1
0.2 0.3
0.5 0.7 1.0
2.0 3.0
5.0 7.0 10
0.1
0.2 0.3
0.5 0.7 1.0
2.0 3.0
5.0 7.0 10
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 10. Input Impedance
Figure 11. Voltage Feedback Ratio
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4
NST3906DXV6T1, NST3906DXV6T5
TYPICAL STATIC CHARACTERISTICS
2.0
1.0
T = +125°C
J
V
CE
= 1.0 V
+25°C
−ꢀ55°C
0.7
0.5
0.3
0.2
0.1
0.1
0.2
0.3
0.5 0.7
1.0
2.0
3.0
5.0 7.0 10
20
30
50
70 100
200
I , COLLECTOR CURRENT (mA)
C
Figure 12. DC Current Gain
1.0
0.8
0.6
0.4
T = 25°C
J
I
C
= 1.0 mA
10 mA
30 mA
100 mA
0.2
0
0.01
0.02
0.03
0.05 0.07 0.1
0.2
0.3
0.5
0.7
1.0
2.0
3.0
5.0
7.0
10
I , BASE CURRENT (mA)
B
Figure 13. Collector Saturation Region
1.0
0.8
0.6
1.0
T = 25°C
J
V
@ I /I = 10
BE(sat) C B
0.5
0
+25°C TO +125°C
−ꢀ55°C TO +25°C
q
FOR V
CE(sat)
VC
V
BE
@ V = 1.0 V
CE
−ꢀ0.5
−ꢀ1.0
+25°C TO +125°C
−ꢀ55°C TO +25°C
0.4
0.2
0
V
@ I /I = 10
C B
CE(sat)
q
FOR V
BE(sat)
VB
−ꢀ1.5
−ꢀ2.0
1.0
2.0 5.0
10
20
50
100
200
0
20
40
60
80 100 120 140 160 180 200
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 14. “ON” Voltages
Figure 15. Temperature Coefficients
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5
NST3906DXV6T1, NST3906DXV6T5
INFORMATION FOR USING THE SOT-563 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the
total design. The footprint for the semiconductor packages
must be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.3
1.0
0.45
1.35
0.5
0.5
Dimensions in mm
SOT-563
SOT-563 POWER DISSIPATION
SOLDERING PRECAUTIONS
The power dissipation of the SOT-563 is a function of
the pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipa-
tion. Power dissipation for a surface mount device is deter-
The melting temperature of solder is higher than the
rated temperature of the device. When the entire device is
heated to a high temperature, failure to complete soldering
within a short time could result in device failure. There-
fore, the following items should always be observed in
order to minimize the thermal stress to which the devices
are subjected.
mined by T , the maximum rated junction temperature
J(max)
of the die, R , the thermal resistance from the device
θJA
junction to ambient, and the operating temperature, T .
A
Using the values provided on the data sheet for the
SOT-563 package, P can be calculated as follows:
• Always preheat the device.
D
• The delta temperature between the preheat and
soldering should be 100°C or less.*
TJ(max) - TA
PD
=
Rθ
JA
• When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering
method, the difference shall be a maximum of 10°C.
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values
into the equation for an ambient temperature T of 25°C,
A
one can calculate the power dissipation of the device which
in this case is 150 milliwatts.
• The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
150°C - 25°C
833°C/W
PD
=
= 150 milliwatts
• When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
The 833°C/W for the SOT-563 package assumes the use
of the recommended footprint on a glass epoxy printed
circuit board to achieve a power dissipation of 150 milli-
watts. There are other alternatives to achieving higher
power dissipation from the SOT-563 package. Another
alternative would be to use a ceramic substrate or an
aluminum core board such as Thermal Clad . Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
• After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
• Mechanical stress or shock should not be applied
during cooling.
* Soldering a device without preheating can cause exces-
sive thermal shock and stress which can result in damage
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6
NST3906DXV6T1, NST3906DXV6T5
PACKAGE DIMENSIONS
SOT-563, 6 LEAD
CASE 463A-01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
A
C
-X-
K
6
5
2
4
3
MILLIMETERS
DIM MIN MAX
INCHES
B
-Y-
MIN
MAX
0.067
0.051
0.024
0.011
S
A
B
C
D
G
J
1.50
1.10
0.50
0.17
1.70 0.059
1.30 0.043
0.60 0.020
0.27 0.007
1
0.50 BSC
0.020 BSC
D 56 PL
J
0.08
0.10
1.50
0.18 0.003
0.30 0.004
1.70 0.059
0.007
0.012
0.067
G
M
0.08 (0.003)
X Y
K
S
STYLE 1:
PIN 1. EMITTER 1
2. BASE 1
STYLE 2:
STYLE 3:
PIN 1. CATHODE 1
2. CATHODE 1
STYLE 4:
PIN 1. EMITTER 1
2. EMITTER2
3. BASE 2
4. COLLECTOR 2
5. BASE 1
6. COLLECTOR 1
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
4. EMITTER
5. COLLECTOR
6. COLLECTOR
3. COLLECTOR 2
4. EMITTER 2
5. BASE 2
3. ANODE/ANODE 2
4. CATHODE 2
5. CATHODE 2
6. COLLECTOR 1
6. ANODE/ANODE 1
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7
NST3906DXV6T1, NST3906DXV6T5
Thermal Clad is a registered trademark of the Bergquist Company.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make
changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all
liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
Literature Fulfillment:
JAPAN: ON Semiconductor, Japan Customer Focus Center
2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051
Phone: 81-3-5773-3850
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada
Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada
Email: ONlit@hibbertco.com
ON Semiconductor Website: http://onsemi.com
For additional information, please contact your local
Sales Representative.
N. American Technical Support: 800-282-9855 Toll Free USA/Canada
NST3906DXV6T1/D
相关型号:
NSVT489AMT1G
High Current Surface Mount NPN Silicon Low VCE(sat) Switching Transistor for Load Management in Portable Applications
ONSEMI
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