MC44603PG [ROCHESTER]
0.75 A SWITCHING CONTROLLER, 250 kHz SWITCHING FREQ-MAX, PDIP16, PLASTIC, DIP-16;型号: | MC44603PG |
厂家: | Rochester Electronics |
描述: | 0.75 A SWITCHING CONTROLLER, 250 kHz SWITCHING FREQ-MAX, PDIP16, PLASTIC, DIP-16 开关 光电二极管 |
文件: | 总22页 (文件大小:1045K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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Fixed Frequency, Variable Frequency,
Standby Mode
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MARKING
The MC44603A is an enhanced high performance controller that is
specifically designed for off−line and dc−to−dc converter applications.
This device has the unique ability of automatically changing operating
modes if the converter output is overloaded, unloaded, or shorted,
offering the designer additional protection for increased system
reliability. The MC44603A has several distinguishing features when
compared to conventional SMPS controllers. These features consist of
a foldback facility for overload protection, a standby mode when the
converter output is slightly loaded, a demagnetization detection for
reduced switching stresses on transistor and diodes, and a high current
totem pole output ideally suited for driving a power MOSFET. It can
also be used for driving a bipolar transistor in low power converters
(< 150 W). It is optimized to operate in discontinuous mode but can
also operate in continuous mode. Its advanced design allows use in
current mode or voltage mode control applications.
DIAGRAMS
MC44603AP
AWLYYWW
16
1
PDIP−16
P SUFFIX
CASE 648
MC44603ADW
AWLYYWW
16
1
SOIC−16
DW SUFFIX
CASE 751G
Features
• Pb−Free Package is Available*
Current or Voltage Mode Controller
A
= Assembly Location
= Wafer Lot
= Year
• Operation up to 250 kHz Output Switching Frequency
• Inherent Feed Forward Compensation
WL
YY
WW
= Work Week
• Latching PWM for Cycle−by−Cycle Current Limiting
• Oscillator with Precise Frequency Control
High Flexibility
PIN CONNECTIONS
• Externally Programmable Reference Current
• Secondary or Primary Sensing7
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• Synchronization Facility
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• High Current Totem Pole Output
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• Undervoltage Lockout with Hysteresis
Safety/Protection Features
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• Overvoltage Protection Against Open Current and Open Voltage Loop
• Protection Against Short Circuit on Oscillator Pin
• Fully Programmable Foldback
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• Soft−Start Feature
• Accurate Maximum Duty Cycle Setting
• Demagnetization (Zero Current Detection) Protection
• Internally Trimmed Reference
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ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 378 of this data sheet.
• Enhanced Output Drive
GreenLine Controller: Low Power Consumption in Standby Mode
• Low Startup and Operating Current
• Fully Programmable Standby Mode
• Controlled Frequency Reduction in Standby Mode
• Low dV/dT for Low EMI Radiations
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2004
358
Publication Order Number:
February, 2004 − Rev. 3
MC44603A/D
MC44603A
MAXIMUM RATINGS
Rating
Symbol
(I + I )
Value
30
Unit
mA
V
Total Power Supply and Zener Current
CC
Z
Supply Voltage with Respect to Ground (Pin 4)
V
18
C
V
CC
Output Current (Note 1)
Source
mA
I
−750
750
O(Source)
Sink
I
O(Sink)
Output Energy (Capacitive Load per Cycle)
W
5.0
ꢀJ
V
R
F Stby
, C , Soft−Start, R , R
Inputs
V
in
V
in
−0.3 to 5.5
T
ref
P Stby
Foldback Input, Current Sense Input,
E/A Output, Voltage Feedback Input,
Overvoltage Protection, Synchronization Input
V
−0.3 to
V
+ 0.3
CC
Synchronization Input
High State Voltage
V
V
+ 0.3
V
IH
CC
Low State Reverse Current
Demagnetization Detection Input Current
Source
V
−20
mA
mA
IL
I
−4.0
10
demag−ib (Source)
Sink
I
demag−ib (Sink)
Error Amplifier Output Sink Current
Power Dissipation and Thermal Characteristics
P Suffix, Dual−In−Line, Case 648
I
20
mA
E/A (Sink)
Maximum Power Dissipation at T = 85°C
P
0.6
W
A
D
Thermal Resistance, Junction−to−Air
R
ꢁ
JA
100
°C/W
DW Suffix, Surface Mount, Case 751G
Maximum Power Dissipation at T = 85°C
P
0.45
145
150
W
°C/W
°C
A
D
Thermal Resistance, Junction−to−Air
Operating Junction Temperature
R
ꢁ
JA
T
J
Operating Ambient Temperature
T
A
−25 to +85
°C
1. Maximum package power dissipation limits must be observed.
2. ESD data available upon request.
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359
MC44603A
ELECTRICAL CHARACTERISTICS (V and V = 12 V, (Note 3), R = 10 kꢂ, C = 820 pF, for typical values T =
CC
C
ref
T
A
25°C, for min/max values T = −25° to +85°C (Note 4), unless otherwise noted.)
A
Characteristic
OUTPUT SECTION
Symbol
Min
Typ
Max
Unit
Output Voltage (Note 5)
V
Low State (I
Low State (I
= 100 mA)
= 500 mA)
V
−
−
1.0
1.4
1.2
2.0
Sink
Sink
OL
High State (I
High State (I
= 200 mA)
= 500 mA)
V
−
−
1.5
2.0
2.0
2.7
Source
Source
OH
Output Voltage During Initialization Phase
V
V
OL
V
V
V
= 0 to 1.0 V, I
= 1.0 to 5.0 V, I
= 5.0 to 13 V, I
= 10 ꢀA
−
−
−
−
0.1
0.1
1.0
1.0
1.0
CC
CC
CC
Sink
= 100 ꢀA
Sink
Sink
= 1.0 mA
Output Voltage Rising Edge Slew−Rate (C = 1.0 nF, T = 25°C)
dVo/dT
dVo/dT
−
−
300
−
−
V/ꢀs
V/ꢀs
L
J
Output Voltage Falling Edge Slew−Rate (C = 1.0 nF, T = 25°C)
−300
L
J
ERROR AMPLIFIER SECTION
Voltage Feedback Input (V
= 2.5 V)
V
2.42
−2.0
65
2.5
−0.6
70
2.58
−
V
E/A out
FB
Input Bias Current (V = 2.5 V)
I
ꢀA
dB
FB
FB−ib
Open Loop Voltage Gain (V
= 2.0 to 4.0 V)
A
VOL
−
E/A out
ERROR AMPLIFIER SECTION (continued)
Unity Gain Bandwidth
BW
MHz
T = 25°C
−
−
4.0
−
−
J
T = −25° to +85°C
J
5.5
10
Voltage Feedback Input Line Regulation (V = 10 to 15 V)
V
−10
−
mV
mA
CC
FBline−reg
Output Current
Sink (V
= 1.5 V, V = 2.7 V)
I
Sink
2.0
12
−
E/A out
FB
T = −25° to +85°C
A
Source (V
= 5.0 V, V = 2.3 V)
I
Source
−2.0
−
−0.2
E/A out
FB
T = −25° to +85°C
A
Output Voltage Swing
V
High State (I
Low State (I
= 0.5 mA, V = 2.3 V)
V
OH
5.5
6.5
1.0
7.5
1.1
E/A out (source)
FB
= 0.33 mA, V = 2.7 V)
V
OL
−
E/A out (sink)
FB
REFERENCE SECTION
Reference Output Voltage (V = 10 to 15 V)
V
2.4
−500
−40
2.5
−
2.6
V
CC
ref
Reference Current Range (I = V /R , R = 5.0 k to 25 kꢂ)
I
−100
ꢀA
mV
ref
ref ref
ref
Reference Voltage Over I Range
ꢃ
V
−
40
ref
ref
OSCILLATOR AND SYNCHRONIZATION SECTION
Frequency
f
kHz
%/V
OSC
T = 0° to +70°C
A
44.5
44
−
48
−
51.5
52
−
T = −25° to +85°C
A
Frequency Change with Voltage (V = 10 to 15 V)
ꢃ
f
/ꢃ V
OSC
0.05
CC
3. Adjust V above the startup threshold before setting to 12 V.
CC
4. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
5. V must be greater than 5.0 V.
C
6. Standby is disabled for V
< 25 mV typical.
R P Stby
7. If not used, Synchronization input must be connected to Ground.
8. Synchronization Pulse Width must be shorter than t = 1/f
.
OSC
OSC
9. This function can be inhibited by connecting Pin 8 to GND. This allows a continuous current mode operation.
10.This function can be inhibited by connecting Pin 5 to V
.
CC
11. The MC44603A can be shut down by connecting the Soft−Start pin (Pin 11) to Ground.
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360
MC44603A
ELECTRICAL CHARACTERISTICS (continued) (V and V = 12 V, (Note 3), R = 10 kꢂ, C = 820 pF, for typical values T =
CC
C
ref
T
A
25°C, for min/max values T = −25° to +85°C (Note 4), unless otherwise noted.)
A
Characteristic
Symbol
Min
Typ
Max
Unit
OSCILLATOR AND SYNCHRONIZATION SECTION
Frequency Change with Temperature (T = −25° to +85°C)
ꢃ f
/ꢃ T
OSC
−
0.05
1.8
−
%/°C
A
Oscillator Voltage Swing (Peak−to−Peak)
V
1.65
1.95
V
OSC(pp)
Ratio Charge Current/Reference Current
I
/I
−
charge ref
T = 0° to +70°C (V = 2.0 V)
0.375
0.37
78
0.4
−
0.425
0.43
82
A
CT
T = −25° to +85°C
A
Fixed Maximum Duty Cycle = I
/(I
+ I
charge
)
D
80
%
discharge discharge
Ratio Standby Discharge Current versus I
(Note 6)
I
/
disch−Stby
−
R F Stby
T = 0° to +70°C
I
0.46
0.43
2.4
0.53
−
0.6
0.63
2.6
A
R F Stby
T = −25° to +85°C (Note 8)
A
V
(I
= 100 ꢀA)
V
2.5
21
−
V
kHz
ꢀA
V
R F Stby R F Stby
R F Stby
Frequency in Standby Mode (R
Current Range
(Pin 15) = 25 kꢂ)
F
18
24
F Stby
Stby
R F Stby
I
−200
−50
Synchronization Input Threshold Voltage (Note 7)
V
V
3.2
0.45
3.7
0.7
4.3
0.9
inthH
inthL
Synchronization Input Current
I
−5.0
−
−
0
ꢀA
ꢀs
Sync−in
Minimum Synchronization Pulse Width (Note 8)
UNDERVOLTAGE LOCKOUT SECTION
Startup Threshold
t
−
0.5
Sync
V
13.6
14.5
15.4
V
V
stup−th
Output Disable Voltage After Threshold Turn−On (UVLO 1)
V
disable1
disable2
T = 0° to +70°C
A
8.6
8.3
7.0
9.0
−
9.4
9.6
8.0
T = −25° to +85°C
A
Reference Disable Voltage After Threshold Turn−On (UVLO 2)
DEMAGNETIZATION DETECTION SECTION (Note 9)
Demagnetization Detect Input
V
7.5
V
Demagnetization Comparator Threshold (V
Decreasing)
V
50
−
65
0.25
−
80
−
mV
ꢀs
ꢀA
V
Pin 9
demag−th
Propagation Delay (Input to Output, Low to High)
−
Input Bias Current (V
= 65 mV)
I
−0.5
−
−
demag
demag−lb
Negative Clamp Level (I
= −2.0 mA)
C
C
−0.38
0.72
−
demag
L(neg)
Positive Clamp Level (I
= 2.0 mA)
−
−
V
demag
L(pos)
SOFT−START SECTION (Note 11)
Ratio Charge Current/I
I
/I
ss(ch) ref
−
ref
T = 0° to +70°C
0.37
0.36
1.5
0.4
−
0.43
0.44
−
A
T = −25° to +85°C
A
Discharge Current (V
Clamp Level
= 1.0 V)
I
5.0
2.4
mA
V
soft−start
discharge
V
2.2
2.6
ss(CL)
3. Adjust V above the startup threshold before setting to 12 V.
CC
4. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
5. V must be greater than 5.0 V.
C
6. Standby is disabled for V
< 25 mV typical.
R P Stby
7. If not used, Synchronization input must be connected to Ground.
8. Synchronization Pulse Width must be shorter than t = 1/f
.
OSC
OSC
9. This function can be inhibited by connecting Pin 8 to GND. This allows a continuous current mode operation.
10.This function can be inhibited by connecting Pin 5 to V
.
CC
11. The MC44603A can be shut down by connecting the Soft−Start pin (Pin 11) to Ground.
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361
MC44603A
ELECTRICAL CHARACTERISTICS (continued) (V and V = 12 V, (Note 3), R = 10 kꢂ, C = 820 pF, for typical values T =
CC
C
ref
T
A
25°C, for min/max values T = −25° to +85°C (Note 4), unless otherwise noted.)
A
Characteristic
Symbol
Min
Typ
Max
Unit
SOFT−START SECTION (Note 11)
Duty Cycle (R
Duty Cycle (V
= 12 kꢂ)
D
36
−
42
−
49
0
%
soft−start
soft−start (Pin 11)
soft−start 12k
= 0.1 V)
D
soft−start
OVERVOLTAGE SECTION
Protection Threshold Level on V
V
2.42
1.0
2.5
2.58
3.0
V
ꢀs
V
OVP
OVP−th
Propagation Delay (V
> 2.58 V to V Low)
−
OVP
CC
out
Protection Level on V
V
CC prot
T = 0° to +70°C
16.1
15.9
17
17.9
18.1
A
T = −25° to +85°C
A
−
Input Resistance
−
kꢂ
T = 0° to +70°C
1.5
1.4
2.0
3.0
3.4
A
T = −25° to +85°C
A
−
FOLDBACK SECTION (Note 10)
Current Sense Voltage Threshold (V
= 0.9 V)
V
0.86
0.89
0.9
V
foldback (Pin 5)
CS−th
Foldback Input Bias Current (V
= 0 V)
I
−6.0
−2.0
−
ꢀ
A
foldback (Pin 5)
foldback−lb
STANDBY SECTION
Ratio I
/I
I
/I
R P Stby ref
−
−
R P Stby ref
T = 0° to +70°C
A
0.37
0.36
0.4
0.43
0.44
T = −25° to +85°C
A
−
Ratio Hysteresis (V Required to Return to Normal Operation from Standby
V /V
h R P Stby
h
Operation)
T = 0° to +70°C
1.42
1.4
1.5
−
1.58
1.6
A
T = −25° to +85°C
A
Current Sense Voltage Threshold (V
= 1.0 V)
V
0.28
0.31
0.34
V
V
R P Stby (Pin 12)
CS−Stby
CURRENT SENSE SECTION
Maximum Current Sense Input Threshold
(V = 2.3 V and V
V
0.96
1.0
1.04
CS−th
= 1.2 V)
foldback (Pin 6)
feedback (Pin 14)
Input Bias Current
I
−10
−2.0
−
ꢀ
A
CS−ib
Propagation Delay (Current Sense Input to Output at V of
−
−
120
200
ns
TH
MOS transistor = 3.0 V)
TOTAL DEVICE
Power Supply Current
I
mA
CC
Startup (V = 13 V with V Increasing)
−
13
0.3
17
−
0.45
20
−
CC
CC
Operating T = −25° to +85°C (Note 3)
A
Power Supply Zener Voltage (I = 25 mA)
V
18.5
−
V
CC
Z
Thermal Shutdown
−
155
−
°C
3. Adjust V above the startup threshold before setting to 12 V.
CC
4. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
5. V must be greater than 5.0 V.
C
6. Standby is disabled for V
< 25 mV typical.
R P Stby
7. If not used, Synchronization input must be connected to Ground.
8. Synchronization Pulse Width must be shorter than t = 1/f
.
OSC
OSC
9. This function can be inhibited by connecting Pin 8 to GND. This allows a continuous current mode operation.
10.This function can be inhibited by connecting Pin 5 to V
.
CC
11. The MC44603A can be shut down by connecting the Soft−Start pin (Pin 11) to Ground.
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362
MC44603A
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ꢢ ꢚ ꢖꢥ ꢛ
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ꢂ ꢀ ꢁ ꢎ
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ꢢ ꢚ ꢖꢥ ꢛ
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ꢼꢎ ꢻ ꢔ ꢅ
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ꢡ ꢐ ꢬꢦ ꢩ
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ꢀ ꢉꢶ ꢆ ꢎ
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ꢡ ꢐ ꢬꢦ ꢩ ꢔꢕ ꢖ
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ꢣꢌ ꢝꢧ
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ꢄꢶ ꢈ ꢎ
ꢚꢛꢜ ꢝ
ꢞꢜ ꢍ ꢕꢖ
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ꢘ ꢐ ꢙ
ꢋ
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ꢵ
ꢋ
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ꢦ
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ꢘ
ꢬ
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ꢎ
ꢘ ꢐ ꢙ
ꢞ
ꢘ ꢐ ꢙ
ꢞ
ꢢ ꢚ ꢖꢥ ꢛ
ꢎ
ꢆ
ꢶ
ꢃ
ꢞ
ꢔ
ꢚ
ꢓ
ꢍ
ꢘ
ꢌ
ꢖ
ꢆ
ꢶ
ꢈ
ꢎ
ꢘ
ꢐ
ꢙ
ꢀ
ꢶ
ꢆ
ꢎ
ꢗ
ꢎ
ꢓ
ꢹ
ꢀ
ꢶ
ꢁ
ꢎ
ꢚ
ꢅ
ꢓ
ꢋ
ꢗ
ꢚ
ꢹ
ꢀ
ꢆ
ꢵ
ꢎ
ꢔ
ꢚ
ꢓ
ꢔ
ꢕ
ꢖ
ꢍ
ꢕ
ꢖ
ꢓ
ꢄ
ꢶ
ꢁ
ꢎ
ꢋ
ꢚ
ꢄ
ꢹ
ꢗ
ꢃ
ꢎ
ꢔ
ꢎ
ꢪ
ꢋ
ꢷ
ꢕ
ꢐ
ꢘ
ꢬ
ꢦ
ꢣ
ꢜ
ꢔ
ꢕ
ꢖ
ꢅ ꢶ ꢆ ꢀꢫ
ꢡꢐ ꢣꢦ ꢛ
ꢟ
ꢠ
ꢡ
ꢆ
ꢶ
ꢃ
ꢞ
ꢘ ꢐ ꢙ
ꢞ
ꢚ
ꢷ
ꢖ
ꢤ
ꢌ
ꢑ
ꢡ
ꢏ
ꢫ
ꢝ
ꢷ
ꢦ
ꢘ
ꢩ
ꢐ
ꢎ
ꢘ ꢐ ꢙ
ꢎ
ꢓ
ꢓ
ꢎ
ꢘ ꢐ ꢙ
ꢎ
ꢘ ꢐ ꢙ
ꢎ
ꢘ ꢐ ꢙ
ꢎ
ꢘ ꢐ ꢙ
ꢎ
ꢘ ꢐ ꢙ
ꢎ
ꢘ ꢐ ꢙ
ꢆ
ꢶ
ꢅ
ꢂ
ꢎ
ꢘ ꢐ ꢙ
ꢆꢶ ꢉ ꢞ
ꢘ ꢐ ꢙ
ꢆ
ꢶ
ꢁ
ꢞ
ꢘ ꢐ ꢙ
ꢞ
ꢢ
ꢚ
ꢖ
ꢥ
ꢛ
ꢆ ꢶꢃ ꢞ
ꢘ ꢐ ꢙ
ꢆ
ꢶ
ꢅ
ꢞ
ꢆ
ꢶ
ꢃ
ꢞ
ꢘ
ꢐ
ꢙ
ꢘ
ꢐ
ꢙ
ꢀ
ꢀ
ꢶ
ꢁ
ꢧ
ꢂ
ꢶ
ꢆ
ꢀ
ꢫ
ꢗ
ꢪ
ꢑ
ꢘ
ꢚ
ꢖ
ꢥ
ꢛ
ꢔ
ꢎ
ꢪ
ꢡ
ꢐ
ꢣ
ꢦ
ꢛ
ꢀ
ꢅ
ꢁ
ꢅ
ꢶ
ꢆ
ꢧ
ꢎ
ꢓ
ꢓ
ꢗ
ꢔ
ꢎ
ꢪ
ꢞ
ꢵ
ꢡꢏ ꢫꢝꢷ ꢦ ꢘ ꢩ ꢐ ꢱꢅ
ꢢ ꢐꢐ ꢤꢰ
ꢀ
ꢶ ꢆ ꢬ ꢯ
ꢓ
ꢕ
ꢘꢘ
ꢐ
ꢜꢖ
ꢳ
ꢏ
ꢘꢘ
ꢌ
ꢘ
ꢸ
ꢅ
ꢵ
ꢥ
ꢦꢝ
ꢧ
ꢅ ꢶꢂ ꢎ
ꢅ
ꢗ
ꢀ
ꢶ
ꢁ
ꢎ
ꢀ
ꢃ
ꢵ
ꢮ
ꢘ
ꢘ
ꢌ
ꢘ
ꢯ
ꢬꢍ
ꢣꢏ
ꢙ
ꢏꢐ
ꢘ
ꢓꢕ ꢘꢘ ꢐ ꢜꢖ
ꢚ ꢐꢜ ꢫꢐ ꢞꢜ ꢍ ꢕ ꢖ
ꢅ ꢶꢂ ꢎ
ꢓ
ꢌ
ꢬ
ꢍ
ꢦ
ꢐ
ꢜ
ꢜ
ꢫ
ꢖ
ꢏ
ꢌ
ꢈ
ꢀ
ꢄ
ꢗ
ꢀ
ꢶ
ꢆ
ꢎ
ꢼ
ꢎ
ꢻ
ꢔ
ꢀ
ꢂ
ꢎ
ꢢ
ꢌ
ꢣ
ꢤ
ꢥ
ꢦ
ꢝ
ꢧ
ꢓ
ꢓ
ꢅ
ꢶ
ꢃ
ꢎ
ꢂ
ꢶ
ꢆ
ꢬ
ꢯ
ꢞ
ꢜ
ꢍ
ꢕ
ꢖ
ꢵ
ꢇ
ꢶ
ꢆ
ꢎ
ꢀ
ꢀ
ꢚ
ꢚ
ꢱ
ꢡ
ꢱ ꢎ ꢳ
ꢬ ꢦ ꢲ
ꢺ
ꢺ
ꢚ
ꢪ
ꢏ
ꢜ
ꢧ
ꢌ
ꢜ
ꢣ
ꢛ
ꢗ
ꢓ
ꢚ ꢚ
ꢌ
ꢫ
ꢏ
ꢖ
ꢏ
ꢨ
ꢐ
ꢋ
ꢘ
ꢕ
ꢐ
ꢻ
ꢌ
ꢩ
ꢏ
ꢝ
ꢚ
ꢚ
This device contains 243 active transistors.
Figure 1. Representative Block Diagram
http://onsemi.com
363
MC44603A
ꢀ
ꢆꢆ
ꢀ
ꢆꢆ
ꢆ
ꢆ
ꢓ
ꢺ
ꢀ
ꢆ
ꢆ
ꢍ
ꢢ
ꢋ
ꢎ
ꢋ
ꢺ
ꢅ
ꢀ
ꢂ°
ꢁ
ꢓ
ꢎ
ꢎ
ꢋ
ꢗ
ꢺ
ꢅ
ꢺ ꢀ ꢆ ꢧ
ꢀ ꢁ ꢎ
ꢂ °ꢓ
ꢓꢓ
ꢓ ꢓ
ꢺ
ꢺ
ꢯ
ꢯ
ꢓ
ꢺ ꢂꢆ ꢆ ꢍꢢ
ꢋ
ꢘ ꢐ ꢙ
ꢗ
ꢺ ꢅ ꢶꢆ ꢧ
ꢢ ꢚ ꢖꢥ ꢛ
ꢓ
ꢺ ꢀꢆ ꢆꢆ ꢍꢢ
ꢋ
ꢗ
ꢺ
ꢂ
ꢶ
ꢆ
ꢧ
ꢢ ꢚ ꢖꢥ ꢛ
ꢀ
ꢆ
ꢆ
ꢀ
ꢆ
ꢆ
ꢆ
ꢆ
ꢗ
ꢺ
ꢅ
ꢈ
ꢧ
ꢢ
ꢚ
ꢖ
ꢥ
ꢛ
ꢗ
ꢺ
ꢀ
ꢆ
ꢆ
ꢧ
ꢢ
ꢚ
ꢖ
ꢥ
ꢛ
ꢓ
ꢺ
ꢅ
ꢅ
ꢆ
ꢆ
ꢍ
ꢢ
ꢋ
ꢄ
ꢶ
ꢄ
ꢆ
ꢀ
ꢆ
ꢽ
ꢧ
ꢀ
ꢆ
ꢘ
ꢆ
ꢽ
ꢧ
ꢀ
ꢶ
ꢆ
ꢽ
ꢳ
ꢀ
ꢆ
ꢽ
ꢧ
ꢀ
ꢆ
ꢆ
ꢽ
ꢧ
ꢀ
ꢶ
ꢆ
ꢽ
ꢳ
ꢙ
ꢾ
ꢔ
ꢫ
ꢝ
ꢏ
ꢣ
ꢣ
ꢦ
ꢖ
ꢌ
ꢢ
ꢘ
ꢐ
ꢭ
ꢕ
ꢐ
ꢜ
ꢝ
ꢛ
ꢊ
ꢿ
ꣀ
ꢒ
ꢙ ꢾ ꢔ
ꢔꢚ ꢓ
ꢫ
ꢝ
ꢏ
ꢣ
ꢣ
ꢦ
ꢖ
ꢌ
ꢘ
ꢢ
ꢘ
ꢐ
ꢭ
ꢕ
ꢐ
ꢜ
ꢝ
ꢛ
ꢊ
ꢿ
ꣀ
ꢒ
ꢔ
ꢚ
ꢓ
Figure 2. Timing Resistor versus
Oscillator Frequency
Figure 3. Standby Mode Timing Capacitor
versus Oscillator Frequency
ꢂ
ꢂ
ꢂ
ꢃ
ꢃ
ꢅ
ꢆ
ꢆ
ꢆ
ꢆ
ꢆ
ꢶ
ꢶ
ꢶ
ꢶ
ꢶ
ꢃ
ꢃ
ꢃ
ꢃ
ꢄ
ꢄ
ꢅ
ꢀ
ꢆ
ꢇ
ꢀ
ꢆ
ꢇ
ꢉ
ꢈ
ꢁ
ꢂ
ꢃ
ꢃ
ꢃ
ꢎ
ꢗ
ꢓ
ꢺ
ꢺ
ꢉ
ꢀ
ꢅ
ꢎ
ꢧ
ꢎ
ꢺ
ꢓ ꢓ
ꢀ
ꢅ
ꢎ
ꢓ
ꢓ
ꢆ
ꢆ
ꢶ
ꢶ
ꢄ
ꢉ
ꢈ
ꢀ
ꢆ
ꢗ
ꢓ
ꢺ
ꢀ
ꢅ
ꢆ
ꢆ
ꢧ
ꢍ
ꢘ
ꢐ
ꢙ
ꢘ
ꢐ
ꢙ
ꢺ
ꢅ
ꢆ
ꢍ
ꢢ
ꢺ
ꢋ
ꢉ
ꢢ
ꢋ
ꢃ
ꢃ
ꢄ
ꢰ
ꢂ
ꢆ
ꢰ
ꢅ
ꢂ
ꢆ
ꢅ
ꢂ
ꢂ
ꢆ
ꢈ
ꢂ
ꢀ
ꢆ
ꢆ
ꢰ
ꢂ
ꢆ
ꢰ
ꢅ
ꢂ
ꢆ
ꢅ
ꢂ
ꢂ
ꢆ
ꢈ
ꢂ
ꢀ
ꢆ
ꢆ
ꢋ
ꢯ
ꢾ
ꢯ
ꢳ
ꢴ
ꢞ
ꢮ
ꢠ
ꢋ
ꢋ
ꢮ
ꢳ
ꢪ
ꢮ
ꢗ
ꢯ
ꢋ
ꢼ
ꢗ
ꢮ
ꢊ
°
ꢓ
ꢒ
ꢋ
ꢯ
ꢾ
ꢯ
ꢳ
ꢴ
ꢞ
ꢮ
ꢠ
ꢋ
ꢋ
ꢮ
ꢳ
ꢪ
ꢮ
ꢗ
ꢯ
ꢋ
ꢼ
ꢗ
ꢮ
ꢊ
°
ꢓ
ꢒ
Figure 4. Oscillator Frequency
versus Temperature
Figure 5. Ratio Charge Current/Reference
Current versus Temperature
ꢁ
ꢃ
ꢅ
ꢆ
ꢆ
ꢈ
ꢁ
ꢂ
ꢃ
ꢄ
ꢆ
ꢆ
ꢆ
ꢆ
ꢆ
ꢈ
ꢁ
ꢂ
ꢃ
ꢄ
ꢆ
ꢆ
ꢆ
ꢆ
ꢆ
ꢄ
ꢆ
ꢆ
ꢆ
ꢎ
ꢺ
ꢅ
ꢅ
ꢀ
ꢅ
ꢆ
ꢓ
ꢎ
ꢍ
ꢎ
ꢺ ꢀ ꢅ ꢎ
ꢓ ꢓ
ꢓ
ꢓ
ꢆ
ꢆ
ꢆ
ꢆ
ꢆ
ꢅ
ꢀ
ꢆ
ꢰ
ꢰ
ꢰ
ꢰ
ꢓ
ꢋ
ꢺ
ꢺ
ꢅ
ꢆ
ꢢ
ꢓ
ꢋ
ꢺ
ꢺ
ꢅ ꢅꢆ ꢆ ꢍ ꢢ
ꢅ ꢂ°ꢓ
ꢻ
ꢻ
ꢂ
°
ꢯ
ꢯ
ꢆ
ꢓꢕ ꢘꢘꢐ ꢜꢖ
ꢓꢕ ꢘ ꢘꢐ ꢜꢖ
ꢰ
ꢅꢆ
ꢀ
ꢅ
ꢄ
ꢃ
ꢰ
ꢰ
ꢰ
ꢀ
ꢃꢆ
ꢁꢆ
ꢉꢆ
ꢆ ꢆ
ꢆ
ꢆ
ꢆ
ꢆ
ꢅ
ꢀ
ꢆ
ꢆ
ꢅ
ꢀ
ꢆ
ꢆ
ꢎꢌꢣ ꢖ ꢦꢩꢐ
ꢎ
ꢔ
ꢎꢌ ꢣꢖ ꢦꢩ ꢐ
ꢆ
ꢰ
ꢆ
ꢆ
ꢞ
ꢓ ꢓ
ꢀ
ꢆ
ꢰ
ꢀ
ꢰ
ꢰꢂ
ꢀ
ꢶ
ꢆ ꢀꢫ
ꢱ
ꢡꢏ
ꢨ
ꢀ ꢶꢆ ꢀꢫꢱ ꢡꢏꢨ
Figure 6. Output Waveform
Figure 7. Output Cross Conduction
http://onsemi.com
364
MC44603A
ꢂ
ꢃ
ꢃ
ꢃ
ꢃ
ꢆꢆ
ꢈꢂ
ꢂꢆ
ꢅꢂ
ꢆꢆ
ꢅ
ꢅ
ꢶ
ꢂ
ꢆ
ꢶ
ꢀ
ꢀ
ꢶ
ꢂ
ꢆ
ꢄ
ꢄ
ꢄ
ꢈꢂ
ꢂꢆ
ꢅꢂ
ꢎ
ꢗ
ꢓ
ꢺ
ꢺ
ꢉ
ꢀ
ꢅ
ꢎ
ꢧ
ꢎ
ꢺ
ꢓ ꢓ
ꢀ
ꢅ
ꢎ
ꢧ
ꢓꢓ
ꢀ
ꢆ
ꢗ
ꢓ
ꢋ
ꢺ
ꢀ
ꢆ
ꢘ ꢐ ꢙ
ꢘ ꢐ ꢙ
ꢺ
ꢅꢆ
ꢍ
ꢢ
ꢺ
ꢋ
ꢉ
ꢅ
ꢆ
ꢍ
ꢢ
ꢋ
ꢶ
ꢺ ꢅ ꢂ °ꢓ
ꢯ
ꢄ ꢆꢆ
ꢰ
ꢂꢆ
ꢰ
ꢅꢂ
ꢆ
ꢅ
ꢂ
ꢂ
ꢆ
ꢈ
ꢂ
ꢀ
ꢆꢆ
ꢆ
ꢀ
ꢞ
ꢆ
ꢆ
ꢅ
ꢆ
ꢆ
ꢄ
ꢆ
ꢆ
ꢃ
ꢆ
ꢆ
ꢂ ꢆ ꢆ
ꢋ
ꢯ
ꢾ
ꢯ
ꢳ
ꢴ
ꢞꢮ
ꢠꢋ
ꢋ
ꢮ
ꢳ
ꢪ
ꢮ
ꢗ
ꢯꢋ
ꢼ
ꢗ
ꢮ
ꢊ°
ꢓ
ꢒ
ꢾ ꢔ
ꢫꢌ ꢕ ꢘ ꢝꢐ
ꢼ
ꢋ
ꢪ
ꢼ
ꢋ
ꢚ
ꢔ
ꢼ
ꢗ
ꢓ
ꢮ
ꢓ
ꢼ
ꢗ
ꢗ
ꢮ
ꢠ
ꢋ
ꢊ
ꢬ
ꢯ
ꢒ
Figure 8. Oscillator Discharge Current
versus Temperature
Figure 9. Source Output Saturation Voltage
versus Load Current
ꢅ
ꢀ
ꢶ
ꢆ
ꢉ
ꢁ
ꢆ
ꢆ
ꢎ
ꢺ
ꢀ
ꢅ
ꢎ
ꢓ ꢓ
ꢚ
ꢏ
ꢌ
ꢜ
ꢦ
ꢧ
ꢚꢦ ꢖꢕ ꢘꢦꢖ ꢏ ꢌꢜ
ꢟ
ꢺ
ꢀ
ꢆ
ꢊ
ꢻ
ꢤ
ꢖ
ꢌ
ꢎ
ꢒ
ꢓꢓ
ꢶꢁ
ꢶꢅ
ꢶꢉ
ꢶ
ꢀ ꢃ ꢆ
ꢎ
ꢎ
ꢺ
ꢺ
ꢺ
ꢄ
ꢅ
ꢀ
ꢆ
ꢬ
ꢎ
ꢏ ꢜ
ꢶ
ꢆ
ꢖ
ꢌ
ꢃ
ꢶ
ꢆ
ꢎ
ꢔ
ꢗ
ꢋ
ꢆ
ꢆ
ꢧ
ꢻ
ꢀ
ꢆ
ꢆ
ꢃ
ꢅ
ꢆ
ꢆ
ꢺ
ꢅ
ꢂ
°
ꢓ
ꢯ
ꢂ
ꢆ
ꢋ
ꢎ
ꢺ
ꢅ
ꢺ
ꢫ
ꢂ
°
ꢓ
ꢅ ꢎ
ꢯ
ꢀ
ꢓ
ꢓ
ꢃ
ꢆ
ꢆ
ꢆ
ꢉ
ꢆ
ꢀ
ꢪ
ꢕ
ꢣ
ꢫ
ꢐ
ꢖ ꢐ
ꢤ
ꢻ
ꢌ
ꢦ
ꢤ
ꢀ
ꢅ
ꢆ
ꢿ
ꣀ
ꢗ
ꢦ
ꢰ
ꢅ
ꢰ ꢃ ꢆ
ꢃ
ꢀ ꢆ
ꢆ
ꢀ
ꢅ
ꢄ
ꢆ
ꢀ
ꢆ
ꢆ
ꢅ
ꢆ
ꢆ
ꢄ
ꢆ
ꢆ
ꢃ
ꢆ
ꢆ
ꢂ
ꢆ
ꢆ
ꢀ
ꢆ
ꢀ
ꢆ
ꢀ
ꢆ
ꢀ
ꢆ
ꢞ
ꢾ
ꢚ
ꢞ
ꢠ
ꣂ
ꢔ
ꢼ
ꢋ
ꢪ
ꢼ
ꢋ
ꢓ
ꢼ
ꢗ
ꢗ
ꢮ
ꢠ
ꢋ
ꢊ
ꢬ
ꢯ
ꢒ
ꢙ
ꢾ
ꢢ
ꢗ
ꢮ
ꢹ
ꢼ
ꢮ
ꢠ
ꢓ
ꣁ
ꢊ
ꢧ
ꢿ
ꣀ
ꢒ
ꢫ
ꢏ
ꢜ
ꢧ
Figure 10. Sink Output Saturation Voltage
versus Sink Current
Figure 11. Error Amplifier Gain and Phase
versus Frequency
ꢅ
ꢅ
ꢶ
ꢶ
ꢁ
ꢆ
ꢉ
ꢆ
ꢂ
ꢆ
ꢂ
ꢆ
ꢂ
ꢎ
ꢺ
ꢀ
ꢅ
ꢎ
ꢌ
ꢎ
ꢺ ꢀ ꢅ ꢎ
ꢓ ꢓ
ꢓ
ꢓ
ꢈ
ꢈ
ꢁ
ꢁ
ꢂ
ꢂ
ꢟ ꢺ ꢀꢆ
ꢎ
ꢗ
ꢂ
ꢂ
ꢆ
ꢂ
ꢺ
ꢅ
ꢶ
ꢆ
ꢖ
ꢃ
ꢶ
ꢆ
ꢎ
ꢔ
ꢺ
ꢀ
ꢆ
ꢆ
ꢧ
ꢻ
ꢅ
ꢅ
ꢅ
ꢶ
ꢶ
ꢶ
ꢂ
ꢃ
ꢃ
ꢆ
ꢰ
ꢆ
ꢰ
ꢂ
ꢆ
ꢰ
ꢅ
ꢂ
ꢆ
ꢅ
ꢂ
ꢂ
ꢆ
ꢈ
ꢂ
ꢀ
ꢆ
ꢆ
ꢂ
ꢆ
ꢰ
ꢅ
ꢂ
ꢆ
ꢅ
ꢂ
ꢂ
ꢆ
ꢈ
ꢂ
ꢀ
ꢆ
ꢆ
ꢋ
ꢯ
ꢾ
ꢯ
ꢳ
ꢴ
ꢞ
ꢮ
ꢠ
ꢋ
ꢋ
ꢮ
ꢳ
ꢪ
ꢮ
ꢗ
ꢯ
ꢋ
ꢼ
ꢗ
ꢮ
ꢊ
°
ꢓ
ꢒ
ꢋ
ꢯ
ꢾ
ꢯ
ꢳ
ꢴ
ꢞ
ꢮ
ꢠ
ꢋ
ꢋ
ꢮ
ꢳ
ꢪ
ꢮ
ꢗ
ꢯ
ꢋ
ꢼ
ꢗ
ꢮ
ꢊ
°
ꢓ
ꢒ
Figure 12. Voltage Feedback Input
versus Temperature
Figure 13. Demag Comparator Threshold
versus Temperature
http://onsemi.com
365
MC44603A
ꢀ
ꢆ
ꢆ
ꢂ ꢶꢆ
ꢄ
ꢄ
ꢄ
ꢶ
ꢶ
ꢶ
ꢅ
ꢀ
ꢆ
ꢪ ꢘꢏ ꢜꢖꢐ ꢤ ꢝꢏ ꢘꢝꢕ ꢏꢖ ꢥꢌꢦ ꢘꢤ ꢷꢐꢦ ꢖꢫ ꢏꢜꢧ ꢐꢲ ꢦꢬꢍꢣ ꢐ
ꢉ
ꢁ
ꢆ
ꢃ
ꢄ
ꢅ
ꢶꢆ
ꢅꢶ ꢆ ꢌꣀ
ꢻ
ꢓ ꢌꢍꢍ ꢐꢘ
ꢻ
ꢄꢶ ꢆ ꢬ ꢬ
ꢗ
ꢪ
ꢆ
ꢶ
ꢆ
ꢆ
ꢁ
ꣃꢯ
ꢟ ꢘ ꢦꢍꢷꢫ ꢘ ꢐꢍꢘ ꢐꢫꢐ ꢜꢖ ꢫꢛ ꢬꢬꢐꢖ ꢘ ꢏꢝꢦ ꢣ ꢣꢦ ꢛꢌꢕꢖ
ꢃ
ꢆ
ꢆ
ꢆ
ꢶ
ꢎ
ꢗ
ꢓ
ꢺ
ꢺ
ꢉ
ꢀ
ꢅ
ꢎ
ꢧ
ꢓꢓ
ꢅ
ꢅ
ꢶ
ꢶ
ꢇ
ꢙ
ꢌꢘ ꢋ ꢺ ꢈ ꢆ°ꢓ
ꢯ
ꢡꢊ ꢬ ꢦ ꢲ ꢒ
ꢀ
ꢆ
ꢅ
ꢀ
ꢆ
ꢶꢆ
ꢘ ꢐ ꢙ
ꢺ
ꢅ
ꢆ
ꢍ
ꢢ
ꢋ
ꢉ
ꢰ
ꢂ
ꢆ
ꢰ
ꢅ
ꢂ
ꢆ
ꢅ
ꢂ
ꢂ
ꢆ
ꢈ
ꢂ
ꢀ
ꢆ
ꢆ
ꢆ
ꢀ
ꢆ
ꢅ
ꢆ
ꢄ
ꢆ
ꢃ
ꢆ
ꢂ
ꢆ
ꢋ
ꢯ
ꢾ
ꢯ
ꢳ
ꢴ
ꢞ
ꢮ
ꢠ
ꢋ
ꢋ
ꢮ
ꢳ
ꢪ
ꢮ
ꢗ
ꢯ
ꢋ
ꢼ
ꢗ
ꢮ
ꢊ
°
ꢓ
ꢒ
ꢻ
ꢾ
ꢻ
ꢮ
ꢠ
ꢟ
ꢋ
ꢿ
ꢔ
ꢢ
ꢓ
ꢔ
ꢪ
ꢪ
ꢮ
ꢗ
ꢊ
ꢬ
ꢬ
ꢒ
Figure 14. Current Sense Gain
versus Temperature
Figure 15. Thermal Resistance and Maximum
Power Dissipation versus P.C.B. Copper Length
ꢀ
ꢀ
ꢀ
ꢃ
ꢆ
ꢆ
ꢶ
ꢄ
ꢂ
ꢆ
ꢆ
ꢶ
ꢄ
ꢅ
ꢆ
ꢂ
ꢶ
ꢅ
ꢆ
ꢉ
ꢆ
ꢆ
ꢆ
ꢆ
ꢆ
ꢶꢅ
ꢶꢀ
ꢶꢀ
ꢶꢆ
ꢆ
ꢂ
ꢆ
ꢂ
ꢆ
ꢆ
ꢎ
ꢗ
ꢓ
ꢺ
ꢺ
ꢀ
ꢅ
ꢎ
ꢧ
ꢗ
ꢓ
ꢺ ꢀ ꢆ ꢧ
ꢘ ꢐ ꢙ
ꢓ
ꢓ
ꢀ
ꢆ
ꢺ
ꢉ
ꢅ
ꢆ
ꢍ
ꢢ
ꢘ
ꢐ
ꢙ
ꢋ
ꢺ
ꢉ
ꢅ
ꢆ
ꢍ
ꢢ
ꢋ
ꢆ
ꢰ
ꢂ
ꢆ
ꢰ
ꢅ
ꢂ
ꢆ
ꢅ
ꢂ
ꢂ
ꢆ
ꢈ
ꢂ
ꢀ
ꢆ
ꢆ
ꢆ
ꢅ
ꢶ
ꢆ
ꢃ
ꢶ
ꢆ
ꢁ
ꢶ
ꢆ
ꢉ
ꢶ
ꢆ
ꢀ
ꢆ
ꢀ
ꢅ
ꢀ
ꢃ
ꢋ
ꢯ
ꢾ
ꢯ
ꢳ
ꢴ
ꢞ
ꢮ
ꢠ
ꢋ
ꢋ
ꢮ
ꢳ
ꢪ
ꢮ
ꢗ
ꢯ
ꢋ
ꢼ
ꢗ
ꢮ
ꢊ
°
ꢓ
ꢒ
ꢎ
ꢾ ꢚ
ꢓ ꢓ
ꢼ
ꢪ
ꢪ
ꢻ
ꣁ
ꢎ
ꢔ
ꢻ
ꢋ
ꢯ
ꢟ
ꢮ
ꢊ
ꢎ
ꢒ
Figure 16. Propagation Delay Current Sense
Input to Output versus Temperature
Figure 17. Startup Current versus VCC
ꢅ
ꢀ
ꢶ
ꢂ
ꢀ
ꢀ
ꢀ
ꢀ
ꢁ
ꢃ
ꢅ
ꢆ
ꢅ
ꢅ
ꢀ
ꢶ
ꢶ
ꢆ
ꢂ
ꢆ
ꢂ
ꢆ
ꢉ
ꢶ
ꢶ
ꢶ
ꢶ
ꢆ
ꢆ
ꢆ
ꢆ
ꢆ
ꢅ
ꢀ
ꢀ
ꢆꢶ
ꢇꢶ
ꢇꢶ
ꢋ
ꢗ
ꢓ
ꢎ
ꢎ
ꢺ ꢅ ꢂ °ꢓ
ꢘ ꢐ ꢙ
ꢺ ꢉ ꢅꢆ ꢍꢢ
ꢁ
ꢃ
ꢅ
ꢯ
ꢺ
ꢀ
ꢆ
ꢧ
ꢋ
ꢞ
ꢓ ꢓ
ꢺ
ꢅ
ꢂ
ꢬ
ꢯ
ꢺ
ꢺ
ꢆ
ꢆ
ꢎ
ꢎ
ꢢꢴ
ꢓ ꢚ
ꢆ
ꢰ
ꢅ
ꢶ
ꢆ
ꢃ
ꢶ
ꢆ
ꢁ
ꢶ
ꢆ
ꢉ
ꢶ
ꢆ
ꢀ
ꢆ
ꢀ
ꢅ
ꢀ
ꢃ
ꢀ
ꢁ
ꢂ
ꢆ
ꢰ
ꢅ
ꢂ
ꢆ
ꢅ
ꢂ
ꢂ
ꢆ
ꢈ
ꢂ
ꢀ
ꢆ
ꢆ
ꢎ
ꢾ
ꢚ
ꢼ
ꢪ
ꢪ
ꢻ
ꣁ
ꢎ
ꢔ
ꢻ
ꢋ
ꢯ
ꢟ
ꢮ
ꢊ
ꢎ
ꢒ
ꢋ
ꢯ
ꢾ
ꢯ
ꢳ
ꢴ
ꢞ
ꢮ
ꢠ
ꢋ
ꢋ
ꢮ
ꢳ
ꢪ
ꢮ
ꢗ
ꢯ
ꢋ
ꢼ
ꢗ
ꢮ
ꢊ
°
ꢓ
ꢒ
ꢓ
ꢓ
Figure 18. Supply Current versus
Supply Voltage
Figure 19. Power Supply Zener Voltage
versus Temperature
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MC44603A
ꢀ
ꢀ
ꢂ
ꢶ
ꢶ
ꢂ
ꢆ
ꢂ
ꢆ
ꢇ
ꢶ
ꢂ
ꢆ
ꢂ
ꢆ
ꢂ
ꢂ
ꢇ
ꢶꢅ
ꢀ
ꢀ
ꢀ
ꢃꢶ
ꢃꢶ
ꢄꢶ
ꢇ
ꢉ
ꢉ
ꢶꢆ
ꢶꢂ
ꢶꢂ
ꢎ
ꢞ
ꢜ
ꢝ
ꢘ
ꢐ
ꢦꢫ
ꢏ
ꢜ
ꢩ
ꢎ
ꢡꢐ ꢝꢘ ꢐ ꢦꢫ ꢏꢜ ꢩ
ꢓ ꢓ
ꢓꢓ
ꢂ
ꢰ
ꢆ
ꢰ
ꢂ
ꢆ
ꢰ
ꢅ
ꢂ
ꢆ
ꢅ
ꢂ
ꢂ
ꢆ
ꢈ
ꢂ
ꢀ
ꢆꢆ
ꢂ
ꢆ
ꢰ
ꢅ
ꢂ
ꢆ
ꢅ
ꢂ
ꢂ
ꢆ
ꢈ
ꢂ
ꢀ ꢆ ꢆ
ꢋ
ꢯ
ꢾ
ꢯ
ꢳꢴ
ꢞꢮ
ꢠꢋ
ꢋ
ꢮ
ꢳꢪ
ꢮ
ꢗ
ꢯꢋ
ꢼ
ꢗꢮ
ꢊ°
ꢓ
ꢒ
ꢋ
ꢯ
ꢾ ꢯ
ꢳ
ꢴ
ꢞ
ꢮꢠ
ꢋ
ꢋ
ꢮ
ꢳ
ꢪ
ꢮ
ꢗ
ꢯꢋ
ꢼ
ꢗ
ꢮ
ꢊ °
ꢓ
ꢒ
Figure 20. Startup Threshold Voltage
versus Temperature
Figure 21. Disable Voltage After Threshold
Turn−On (UVLO1) versus Temperature
ꢉ
ꢶ
ꢆ
ꢉ
ꢁ
ꢃ
ꢅ
ꢆ
ꢅ
ꢶ
ꢁ
ꢆ
ꢈ
ꢶ
ꢅ
ꢶ
ꢂ
ꢂ
ꢈ
ꢈ
ꢈ
ꢈ
ꢁ
ꢶ
ꢶ
ꢶ
ꢶ
ꢶ
ꢅ
ꢅ
ꢅ
ꢅ
ꢅ
ꢶꢂ
ꢶꢃ
ꢶꢃ
ꢶꢄ
ꢶꢄ
ꢆ
ꢂ
ꢆ
ꢂ
ꢎ
ꢺ
ꢀ
ꢅ
ꢎ
ꢓ
ꢓ
ꢎ
ꢡꢐ ꢝꢘꢐꢦ ꢫꢏꢜ ꢩ
ꢓꢓ
ꢆ
ꢰ
ꢉ
ꢰ
ꢂ
ꢆ
ꢰ
ꢅ
ꢂ
ꢆ
ꢅ
ꢂ
ꢂ
ꢆ
ꢈ
ꢂ
ꢀ
ꢆ
ꢆ
ꢂ
ꢆ
ꢰ
ꢅ
ꢂ
ꢆ
ꢅ
ꢂ
ꢂ
ꢆ
ꢈ
ꢂ
ꢀ
ꢆ
ꢆ
ꢋ
ꢯ
ꢾ
ꢯ
ꢳ
ꢴ
ꢞ
ꢮ
ꢠ
ꢋ
ꢋ
ꢮ
ꢳ
ꢪ
ꢮ
ꢗ
ꢯ
ꢋ
ꢼ
ꢗ
ꢮ
ꢊ
°
ꢓ
ꢒ
ꢋ
ꢯ
ꢾ
ꢯ
ꢳ
ꢴ
ꢞ
ꢮ
ꢠ
ꢋ
ꢋ
ꢮ
ꢳ
ꢪ
ꢮ
ꢗ
ꢯ
ꢋ
ꢼ
ꢗ
ꢮ
ꢊ
°
ꢓ
ꢒ
Figure 22. Disable Voltage After Threshold
Figure 23. Protection Threshold Level on
Turn−On (UVLO2) versus Temperature
VOVP versus Temperature
ꢀ
ꢉ
ꢂ
ꢈ
ꢄ
ꢶ
ꢆ
ꢗ
ꢓ
ꢺ ꢀꢆ ꢧ
ꢺ ꢉ ꢅ ꢆ ꢍꢢ
ꢘ
ꢐ
ꢙ
ꢋ
ꢀ
ꢀ
ꢈ
ꢶ
ꢅ
ꢅ
ꢶ
ꢶ
ꢂ
ꢆ
ꢂ
ꢪ
ꢏ
ꢜ
ꢁ
ꢔ
ꢍ
ꢐ
ꢜ
ꢀ
ꢎ
ꢗ
ꢓ
ꢺ
ꢺ
ꢉ
ꢀ
ꢅ
ꢎ
ꢧ
ꢓ
ꢓ
ꢁ
ꢶ
ꢂ
ꢁ
ꢀ
ꢀ
ꢶ
ꢶ
ꢀ
ꢆ
ꢘ
ꢐ
ꢙ
ꢺ
ꢅ
ꢆ
ꢍ
ꢢ
ꢋ
ꢀ
ꢆ
ꢰ
ꢰ
ꢂ
ꢆ
ꢰ
ꢅ
ꢂ
ꢆ
ꢅ
ꢂ
ꢂ
ꢆ
ꢈ
ꢂ
ꢀ
ꢆ
ꢆ
ꢂ
ꢆ
ꢰ
ꢅ
ꢂ
ꢆ
ꢅ
ꢂ
ꢂ
ꢆ
ꢈ
ꢂ
ꢀ
ꢆ
ꢆ
ꢋ
ꢯ
ꢾ
ꢯ
ꢳ
ꢴ
ꢞ
ꢮ
ꢠ
ꢋ
ꢋ
ꢮ
ꢳ
ꢪ
ꢮ
ꢗ
ꢯ
ꢋ
ꢼ
ꢗ
ꢮ
ꢊ
°
ꢓ
ꢒ
ꢋ
ꢯ
ꢾ
ꢯ
ꢳ
ꢴ
ꢞ
ꢮ
ꢠ
ꢋ
ꢋ
ꢮ
ꢳ
ꢪ
ꢮ
ꢗ
ꢯ
ꢋ
ꢼ
ꢗ
ꢮ
ꢊ
°
ꢓ
ꢒ
Figure 24. Protection Level on VCC
versus Temperature
Figure 25. Propagation Delay (VOVP > 2.58 V
to Vout Low) versus Temperature
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MC44603A
ꢅ
ꢅ
ꢅ
ꢈ
ꢁ
ꢁ
ꢆ
ꢂ
ꢆ
ꢆ
ꢆ
ꢆ
ꢆ
ꢶꢄ
ꢶꢄ
ꢶꢄ
ꢶꢄ
ꢄ
ꢅ
ꢀ
ꢅ
ꢂ
ꢂ
ꢆ
ꢅ
ꢂ
ꢎ
ꢗ ꢪ ꢚ ꢖꢤ ꢥ ꢛ ꢊ ꢪ ꢏ ꢜ ꢀ ꢅ ꢒ
ꢅ ꢃ
ꢅ ꢃ
ꢅ ꢄ
ꢅ ꢄ
ꢂ
ꢆ
ꢂ
ꢎ
ꢺ
ꢀ
ꢅ
ꢎ
ꢓ ꢓ
ꢎꢌꢣ ꢖ ꢦꢩꢐ ꢞ ꢜꢝꢘꢐ ꢦꢫꢏ ꢜ ꢩ
ꢗ
ꢓ
ꢺ
ꢀ
ꢅ
ꢆ
ꢆ
ꢧ
ꢍ
ꢘ
ꢐ
ꢙ
ꢺ
ꢉ
ꢢ
ꢋ
ꢪ
ꢏ
ꢜ
ꢀ
ꢅ
ꢓ
ꢣ
ꢦꢬ
ꢍꢐ
ꢤ
ꢦ
ꢖ
ꢀ
ꢶ
ꢆ
ꢎ
ꢆ
ꢰ
ꢆ
ꢰ
ꢂ
ꢆ
ꢰ
ꢅꢂ
ꢆ
ꢅ
ꢂ
ꢂ
ꢆ
ꢈ
ꢂ
ꢀ
ꢆꢆ
ꢂ
ꢆ
ꢰ
ꢅ
ꢂ
ꢆ
ꢅ
ꢂ
ꢂ
ꢆ
ꢈ
ꢂ
ꢀ ꢆ ꢆ
ꢋ
ꢯ
ꢾ
ꢯ
ꢳꢴ
ꢞꢮ
ꢠ
ꢋ
ꢋ
ꢮ
ꢳ
ꢪ
ꢮ
ꢗ
ꢯ
ꢋ
ꢼ
ꢗ
ꢮ
ꢊ
°
ꢓ
ꢒ
ꢋ
ꢯ
ꢾ
ꢯ
ꢳ
ꢴ
ꢞ
ꢮ
ꢠ
ꢋ
ꢋ
ꢮ
ꢳ
ꢪ
ꢮ
ꢗ
ꢯ
ꢋ
ꢼ
ꢗ
ꢮ
ꢊ
°
ꢓ
ꢒ
Figure 26. Standby Reference Current
versus Temperature
Figure 27. Current Sense Voltage Threshold
Standby Mode versus Temperature
PIN FUNCTION DESCRIPTION
Pin
1
Name
Description
This pin is the positive supply of the IC. The operating voltage range after startup is 9.0 to 14.5 V.
V
CC
2
V
The output high state (V ) is set by the voltage applied to this pin. With a separate connection to the
C
OH
power source, it can reduce the effects of switching noise on the control circuitry.
3
4
5
Output
GND
Peak currents up to 750 mA can be sourced or sunk, suitable for driving either MOSFET or Bipolar tran-
sistors. This output pin must be shunted by a Schottky diode, 1N5819 or equivalent.
The ground pin is a single return, typically connected back to the power source; it is used as control and
power ground.
Foldback Input
The foldback function provides overload protection. Feeding the foldback input with a portion of the V
CC
voltage (1.0 V max) establishes on the system control loop a foldback characteristic allowing a smoother
startup and sharper overload protection. Above 1.0 V the foldback input is inactive.
6
7
Overvoltage
Protection
When the overvoltage protection pin receives a voltage greater than 17 V, the device is disabled and
requires a complete restart sequence. The overvoltage level is programmable.
Current Sense
Input
A voltage proportional to the current flowing into the power switch is connected to this input. The PWM
latch uses this information to terminate the conduction of the output buffer when working in a current
mode of operation. A maximum level of 1.0 V allows either current or voltage mode operation.
8
9
Demagnetization
Detection
A voltage delivered by an auxiliary transformer winding provides to the demagnetization pin an indication
of the magnetization state of the flyback transformer. A zero voltage detection corresponds to complete
core saturation. The demagnetization detection ensures a discontinuous mode of operation. This function
can be inhibited by connecting Pin 8 to GND.
Synchronization
Input
The synchronization input pin can be activated with either a negative pulse going from a level between
0.7 V and 3.7 V to GND or a positive pulse going from a level between 0.7 V and 3.7 V up to a level high-
er than 3.7 V. The oscillator runs free when Pin 9 is connected to GND.
10
11
C
The normal mode oscillator frequency is programmed by the capacitor C choice together with the R
T ref
T
resistance value. C , connected between Pin 10 and GND, generates the oscillator sawtooth.
T
Soft−Start/D
Voltage−Mode
/
A capacitor, resistor or a voltage source connected to this pin limits the switching duty−cycle. This pin
can be used as a voltage mode control input. By connecting Pin 11 to Ground, the MC44603A can be
shut down.
max
12
R
A voltage level applied to the R
turn into the reduced frequency mode of operation (i.e. standby mode). An internal hysteresis comparator
allows to return in the normal mode at a higher output power level.
pin determines the output power level at which the oscillator will
P Standby
P Standby
13
14
E/A Out
The error amplifier output is made available for loop compensation.
Voltage Feedback This is the inverting input of the Error Amplifier. It can be connected to the switching power supply output
through an optical (or other) feedback loop.
15
16
R
The reduced frequency or standby frequency programming is made by the R
resistance choice.
F Standby
F Standby
R
ref
R
sets the internal reference current. The internal reference current ranges from 100 ꢀA to 500 ꢀA.
ref
This requires that 5.0 kꢂ ≤ R ≤ 25 kꢂ.
ref
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MC44603A
ꢠ
ꢌ
ꢰ
ꢋꢦ
ꢧ
ꢐ
ꢔ
ꢨ
ꢐ
ꢘ
ꢻ ꢌꢌ ꢍ ꢢꢦ ꢏꢣ ꢕꢘ ꢐ
ꢅ ꢶꢆ ꢀꢫ
ꢚ
ꢖꢦ
ꢘ
ꢖ
ꢕ
ꢍ
ꢗꢐ ꢫꢖ ꢦꢘ ꢖ
ꢎ
ꢓꢓ
ꢎ
ꢓꢓ ꢍ ꢘ ꢌ ꢖ
ꢎ
ꢫꢖꢕ ꢍ ꢰ ꢖꢷ
ꢠꢌ ꢘꢬ ꢦ ꢣ ꢳꢌ ꢤ ꢐ
ꢎ
ꢎ
ꢤ ꢏ ꢫꢦ ꢥ ꢣ ꢐ ꢀ
ꢤ ꢏ ꢫꢦ ꢥ ꢣ ꢐ ꢅ
ꢎ
ꢘ ꢐ ꢙ
ꢼ ꢎꢻꢔ ꢀ
ꢎ
ꢪ ꢏ ꢜ ꢀ ꢀ
ꢊ ꢚ ꢌ ꢙꢖ ꢰ ꢚ ꢖꢦ ꢘ ꢖꢒ
ꢎ
ꢔ
ꢎ
ꢪ
ꢔ
ꢕ
ꢖ
ꢔ
ꢕ
ꢖ
ꢍ
ꢕ
ꢖ
ꢞ
ꢓ
ꢓ
ꢀ
ꢈ
ꢄ
ꢬ
ꢯ
ꢆ
ꢶ
ꢬ
ꢯ
Figure 28. Starting Behavior and Overvoltage Management
ꢎ
ꢡ
ꢐ
ꢬ
ꢦ
ꢩ
ꢞ
ꢜ
ꢔ
ꢕ
ꢖ
ꢍ
ꢕ
ꢖ
ꢊ
ꢪ
ꢏ
ꢜ
ꢄ
ꢒ
ꢎ
ꢡ
ꢐ
ꢬ
ꢦ
ꢩ
ꢔ
ꢕ
ꢖ
ꢎ
ꢡ
ꢐ
ꢬ
ꢦ
ꢩ
ꢔ
ꢕ
ꢖ
ꢡ
ꢐ
ꢬ
ꢦ
ꢩ
ꢜ
ꢐ
ꢖ
ꢏ
ꣀ
ꢦ
ꢖ
ꢏ
ꢖ
ꢌ
ꢜ
ꢎ
ꢔ
ꢫ
ꢝ
ꢏ
ꢣ
ꢣ
ꢦ
ꢖ
ꢌ
ꢘ
ꢡ
ꢐ
ꢬ
ꢦ
ꢩ
ꢞ
ꢜ
ꢳ
ꢦ
ꢜ
ꢦ
ꢩ
ꢐ
ꢬ
ꢐ
ꢜ
ꢴ
ꢕ
ꢙ
ꢙ
ꢐ
ꢘ
ꢔ
ꢕ
ꢖ
ꢍ
ꢕ
ꢖ
Figure 29. Demagnetization
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MC44603A
ꢎ
ꢓꢓ
ꢎ
ꢫꢖꢕ ꢍ ꢰ ꢖꢷ
ꢎ
ꢎ
ꢤ ꢏ ꢫꢦ ꢥ ꢣ ꢐ ꢀ
ꢤ ꢏ ꢫꢦ ꢥ ꢣ ꢐ ꢅ
ꢎ
ꢘ ꢐ ꢙ
ꢼ
ꢎ
ꢻ
ꢔ
ꢀ
ꢎ
ꢪ ꢏ ꢜ ꢀ ꢀ
ꢊꢚ ꢌꢙ ꢖꢰ ꢚ ꢖꢦ ꢘꢖ ꢒ
ꢔ
ꢕ
ꢖ
ꢍ
ꢕ
ꢖ
ꢊ
ꢪ
ꢏꢜ
ꢄ
ꢒ
ꢞ
ꢓꢓ
ꢀ
ꢈ
ꢬ
ꢯ
ꢆꢶ ꢄ ꢬ
ꢯ
Figure 30. Switching Off Behavior
ꢄ
ꢀ
ꢶ
ꢁ
ꢁ
ꢎ
ꢎ
ꢎ
ꢓꢋ
ꢶ
ꢀ
ꢶ
ꢆ
ꢎ
ꢎ
ꢚ ꢖꢥ ꢛ
ꢎ
ꢡ
ꢐ
ꢬ
ꢦ
ꢩ
ꢔ
ꢕ
ꢖ
ꢎ
ꢔꢚ ꢓ
ꢎ
ꢔꢚ ꢓ ꢍ ꢘ ꢌ ꢖ
ꢎ
ꢡꢐ ꢬ ꢦ ꢩ ꢔꢕ ꢖ
ꢎ
ꢔꢚ ꢓ ꢍ ꢘ ꢌ ꢖ
ꢚ
ꢛ
ꢜ
ꢝ
ꢷ
ꢘ
ꢌ
ꢜ
ꢏ
ꣀ
ꢦ
ꢖ
ꢏ
ꢌ
ꢜ
ꢞ ꢜꢍꢕ
ꢖ
ꢔ ꢫꢝꢏꢣ ꢣꢦ ꢖ ꢌꢘ
ꢎ
ꢔꢚ ꢓ
ꢓ
ꢋ
ꢎ
ꢚ ꢖꢥ ꢛ
Figure 31. Oscillator
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MC44603A
ꢎ
ꢘ ꢐ ꢙ
ꢎ
ꢵ ꢀꢶ ꢁ ꢎ
ꢓꢚ ꢚ
ꢞ ꢜꢖ ꢐ ꢘ ꢜꢦ ꢣ ꢓꢣ ꢦꢬ ꢍ
ꢚ
ꢌꢙ
ꢖ
ꢰ
ꢚ
ꢖ
ꢦꢘ
ꢖ
ꢮ
ꢲ
ꢖ
ꢐꢘ
ꢜ
ꢦꢣ
ꢓ
ꢣ
ꢦꢬ
ꢍ
ꢎ
ꢄ
ꢀ
ꢶ
ꢁ
ꢁ
ꢎ
ꢎ
ꢓ
ꢋ
ꢎ
ꢣ
ꢌ
ꢑ
ꢶ
ꢓ ꢋ
ꢎ
ꢔꢚ ꢓ
ꢔ
ꢕ
ꢖ
ꢍ
ꢕ
ꢖ
ꢊ
ꢪ
ꢏ
ꢜ
ꢄ
ꢒ
Figure 32. Soft−Start & Dmax
OPERATING DESCRIPTION
ꢵ
Error Amplifier
A fully compensated Error Amplifier with access to the
inverting input and output is provided. It features a typical
dc voltage gain of 70 dB. The noninverting input is
internally biased at 2.5 V and is not pinned out. The
converter output voltage is typically divided down and
monitored by the inverting input. The maximum input bias
current with the inverting input at 2.5 V is −2.0 ꢀA. This can
cause an output voltage error that is equal to the product of
the input bias current and the equivalent input divider source
resistance.
The Error Amp output (Pin 13) is provided for external
loop compensation. The output voltage is offset by two
diode drops (≈ 1.4 V) and divided by three before it connects
to the inverting input of the Current Sense Comparator. This
guarantees that no drive pulses appear at the Output (Pin 3)
ꢀ
ꢶ
ꢆ
ꢬ
ꢯ
ꢓ
ꢌ
ꢬ
ꢍ
ꢐ
ꢜ
ꢫ
ꢦ
ꢖ
ꢏ
ꢌ
ꢜ
ꢮ
ꢘ
ꢘ
ꢣ
ꢌ
ꢘ
ꢏ
ꢀ
ꢄ
ꢗ
ꢢ
ꢴ
ꢯ
ꢬ
ꢍ
ꢏ
ꢙ
ꢐ
ꢘ
ꢗ
ꢙ
ꢅ
ꢗ
ꢓ
ꢅ
ꢶ
ꢂ
ꢎ
ꢙ
ꢀ
ꢃ
ꢗ
ꢎꢌ ꢣꢖ ꢦ ꢩꢐ
ꢢꢐ ꢐꢤ ꢥ ꢦ ꢝꢧ
ꢓ ꢕꢘ ꢘ ꢐ ꢜ ꢖ ꢚꢐ ꢜ ꢫ ꢐ
ꢓ ꢌꢬ ꢍꢦ ꢘ ꢦ ꢖꢌ ꢘ
ꢞ
ꢜ
ꢍ
ꢕ
ꢖ
ꢀ
ꢶꢆ
ꢎ
ꢂ
ꢢꢌ ꢣꢤ ꢥ ꢦꢝꢧ
ꢟ
ꢠ
ꢡ
ꢃ
ꢞ ꢜꢍ ꢕ ꢖ
ꢢ
ꢘ
ꢌ
ꢬ
ꢪ
ꢌ
ꢑ
ꢐ
ꢘ
ꢚ
ꢕ
ꢍ ꢍ ꢣꢛ ꢔ ꢕ ꢖꢍ ꢕ ꢖ
ꢗ
ꢅ
ꢗ
ꢀ
Figure 33. Error Amplifier Compensation
when Pin 13 is at its lowest state (V ). The Error Amp
minimum feedback resistance is limited by the amplifier’s
minimum source current (0.2 mA) and the required output
OL
Current Sense Comparator and PWM Latch
The MC44603A can operate as a current mode controller
or as a voltage mode controller. In current mode operation,
the MC44603A uses the current sense comparator. The
output switch conduction is initiated by the oscillator and
terminated when the peak inductor current reaches the
voltage (V ) to reach the current sense comparator’s 1.0 V
OH
clamp level:
3.0 (1.0 V) ) 1.4 V
R
f(min)
[
+ 22 kꢂ
0.2 mA
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MC44603A
threshold level established by the Error Amplifier output
(Pin 13). Thus, the error signal controls the peak inductor
current on a cycle−by−cycle basis. The Current Sense
Comparator PWM Latch ensures that only a single pulse
appears at the Source Output during the appropriate
oscillator cycle.
connected to the charging current source (0.4 I ) and so,
ref
the discharge current source has to be higher than the
charge current to be able to decrease the C voltage (refer
T
to Figure 36).
This condition is performed, its value being (2.0 I ) in
ref
normal working and (0.4 I + 0.5 I
in standby mode).
ref
F Stby
The inductor current is converted to a voltage by inserting
ꢎ
the ground referenced sense resistor R in series with the
ꢘ
ꢐ
ꢙ
S
power switch Q1.
ꢆ ꢶꢃ ꢞ
ꢘ ꢐ ꢙ
This voltage is monitored by the Current Sense Input
(Pin 7) and compared to a level derived from the Error Amp
output. The peak inductor current under normal operating
conditions is controlled by the voltage at Pin 13 where:
ꢓ
ꢎ
ꢔ
ꢚ
ꢍ
ꢘ
ꢌ
ꢖ
ꢎ
ꢔ
ꢚ
ꢓ
ꢍ
ꢘ
ꢌ
ꢖ
ꢀ
ꢶ
ꢆ
ꢎ
ꢎ
ꢎ
ꢔ
ꢚ
ꢓ
ꢓ
ꢔꢚ ꢓ ꢻ ꢌ ꢑ
ꢗ
ꢹ
ꢓ
ꢀ
ꢶ
ꢁ
ꢎ
ꢋ
ꢀ
ꢶ
ꢁ
V
ꢻ
(Pin 13) – 1.4 V
ꢔ
ꢚ
ꢓ
ꢡ
ꢏ
ꢫ
ꢝ
ꢷ
ꢦ
ꢘ
ꢩ
ꢐ
I
[
pk
ꢚ
3 R
ꢗ
ꢹ
S
ꢓ
ꢔ
ꢚ
ꢓ
ꢿ
ꢏ
ꢩ
ꢷ
ꢚ
ꢎ
ꢛ
ꢜ
ꢝ
ꢷ
ꢘ
ꢌ
ꢀ
ꢆ
ꢡꢏ ꢫꢝꢷ
ꢚ
The Current Sense Comparator threshold is internally
clamped to 1.0 V. Therefore, the maximum peak switch
current is:
ꢓ
ꢋ
ꢄ
ꢶ
ꢁ
ꢎ
ꢡ
ꢐ
ꢬ
ꢦ
ꢩ
ꢓ
ꢔ
ꢕ
ꢖ
ꢔ
ꢚ
ꢓ
ꢗ
ꢐ
ꢩ
ꢕ
ꢣ
1.0 V
ꢆ
ꢀ
I
[
pk(max)
R
S
ꢀ
ꢆ
ꢞ
ꢗ
ꢐ
ꢩ
ꢕ
ꢣ
ꢎ
ꢏ ꢜ
ꢞ
ꢡ
ꢏ
ꢫ
ꢝ
ꢷ
ꢦ
ꢘ
ꢩ
ꢐ
ꢎ
ꢓ
ꢀ
ꢃ
ꢼ
ꢎ
ꢻ
ꢔ
Figure 35. Oscillator
ꢎ
ꢔ
ꢚ
ꢓ
ꢍ
ꢘ
ꢌ
ꢖ
ꢗ
ꢅ
ꢹ
ꢀ
ꢎ
ꢡ ꢐ ꢬ ꢦ ꢩ ꢔꢕ ꢖ
ꢄ
ꢎ
ꢘ ꢐ ꢙ
ꢚ
ꢗ
ꢗ
ꢡ
ꢗ
ꢄ
ꢋ
ꢷ
ꢐ
ꢘ
ꢬ
ꢦ
ꢣ
ꢹ
ꢀ
ꢠ
ꢂ
ꢉ
ꢀ
ꢇ
ꢪ
ꢘ
ꢌ
ꢖ
ꢐ
ꢝ
ꢖ
ꢏ
ꢌ
ꢜ
ꢞ
ꢓ
ꢓꢷ ꢦ ꢘ ꢩ ꢐ
ꢔ
ꢚ
ꢓ
ꢗ
ꢐ
ꢩ
ꢕ
ꢣ
ꢪ
ꢻ ꢦꢖ ꢝꢷ
꣄
ꢳ
ꢆ
ꢶ
ꢃ
ꢞ
ꢘ ꢐ ꢙ
ꢓ
ꢕ
ꢘ
ꢘ
ꢐ
ꢜ
ꢖ
ꢀ
ꢶ
ꢁ
ꢎ
ꢐ
ꢚ
ꢕ
ꢥ
ꢫ
ꢖ
ꢘ
ꢦ
ꢖ
ꢐ
ꢀ
ꢆ
ꢚ
ꢐ
ꢜ
ꢫ
ꢐ
ꢗ
ꢓ
ꢕ
ꢘ
ꢌ
ꢘ
ꢬ
ꢐ
ꢜ
ꢍ
ꢖ
ꢦ
ꢚ
ꢐ
ꢖ
ꢜ
ꢫ
ꢐ
ꢈ
ꢆ
ꢀ
ꢞ
ꢗ
ꢆ
ꢀ
ꢡ
ꢓ
ꢏ
ꢫ
ꢝ
ꢷ
ꢦ
ꢘ
ꢩ
ꢐ
ꢪ
ꢷ
ꢦ
ꢫ
ꢓ
ꢚ
ꢓ
ꢘ
ꢦ
ꢌ
ꢘ
ꢷ
ꢦ
ꢘ
ꢩ
ꢐ
ꢪ
ꢷ
ꢦ
ꢫ
ꢐ
ꢓ
ꢋ
Figure 34. Output Totem Pole
ꢡꢏ ꢫꢝꢷ ꢦ ꢘ ꢩ ꢐ
ꢞ
ꢗꢐ ꢩ ꢕ ꢣ
Series gate resistor, R2, will dampen any high frequency
oscillations caused by the MOSFET input capacitance and
any series wiring inductance in the gate−source circuit.
Diode D is required if the negative current into the output
drive pin exceeds 15 mA.
Figure 36. Simplified Block Oscillator
Two comparators are used to generate the sawtooth. They
compare the C voltage to the oscillator valley (1.6 V) and
T
peak reference (3.6 V) values. A latch (L
the oscillator state.
In addition to the charge and discharge cycles, a third state
can exist. This phase can be produced when, at the end of the
discharge phase, the oscillator has to wait for a
synchronization or demagnetization pulse before restarting.
) memorizes
disch
Oscillator
The oscillator is a very accurate sawtooth generator that
can work either in free mode or in synchronization mode. In
this second mode, the oscillator stops in the low state and
waits for a demagnetization or a synchronization pulse to
start a new charging cycle.
During this delay, the C voltage must remain equal to the
T
• The Sawtooth Generation:
oscillator valley value (]1.6 V). So, a third regulated
In the steady state, the oscillator voltage varies between
about 1.6 V and 3.6 V.
current source I
controlled by C
, is connected
Regul
OSC Regul
to C in order to perfectly compensate the (0.4 I ) current
T
ref
The sawtooth is obtained by charging and discharging an
external capacitor C (Pin 10), using two distinct current
sources = I
source that permanently supplies C .
T
T
The maximum duty cycle is 80%. Indeed, the on−time is
allowed only during the oscillator capacitor charge.
and I
. In fact, C is permanently
discharge T
charge
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MC44603A
Consequently:
= C x ꢃ V/I
charge
That is why, the MC44603A demagnetization detection
T
charge
consists of a comparator that can compare the auxiliary
winding voltage to a reference that is typically equal to
65 mV.
T
T
= C x ꢃ V/I
discharge
T discharge
where:
T
charge
is the oscillator charge time
ꢃ V is the oscillator peak−to−peak value
I
is the oscillator charge current
charge
ꢆ
ꢶ
ꢈ
ꢂ
ꢎ
ꢎ
and
T
I
ꣅꢐ ꢘꢌ ꢓꢕ ꢘ ꢘꢐ ꢜꢖ
ꢡꢐ ꢖ ꢐꢝꢖ ꢏ ꢌꢜ
ꢎ
is the oscillator discharge time
ꢪ ꢏ ꢜ ꢉ
discharge
is the oscillator discharge current
discharge
So, as f = 1 /(T
arrangement is not activated, the operating frequency can be
obtained from the graph in Figure 2.
+ T
) when the Regul
S
charge
discharge
ꢁ
ꢰ
ꢂ
ꢬ
ꢆ
ꢶ
ꢄ
ꢄ
ꢎ
NOTE: The output is disabled by the signal V
when
OSC prot
V
CT
is lower than 1.0 V (refer to Figure 31).
ꢔ
ꢜ
ꢰ
ꢋ
ꢏ
ꢬ
ꢐ
ꢔ
ꢙꢙ
ꢰ
ꢋ
ꢏ
ꢬ
ꢐ
ꢡ
ꢐ
ꢦ
ꢤ
ꢰ
ꢋ
ꢏ
ꢬ
ꢐ
Synchronization and Demagnetization Blocks
To enable the output, the L
output must be low. Reset is activated by the L
latch complementary
OSC
Figure 38. Demagnetization Detection
output
disch
during the discharge phase. To restart, the L
(refer to Figure 35). To perform this, the demagnetization
signal and the synchronization must be low.
has to be set
OSC
A diode D has been incorporated to clamp the positive
applied voltages while an active clamping system limits the
negative voltages to typically −0.33 V. This negative clamp
level is sufficient to avoid the substrate diode switching on.
In addition to the comparator, a latch system has been
incorporated in order to keep the demagnetization block
output level low as soon as a voltage lower than 65 mV is
detected and as long as a new restart is produced (high level
on the output) (refer to Figure 39). This process prevents
ringing on the signal at Pin 8 from disrupting the
demagnetization detection. This results in a very accurate
demagnetization detection.
• Synchronization:
The synchronization block consists of two comparators
that compare the synchronization signal (external) to 0.7 and
3.7 V (typical values). The comparators’ outputs are
connected to the input of an AND gate so that the final output
of the block should be:
− high when 0.7 < SYNC < 3.7 V
− low in the other cases.
As a low level is necessary to enable the output,
synchronized low level pulses have to be generated on the
output of the synchronization block. If synchronization is
not required, the Pin 9 must be connected to the ground.
The demagnetization block output is also directly
connected to the output, disabling it during the
demagnetization phase (refer to Figure 34).
NOTE: The demagnetization detection can be inhibited by
connecting Pin 8 to the ground.
ꢄ
ꢶ
ꢈ
ꢎ
ꢔ
ꢔ
ꢫ
ꢝ
ꢏ
ꢣ
ꢣ
ꢦ
ꢖ
ꢌ
ꢘ
ꢚ
ꢇ
ꢛꢜꢝ
ꢔ
ꢫ
ꢝ
ꢏ
ꢣ
ꢣ
ꢦ
ꢖ
ꢌ
ꢘ
ꢔ
ꢕ
ꢖ
ꢍ
ꢕ
ꢖ
ꢗ
ꢹ
ꢴ
ꢕ
ꢙ
ꢙ
ꢐ
ꢘ
ꢡ
ꢚ
ꢐ
ꢬ
ꢦ
ꢩ
ꢕ
ꢖ
ꢍ
ꢕ
ꢖ
ꢴ
ꢕ
ꢙ
ꢙ
ꢐ
ꢘ
ꢆ
ꢶ
ꢈ
ꢎ
ꢎ
ꢓ
ꢓ
Figure 37. Synchronization
ꢠ
ꢐ
ꢬ
ꢩ
ꢦ
ꢍ
ꢖ
ꢏ
ꢨ
ꢩ
ꢐ
ꢯ
ꢝ
ꢫ
ꢖ
ꢏ
ꢖ
ꢨ
ꢐ
ꢐ
ꢬ
ꢎ
ꢡꢐ ꢬ ꢦ ꢩ ꢔꢕ ꢖ
ꢓ
ꢣ
ꢦ
ꢏ
ꢜ
ꢚ
ꢛ
ꢉ
• Demagnetization:
ꢓ
ꢡ
ꢐ
ꢬ
In flyback applications, a good means to detect magnetic
saturation of the transformer core, or demagnetization,
consists in using the auxiliary winding voltage. This voltage
is:
ꢁ
ꢂ
ꢬ
ꢎ
ꢡ
Figure 39. Demagnetization Block
− negative during the on−time,
− positive during the off−time,
− equal to zero for the dead−time with generally some
− ringing (refer to Figure 38).
Standby
• Power Losses in a Classical Flyback Structure
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MC44603A
ꢓ
ꢠ
ꢣ ꢦꢬ ꢍ ꢏꢜ ꢩ
Also,
ꢐ
ꢖ
ꢑ
ꢌ
ꢘ
ꢧ
ꢎ
ꢏ ꢜ
V
R
CS
S
ꢗ
ꢞ ꢓ ꢻ
I
+
pk
ꢵ
ꢵ
ꢯꢓ ꢻ ꢏꢜ ꢐ
where R is the resistor used to measure the power switch
S
ꢗ
ꢫ ꢖꢦ ꢘ ꢖ ꢕ ꢍ
current.
2
Thus, the input power is proportional to V
(V being
CS
CS
ꢎ
ꢓꢓ
the internal current sense comparator input).
That is why the standby detection is performed by creating
a V threshold. An internal current source (0.4 x I ) sets
ꢀꢁꢂꢂꢃꢄꢅꢆ
CS
ref
ꢗ
ꢚ
the threshold level by connecting a resistor to Pin 12.
As depicted in Figure 41, the standby comparator
ꢚ ꢜꢕꢥ ꢥꢐꢘ
noninverting input voltage is typically equal to (3.0 x V
+
CS
Figure 40. Power Losses in a Classical
Flyback Structure
V ) while the inverter input value is (V
+ V ).
F
R P Stby
F
ꢔ
ꢫ
ꢝ
ꢝ
ꢏ
ꢷ
ꢣ
ꢣ
ꢦ
ꢦ
ꢘ
ꢖ
ꢩ
ꢌ
ꢐ
ꢘ
ꢎ
ꢎ
ꢘ
ꢐ
ꢙ
ꢘ
ꢐ
ꢙ
ꢎ
ꢎ
ꢘ
ꢐ
ꢙ
ꢘ
ꢐ
ꢙ
ꢡ
ꢏ
ꢫ
In a classical flyback (as depicted in Figure 40), the
standby losses mainly consist of the energy waste due to:
ꢓ
ꢕ
ꢘ
ꢘ
ꢐ
ꢜ
ꢖ
ꢆ ꢶ ꢁ ꢞ
ꢘ ꢐ ꢙ
ꢆ
ꢶ
ꢃ
ꢞ
ꢆ ꢶ ꢉ ꢞ
ꢘ ꢐ ꢙ
ꢘ
ꢐ
ꢙ
ꢎ
ꢘ ꢐ ꢙ
ꢆ
ꢶ
ꢅ
ꢂ
ꢞ
ꢢ
ꢚ
ꢖ
ꢥ
ꢛ
− the startup resistor R
→ P
ꢗ
startup
startup
ꢆ ꢶꢅ ꢞ
ꢘ ꢐ ꢙ
ꢪ
ꢚ
ꢖ
ꢥ
ꢛ
ꢆ
ꢀ
− the consumption of the IC and the power
− switch control
ꢀ
ꢅ
ꢀ
ꢆ
ꢓ
ꢚ
ꢖ
ꢥ
ꢛ
→ P
→ P
control
− the inrush current limitation resistor R
ICL
ICL
ꢀ
ꢄ
ꢞ
ꢞ
ꢡꢏ ꢫꢝꢷ ꢦ ꢘ ꢩ ꢐ
ꢡ
ꢏ
ꢫ
ꢝ
ꢷ
ꢦ
ꢘ
ꢩ
ꢐ
ꢱ
ꢅ
− the switching losses in the power switch → P
− the snubber and clamping network
SW
ꢮ
ꢗ
ꢯ ꢬ ꢍ ꢔꢕ ꢖ
ꢅ
ꢀ
ꢗ
ꢓ
ꢶ
ꢚ
ꢶ
ꢓ
ꢌ
ꢬ
ꢍ
ꢦ
ꢘ
ꢦ
ꢖ
ꢌ
ꢘ
→ P
SN−CLN
ꢓ
ꢕ
ꢘ
ꢘ
ꢐ
ꢜ
ꢖ
ꢳ
ꢏ
ꢘ
ꢘ
ꢌ
ꢘ
ꢸ
ꢅ
P
startup
is nearly constant and is equal to:
ꢗ
2
ǒ
Ǔ
(V –V ) ńR
in CC startup
Figure 41. Standby
P
ICL
only depends on the current drawn from the mains.
Losses can be considered constant. This waste of energy
decreases when the standby losses are reduced.
The V
threshold level is typically equal to
)/3] and if the corresponding power threshold is
CS
[(V
R P Stby
P
increases when the oscillator frequency is
control
labelled P
:
thL
increased (each switching requires some energy to turn on
the power switch).
V
2
R P Stby
+ 0.5 x L x ǒ Ǔ
P
thL
x f
S
3.0 R
P
SW
and P
are proportional to the switching
S
SN−CLN
frequency.
And as:
Consequently, standby losses can be minimized by
decreasing the switching frequency as much as possible.
The MC44603A was designed to operate at a standby
frequency lower than the normal working one.
• Standby Power Calculations with MC44603A
During a switching period, the energy drawn by the
transformer during the on−time to be transferred to the
output during the off−time, is equal to:
V
+ R
+ R
x 0.4 x I
ref
R P Stby
P Stby
V
ref
R
ref
x 0.4 x
R P Stby
10.6 x R x R
P
thL
S
ref
x Ǹ
R
+
P Stby
V
ref
L x f
S
Thus, when the power drawn by the converter decreases,
decreases and when V becomes lower than [V
V
CS
CS
CS−th
1
2
E + x L x I
pk
x (V
)/3], the standby mode is activated. This results in
2
R P Stby
an oscillator discharge current reduction in order to increase
the oscillator period and to diminish the switching
where:
− L is the transformer primary inductor,
− l is the inductor peak current.
frequency. As it is represented in Figure 41, the (0.8 x I
)
ref
pk
current source is disconnected and is replaced by a lower
value one (0.25 x I ).
Input power is labelled P :
in
F Stby
2
x f
pk
S
P
in
+ 0.5 x L x I
Where: I
= V /R
ref F Stby
F Stby
where f is the normal working switching frequency.
S
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374
MC44603A
In order to prevent undesired mode switching when power
is close to the threshold value, a hysteresis that is
ꢪ
ꢎ
ꢏ ꢜ ꢀ ꢀ
ꢎꢌ ꢣꢖ ꢦ ꢩꢐ
ꢓ
ꢋ
ꢊ ꢪꢏꢜ ꢀ ꢆ ꢒ
proportional to V
is incorporated creating a second
R P Stby
V
CS
threshold level that is equal to [2.5 x (V
)/3].
ꢡ
R P Stby
ꢬ ꢦ ꢲ
When the standby comparator output is high, a second
current source (0.6 x I ) is connected to Pin 12.
Finally, the standby mode function can be shown
graphically in Figure 42.
ref
Figure 44. Maximum Duty Cycle Control
Using the internal current source (0.4 I ), the Pin 11
ref
voltage can easily be set by connecting a resistor to this pin.
If a capacitor is connected to Pin 11, the voltage increases
from 0 to its maximum value progressively (refer to Figure
45), thereby, implementing a soft−start. The soft−start
ꢪ
ꢏ ꢜ
ꢙ
ꢚ
capacitor is discharged internally when the V (Pin 1)
CC
voltage drops below 9.0 V.
ꢠ
꣄
ꢌ
ꢌ
ꢘ
ꢘ
ꢬ ꢦꢣ
ꢪ ꢏꢜ ꢀꢀ
ꢗ
ꢓ
ꢆ
ꢌ
ꢜ
ꢜ
ꢐ
ꢝ
ꢖ
ꢐꢤ
ꢖ
ꢌ
ꢪ
ꢏ
ꢜ
ꢀ
ꢎ
ꢀ
ꢓ
ꢓ ꢱꢱ ꢗ
ꢙ
ꢧ
ꢏ
ꢜ
ꢩ
ꢚ ꢖꢥ ꢛ
ꢎ
ꢗꢞ
ꢞ
ꢺ
ꢶ
ꢃ
ꢞ
ꣅ
ꢘ ꢐ ꢙ
ꣅ
ꢗ
ꢞ
ꢪ
ꢖ
ꢷ
ꢿ
ꢄ
ꢺ
ꢗ
ꢓ
ꢚ
ꢖꢦ ꢜꢤꢥ ꢛ
ꢪ
ꢖ ꢷ ꢻ
ꢎ
ꢓ ꢚ
ꢊ
ꢎ
ꢒ
ꢱ
ꢄ
ꢅ
ꢶ
ꢂ
ꢲ
ꢊ
ꢎ
ꢒꢱ ꢄ
ꢗ ꢪ ꢚ ꢖꢥ ꢛ
ꢀ
ꢗ
ꢪ
ꢚ
ꢖ
ꢥ
ꢛ
Figure 45. Different Possible Uses of Pin 11
Figure 42. Dynamic Mode Change
If no external component is connected to Pin 11, an
internal zener diode clamps the Pin 11 voltage to a value V
that is higher than the oscillator peak value, disabling
Z
This curve shows that there are two power threshold
levels:
− the low one:
fixed by V
soft−start and maximum duty cycle limitation.
P
thL
R P Stby
Foldback
− the high one:
As depicted in Figures 33 and 49, the foldback input (Pin
5) can be used to reduce the maximum V value, providing
foldback protection. The foldback arrangement is a
programmable peak current limitation.
f
CS
Stby
2
P
+ (2.5) x P
thL
x
f
thH
thH
f
S
Stby
f
If the output load is increased, the required converter peak
P
+ 6.25 x P
x
thL
current becomes higher and V increases until it reaches its
S
CS
maximum value (normally, V
= 1.0 V).
CS max
Maximum Duty Cycle and Soft−Start Control
Maximum duty cycle can be limited to values less than
Then, if the output load keeps on increasing, the system is
unable to supply enough energy to maintain the output
voltages in regulation. Consequently, the decreasing output
can be applied to Pin 5, in order to limit the maximum peak
current. In this way, the well known foldback characteristic
can be obtained (refer to Figure 46).
80% by utilizing the D
and soft−start control. As
max
depicted in Figure 43, the Pin 11 voltage is compared to the
oscillator sawtooth.
ꢎ
ꢘ ꢐ ꢙ
ꢔ
ꢕ
ꢖ
ꢍ
ꢕ
ꢖ
ꢓ
ꢌ
ꢜ
ꢖ
ꢘ
ꢌ
ꢣ
ꢆꢶ ꢃ ꢞ
ꢘ ꢐ ꢙ
ꢀ
ꢀ
ꢔ
ꢕ
ꢖ
ꢍ
ꢕ
ꢖ
ꢡꢘ ꢏꢨꢐ
ꢓ
ꢡ
ꢡ
ꢬ
ꢦ
ꢲ
ꢬ ꢦ ꢲ
ꢡ
ꢅꢶ ꢃ ꢎ
ꣅ
ꢎ
ꢔꢚ ꢓ
ꢚꢌ ꢙꢖꢰ ꢚꢖꢦ ꢘ ꢖ
ꢔ ꢫꢝꢏ ꢣꢣ ꢦꢖ ꢌꢘ
ꢓ ꢦ ꢍꢦ ꢝꢏ ꢖꢌ ꢘ
Figure 43. Dmax and Soft−Start
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375
MC44603A
ꢞ
Undervoltage Lockout Section
ꢎ
ꢌ ꢕ ꢖ
ꢍ ꢧ ꢬ ꢦ ꢲ
ꢎ
ꢔ
ꢗ
ꢗ
ꢘ ꢐ ꢙ
ꢢ ꢚ ꢖꢥ ꢛ
ꢠ
ꢌ
ꢬ
ꢏ
ꢜ
ꢦ
ꢣ
ꢪ
ꢏ
ꢜ
ꢀ
ꢂ
ꢪꢏ ꢜ ꢀ ꢁ
ꢎ
ꢘ ꢐ ꢙ ꢐ ꢜ ꢦ ꢥ ꢣ ꢐ
ꢠꢐ ꢑ ꢚ ꢖꢦꢘ ꢖꢕ ꢍ
ꢚ
ꢐ
ꢭ
ꢕ
ꢐ
ꢜ
ꢝ
ꢐ
ꢞ
ꢜ
ꢏ
ꢖ
ꢏ
ꢦ
ꢖ
ꢐ
ꢤ
ꢎ
ꢓ
ꢓ ꢓ
ꢫꢖ ꢦ ꢘ ꢖ ꢕ ꢍ
ꢎ
ꢓ ꢓ
ꢀ
ꢗ
ꢐ
ꢙ
ꢐ
ꢩ
ꢘ
ꢐ
ꢐ
ꢜ
ꢦ
ꢝ
ꢜ
ꢐ
ꢤ
ꢴ
ꢓ
ꢣ
ꢕ
ꢌ
ꢘ
ꢝ
ꢘ
ꢧ
ꢐ
ꢜ
ꢎ
ꢀ
ꢆ
ꢤ ꢏ ꢫꢦ ꢥ ꢣ ꢐ ꢅ
ꢞ
ꢌ
ꢕ
ꢖ
ꢎ
ꢌ
ꢣ
ꢖ
ꢦ
ꢖ
ꢚ
ꢌ
ꢕ
ꢘ
ꢝ
ꢐ
ꢫ
ꢟ
ꢐ
ꢜ
ꢐ
ꢘ
ꢦ
ꢖ
ꢌ
ꢘ
ꢀ
ꢆ
ꢔ ꢨꢐꢘꢣꢌ ꢦ ꢤ
ꢊ
ꢎ ꢾ ꢞ ꢾ ꢶ ꢶ ꢶꢒ
ꢘ ꢐ ꢙ ꢘ ꢐ ꢙ
ꢎ
ꢚ ꢖ ꢦꢘ ꢖ ꢕꢍ
ꢤ
ꢏ
ꢫ
ꢦ
ꢥ
ꢣ
ꢐ
ꢅ
ꢈ
ꢶ
ꢂ
ꢎ
ꢀ ꢃꢶ ꢂ ꢎ
Figure 46. Foldback Characteristic
ꢓ
ꢼ ꢎ ꢻ ꢔꢀ
ꢼ
ꢚ
ꢎ
ꢻ
ꢔ
ꢀ
NOTE: Foldback is disabled by connecting Pin 5 to V
Overvoltage Protection
The overvoltage arrangement consists of a comparator
.
CC
ꢊ
ꢖ
ꢌ
ꢌꢙ
ꢖ
ꢰ
ꢚ
ꢖ
ꢦ
ꢘ
ꢖ
ꢒ
ꢎ
ꢇ ꢶ ꢆ ꢎ
ꢤ
ꢏ
ꢫ
ꢦ
ꢥ
ꢣ
ꢐ
ꢀ
that compares the Pin 6 voltage to V (2.5 V) (refer to
ref
Figure 47).
Figure 48. VCC Management
If no external component is connected to Pin 6, the
comparator noninverting input voltage is nearly equal to:
As depicted in Figure 48, an undervoltage lockout has
been incorporated to guarantee that the IC is fully functional
before allowing system operation.
2.0 kꢂ
ǒ
Ǔx V
CC
11.6 kꢂ ) 2.0 kꢂ
This block particularly, produces V (Pin 16 voltage) and
ref
The comparator output is high when:
I
that is determined by the resistor R connected between
ref
ref
2.0 kꢂ
Pin 16 and the ground:
ǒ
Ǔ
x V
w 2.5 V
CC
11.6 kꢂ ) 2.0 kꢂ
V
ref
R
ref
I
+
where V + 2.5 V (typically)
ref
ref
à V
w 17 V
CC
A delay latch (2.0 ꢀs) is incorporated in order to sense
overvoltages that last at least 2.0 ꢀs.
Another resistor is connected to the Reference Block:
that is used to fix the standby frequency.
R
F Stby
If this condition is achieved, V
, the delay latch
OVP out
In addition to this, V is compared to a second threshold
CC
output, becomes high. As this level is brought back to the
input through an OR gate, V remains high (disabling
level that is nearly equal to 9.0 V (V
). UVLO1 is
disable1
OVP out
generated to reset the maximum duty cycle and soft−start
block disabling the output stage as soon as V becomes
the IC output) until V is disabled.
ref
CC
Consequently, when an overvoltage longer than 2.0 ꢀs is
lower than V
. In this way, the circuit is reset and made
disable1
detected, the output is disabled until V is removed and
CC
ready for the next startup, before the reference block is
disabled (refer to Figure 30). Finally, the upper limit for the
minimum normal operating voltage is 9.4 V (maximum
then re−applied.
The V is connected after V has reached steady state
CC
ref
in order to limit the circuit startup consumption.
The overvoltage section is enabled 5.0 ꢀs after the
value of V
) and so the minimum hysteresis is 4.2 V.
disable1
((V
)
= 13.6 V).
stup−th min
regulator has started to allow the reference V to stabilize.
ref
The large hysteresis and the low startup current of the
MC44603A make it ideally suited for off−line converter
applications where efficient bootstrap startup techniques are
required.
By connecting an external resistor to Pin 6, the threshold
V
CC
level can be changed.
ꢎ
ꢘ ꢐ ꢙ
ꢎ
ꢓ
ꢓ
ꢔ
ꢕ
ꢖ
ꢡ
ꢐ
ꢣ
ꢦ
ꢛ
τ
ꢂ
ꢶ
ꢆ
ꢀ
ꢫ
ꢋ
ꢞ
ꢜ
ꢅ
ꢶ
ꢂ
ꢎ
ꢆ
ꢮ
ꢜ
ꢦ
ꢥ
ꢣ
ꢐ
ꢀ
ꢀ
ꢶ
ꢁ
ꢧ
ꢎ
ꢔ
ꢎ
ꢪ
ꢎ
ꢔ
ꢎ
ꢪ
ꢌ
ꢕ
ꢖ
τ
ꢡ ꢐꢣ ꢦꢛ
ꢞ
ꢜ
ꢔ
ꢕ
ꢖ
ꢁ
ꢓ
ꢮ
ꢗ
ꢲ
ꢐ
ꢖ
ꢫ
ꢐ
ꢏ
ꢘ
ꢫ
ꢜ
ꢦ
ꢘ
ꢣ
ꢔ
ꢎ
ꢻ
ꢔ
ꢅ
ꢶ
ꢆ
ꢧ
ꢖ
ꢌ
ꢅ
ꢶ
ꢆ
ꢀ
ꢫ
ꢅ
ꢶ
ꢂ
ꢎ
ꢒ
ꢊ
ꢐ
ꢞ
ꢔ
ꢙ
ꢎ
ꢺ
ꢀ
ꢶ
ꢆ
ꢾ
ꢔ
ꢎ
ꢪ
ꢌ
ꢕ
ꢖ
ꢊ
ꢎ
ꢘ
ꢐ
ꢙ
ꢖ
ꢷ
ꢕ
ꢖ
ꢍ
ꢕ
ꢖ
ꢏ
ꢫ
ꢡ
ꢏ
ꢫ
ꢦ
ꢥ
ꢣ
ꢐ
ꢤ
ꢒ
Figure 47. Overvoltage Protection
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376
MC44603A
ꢀ
ꢉ
ꢂ
ꢖ
ꢎ
ꢌ
ꢎꢯ
ꢯ
ꢓ
ꢓ
ꢅ
ꢈ
ꢆ
ꢗ
ꢢ ꢞ
ꢢ
ꢏ
ꢣ
ꢖ
ꢐ
ꢘ
ꢗ
ꢀ
ꢀ ꢶꢆ ꢱꢂꢶ ꢆ ꣄
ꢓ
ꢄ
ꢀ
ꢶ
ꢆ
ꢜ
ꢢ
ꢱ
ꢀꢶ
ꢆ
ꢧ
ꢎ
ꢓ ꢃ ꢶ ꢶꢶ ꢓꢈ
ꢀꢶ ꢆ ꢜꢢ ꢱꢀ ꢆꢆꢆ ꢎ
ꢗ
ꢄ
ꢃ
ꢶꢈ ꢳ
ꢡ
ꢀ
ꢶ
ꢶꢶ
ꢡ
ꢃ
ꢀ
ꢠ
ꢃ
ꢆ
ꢆ
ꢈ
ꢓ
ꢀ
ꢆ ꢀ
ꢗ
ꢅ
ꢆ
ꢧ
ꢅ
ꢅ
ꢢ
ꢅ
ꢅ
ꢻ
ꢅ
ꢓ
ꢄ
ꢅ
ꢅ
ꢅꢆ
ꢍ
ꢢ
ꢂ ꢶ ꢆ ꣄
ꢅ
ꢅ
ꢶ ꢂ ꢀꢿ
ꢀ ꢂ ꢆ ꢎꢱ ꢆ ꢶꢁ ꢯ
ꢓꢀ ꢈ
ꢃ ꢈ ꢜ ꢢ
ꢡ
ꢉ
ꢡ
ꢂ
ꢄ
ꢗ
ꢅ
ꢶ
ꢳꢗ ꢉꢂ ꢁ
ꢀ
ꢠ
ꢃ
ꢇ
ꢃ
ꢓ
ꢆ ꢀ
ꢄ
ꢢ
ꢆ
ꢓ
ꢆ ꢀ
ꢄ
ꢢ
ꢄ
ꢓ
ꢄ
ꢀ
ꢁ
ꢉ
ꢧ
ꢱ
ꢅ
ꢆ
꣄
ꢀ
ꢆ
ꢀ
ꢆ
ꢆ
ꢶ
ꢀ
ꢀ
ꢢ
ꢓ
ꢅ
ꢅ
ꢅ
ꢆ
ꢀ
ꢢ
ꢚ
ꢛ
ꢜ
ꢝ
ꢡ
ꢈ
ꢻ
ꢀ
ꢓ
ꢅ
ꢇ
ꢅ
ꢅ
ꢆ
ꢍ
ꢢ
ꢳ
ꢉ
ꢂ
ꢁ
ꢧ
ꢀ
ꢶ
ꢆ
ꢀ
ꢿ
ꢓ
ꢀ
ꢁ
ꢗ ꢀꢅ
ꢀꢆ ꢆ ꢍꢢ
ꢅꢈ ꢧ
ꢄ
ꢆ
ꢎ
ꢱ
ꢅ
ꢶ
ꢆ
ꢯ
ꢓ
ꢉ
ꢇ
ꢅ
ꢶ
ꢅ
ꢆ
ꢜ
ꢢ
ꢢ
ꢇ
ꢉ
ꢡ
ꢇ
ꢡ
ꢉ
ꢁ
ꢓ ꢅꢉ
ꢓꢅ ꢈ
ꢓ
ꢀ
ꢶ
ꢜ
ꢳ
ꢗ
ꢉ
ꢂ
ꢅ
ꢗ
ꢇ
ꢀ
ꢶ
ꢆ
ꢧ
ꢀ ꢠꢃ ꢀꢃ
ꢻ
ꢻ
ꢆ
ꢶꢀ ꢀꢢ
ꢀ ꢆꢆ ꢆ ꢀꢢ
ꢦ ꢕ ꢲ
ꢍ
ꢀ
ꢆ
ꢈ
ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢀ
ꢗ
ꢂ
ꢅ
ꢓ
ꢆ
ꢀ
ꢜ
ꢂ
ꢢ
ꢓꢀ ꢃ
ꢀ
ꢶ
ꢓ ꢀ ꢆ ꢀ ꢶꢆ ꢀꢢ
ꢀ
ꢶ
ꢃ
ꢶꢈ
ꢜ
ꢢ
ꢀ ꢀ
ꢓꢅ ꢁ ꢅ ꢅꢆ ꢍ ꢢ
ꢗ
ꢈ
ꢀ
ꢉ
ꢆ
ꢧ
ꢀ
ꢃ ꢎꢱ ꢅ ꢶꢆ ꢯ
ꢗ
ꢀ
ꢁ
ꢂꢆ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢅ
ꢄ
ꢃ
ꢂ
ꢁ
ꢗ
ꢉ
ꢗ ꢀ ꢂ
ꢡꢀ ꢆ
ꢳꢗ ꢉꢂ ꢅ
ꢀ
ꢂ
ꢧ
ꢂ ꢶꢁ ꢧ
ꢓ
ꢅ
ꢂ
ꢓ ꢅꢃ
ꢓ
ꢀ
ꢀ
ꢀ
ꢆ
ꢆ
ꢆ
ꢀ
ꢢ
ꢆ
ꢶ
ꢀ
ꢀ
ꢢ
ꢓ
ꢀ
ꢉ
ꢢ
ꢳ
ꢋ
ꢪ
ꢁ
ꢠ
ꢁ
ꢆ
ꢮ
ꢡ
ꢀ
ꢂ
ꢀ
ꢠ
ꢂ
ꢉ
ꢀ
ꢇ
ꢀ
ꢶ
ꢆ
ꢜ
ꢢ
ꢅ
ꢶ
ꢅ
ꢜ
ꢗ
ꢀ
ꢂ
ꢧ
ꢡꢀ ꢅ
ꢳꢗ ꢉꢂ ꢁ
ꢗꢅ ꢁ
ꢀ ꢶꢆ ꢧ
ꢗ
ꢀ
ꢆ
ꢀ
ꢆ
ꢅ
ꢅ
ꢓ
ꢅ
ꢄ
ꢅ
ꢅ
ꢆ
ꢆ
ꢍ
ꢢ
ꢈ
ꢶ
ꢆ
ꢎ
ꢱ
ꢅ
ꢶ
ꢆ
ꢯ
ꢗ
ꢀ
ꢀ
ꢄ
ꢇ
ꢡꢀꢀ
ꢳꢗ ꢉꢂ ꢅ
ꢗ
ꢀ
ꢅ
ꢅ
ꢅ
ꢓ
ꢅ
ꢀ
ꢢ
ꢓ ꢅꢅ
ꢆ ꢶꢀ ꢀꢢ
ꢗ
ꢆ
ꢀ
ꢶ
ꢃ
ꢅ
ꢗꢀ ꢄ
ꢀ ꢶ ꢆ ꢧ
ꢗ
ꢀ
ꢈ
ꢧ
ꢀ
ꢆ
ꢆ
ꢀ
ꢅ
ꢅ
ꢗ
ꢅ
ꢀ
ꢈ
ꢉ
ꢧ
ꢗ
ꢀ
ꢀ
ꢆ
ꢇ
ꢧ
ꢓꢀ ꢄ
ꢀꢆ ꢆ ꢜꢢ
ꢗ
ꢅ
ꢅ
ꢈ
ꢃ
ꢆ
ꢗ
ꢅ
ꢄ
ꢳ
ꢔ
ꢓ
ꢉ
ꢀ
ꢆ
ꢀ
ꢀ
ꢃ
ꢈ
ꢶ
ꢂ
ꢧ
ꢗ
ꢅ
ꢀ
ꢧ
ꢓꢀ ꢇ
ꢀ ꢆꢆ ꢜ ꢢ
ꢡ
ꢀ
ꢃ
ꢃ
ꢀ
ꢆ
ꢀ
ꢠ
ꢈ
ꢄ
ꢄ
ꢓ
ꢄ
ꢅ
ꢜ
ꢆ
ꢢ
ꢄ
ꢋ
ꢻ
ꢃ
ꢄ
ꢀ
ꢗ
ꢅ
ꢂ
ꢧ
ꢓ ꢀꢅ
ꢁ ꢶꢉ ꢜꢢ
ꢗ
ꢅ ꢶꢂ
ꢅ
ꢅ
ꢧ
ꢀ
ꢶ
ꢆ
* Diode D15 is required if the negative current into the output pin exceeds 15 mA.
Figure 49. 250 W Input Power Off−Line Flyback Converter with MOSFET Switch
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377
MC44603A
250 W Input Power Fly−Back Converter
185 V − 270 V Mains Range
MC44603AP & MTP6N60E
Tests
Conditions
Results
Line Regulation
V
= 185 VAC to 270 VAC
in
F
= 50 Hz
mains
150 V
130 V
114 V
7.0 V
I
I
I
I
= 0.6 A
10 mV
10 mV
10 mV
20 mV
out
out
out
out
= 2.0 A
= 2.0 A
= 2.0 A
Load Regulation
150 V
V
out
= 220 VAC
= 0.3 A to 0.6 A
in
I
50 mV
Cross Regulation
V
= 220 VAC
in
out
out
out
out
I
I
I
I
(150 V) = 0.6 A
(30 V) = 0 A to 2.0 A
(14 V) = 2.0 A
(7.0 V) = 2.0 A
150 V
< 1.0 mV
81%
Efficiency
V
V
= 220 VAC, P = 250 W
in
in
Standby Mode
P input
= 220 VAC, P = 0 W
3.3 W
in
out
Switching Frequency
Output Short Circuit
Startup
20 kHz fully stable
Safe on all outputs
VAC = 160 V
P
P
= 270 W
out (max)
= 250 W
in
DEVICE ORDERING INFORMATION
†
Device
Operating Temperature Range
Package
PDIP−16
SOIC−16
SOIC−16
Shipping
MC44603P
25 Units / Rail
47 Units / Rail
MC44603ADW
MCRR602ADWR2
MC44603APG
TA = −25°C to +85°C
1000 / Tape & Reel
25 Units / Rail
SOIC−16
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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378
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