STV6688A [STMICROELECTRONICS]

Video Switch Matrix for TV Applications with S Terminal; 视频切换矩阵的电视应用程序与S端子
STV6688A
型号: STV6688A
厂家: ST    ST
描述:

Video Switch Matrix for TV Applications with S Terminal
视频切换矩阵的电视应用程序与S端子

复用器 开关 复用器或开关 信号电路 电视 光电二极管
文件: 总12页 (文件大小:148K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
®
STV6688  
Video Switch Matrix for TV Applications with S Terminal  
PRODUCT PREVIEW  
Key Features  
I²C Bus Control  
Standby Mode  
4 Y/CVBS Inputs (one for internal TV signal)  
4 C Inputs (one for internal TV signal)  
1 Y/C Adder  
PDIP20  
1 Y/CVBS and 1 C Output, each with 0 dB gain  
Order Code: STV6688  
1 CVBS Output with 6 dB gain and 150 Ω  
Buffer for Monitor  
SYNC Bottom Clamp on all CVBS/Y and  
Average Bias on C Inputs  
Bandwidth: 15 MHz  
Crosstalk: 50 dB (min.)  
PSO20  
Order Code: STV6688A  
General Description  
Pin Connections  
The STV6688 is a highly-integrated I²C bus-  
controlled video switch matrix, optimized for use in  
color TV applications.  
Y/CVBS_IN1  
C_IN1  
DEC  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
1
Y/CVBS_IN_TV  
C_IN_TV  
VCC_B  
2
It is used to control the switching of 4 video signals.  
These signals can be in Single Component form  
(CVBS) or in Two Component form (Y/C). In both  
cases, the STV6688 microcontroller provides a  
CVBS signal for an external device (monitor).  
VCC_V  
3
Y/CVBS_IN2  
C_IN2  
4
CVBS_OUT  
GND_B  
5
GND_V  
Y/CVBS_IN3  
C_IN3  
6
Y/CVBS_OUT  
C_OUT  
7
8
9
VDD  
GND  
10  
SDA  
SCL  
September 2003  
1/12  
This is preliminary information on a new product now in development. Details are subject to change without notice.  
Functional Description  
STV6688  
1
Functional Description  
Table 1: Pin List  
Pin  
Pin  
Symbol  
Description  
Symbol  
SCL  
Description  
1
2
Y/CVBS_IN1  
C_IN1  
Y or CVBS Signal of Ext. Input 1  
C Signal of Ext. Input 1  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
Serial Clock Line Input  
Digital Parts Ground  
C Signal Output  
GND  
3
VCC_V  
Video Switch Power Supply  
Y or CVBS Signal of Ext. Input 2  
C Signal of Ext. Input 2  
C_OUT  
4
Y/CVBS_IN2  
C_IN2  
Y/CVBS_OUT  
GND_B  
Y/CVBS Output  
5
Buffer Ground  
6
GND_V  
Y/CVBS_IN3  
C_IN3  
Video Switch Ground  
CVBS_OUT  
VCC B  
Y and C Adder Output  
Buffer Power Supply  
C Signal of TV Input  
Y or CVBS Signal of TV Input  
Decoupling  
7
Y or CVBS Signal of Ext. Input 3  
C Signal of Ext. Input 3  
8
C_IN_TV  
Y/CVBS_IN_TV  
DEC  
9
VDD  
Digital Parts Power Supply  
Serial Data Line Input  
10  
SDA  
Figure 1: STV6688 Block Diagram  
Y/CVBS_IN TV  
19  
Y/CVBS_IN1  
Y/CVBS_IN2  
Y/CVBS_IN3  
1
4
Y/CVBS_OUT  
14  
0dB  
7
CVBS_OUT  
+
Buffer  
6dB  
16  
Clamp  
Clamp  
18  
2
C_IN TV  
C_IN1  
0dB  
13 C_OUT  
C_IN2  
Clamp  
Clamp  
5
Mute  
C_IN3  
8
Buffer  
Power  
Supply  
V
REF  
17  
3
V
V
B
V
CC  
Video  
Power  
Supply  
CC  
V
DD  
9
DEC  
I²C Bus Decoder  
20  
12  
15  
6
11  
10  
GND  
SDA  
SCL  
GND B  
GND V  
2/12  
STV6688  
Electrical Characteristics  
2
Electrical Characteristics  
TAMB = 25°C, VCCV = VCCB = VDD = 5V, RLoadYC = 4.7 kΩ, RLoadCVBS = 150 , unless otherwise  
specified.  
Symbol  
Parameter  
Digital Supply Voltage  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
V
4.5  
4.5  
4.5  
5
5
5
5.5  
5.5  
5.5  
V
V
V
DD  
V
Video Operating Supply Voltage  
Buffer Supply Voltage  
CC  
V
CCB  
Active (Channels ON)  
Digital Supply Current  
Total Video Supply Current  
I
V
= 5 V  
DD  
3
mA  
mA  
DD  
I
V
V
= 5 V, No load  
CC  
13  
25  
CCV  
(V  
V
)
= V  
= 5V, with loads and  
CCB  
CC, CCBi  
CCV  
signals  
Standby (All Channels OFF)  
Digital Supply Current  
I
V
V
= 5 V  
3
mA  
mA  
DD  
DD  
I
Total Video Supply Current  
= 5 V  
0.3  
CCVstd  
CC  
2.1  
Thermal Data  
Symbol  
Parameter  
Package  
Value  
Unit  
R
Maximum Junction-to-Ambient Thermal Resistance  
DIP20 (STV6688)  
80  
°C/W  
°C/W  
thJA  
SO20 (STV6688A)  
100  
2.2  
Y/CVBS Section  
TAMB = 25°C, VCCV = VCCB = VDD = 5V, RLoadYC = 4.7 kΩ, RLoadCVBS = 150 , unless otherwise  
specified.  
Symbol  
Parameter  
DC Input Level  
Test Conditions  
Bottom Sync pulse  
Min.  
Typ.  
Max.  
Unit  
V
2
2
1
2
V
DCIN  
I
Clamping Current  
at V  
-400 mV  
= V + 1 V  
DCIN  
1
mA  
µA  
pF  
CLAMP  
DCIN  
I
Input Leakage Current  
Input Capacitance  
V
10  
LEAK  
IN  
C
IN  
V
Max Input Signal  
V
= 5 V  
V
1.5  
1.5  
3
IN  
CC  
PP  
DYNY  
Dynamic Y/CVBS Output Signal  
V
= 5 V  
= 5 V  
V
CC  
PP  
DYNCVBS Dynamic CVBS Output Signal  
BW Bandwidth at -3 dB  
V
V
CC  
PP  
MHz  
Y/CVBS  
Y/C Mixer (on CVBS_OUT)  
V
= 1 V  
12  
8
15  
10  
IN  
PP  
V
= 1 V  
PP  
IN  
3/12  
Electrical Characteristics  
STV6688  
Unit  
Symbol  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Flatness  
Spread of Gain in Video Band  
(15 kHz-5 MHz)  
Y/CVBS  
V
V
= 1 V  
±0.2  
±0.5  
±0.5  
±1.0  
dB  
IN  
IN  
PP  
PP  
Y/C Mixer (on CVBS_OUT)  
= 1 V  
CTi  
Crosstalk Isolation between  
Y/CVBS Input Channels  
V
= 1 V at f = 4.43 MHz, on  
PP  
IN  
55  
50  
60  
55  
dB  
dB  
one point.  
V = 1 V at f = 4.43 MHz, on  
IN  
CTo  
Crosstalk Isolation of Y/CVBS from C  
Channels  
PP  
one point.  
GYCVBS  
GCVBS  
Gain at Y/CVBS out @1 MHz  
Gain at CVBS out @1 MHz  
Y/CVBS Output Resistance  
CVBS Output Resistance  
V
= 1 V  
= 1 V  
-0.5  
5.5  
0
6
+0.5  
6.5  
5.0  
5
dB  
dB  
IN  
IN  
PP  
PP  
V
R
2.5  
1
OUTY  
R
OUTCVBS  
G
Gain matching between Y, CVBS  
inputs  
V
= 1 V  
YCVBSM  
IN  
PP  
-0.5  
0
+0.5  
dB  
DC  
DC CVBS Output voltage  
DC Y Output voltage  
Differential Phase  
Bottom sync pulse  
0.8  
1.3  
1
V
V
OUTCVBS  
DC  
Bottom sync pulse for Y  
OUTY  
DPHI  
V
V
= 1 V at f = 4.43 MHz  
3
5
3
deg  
IN  
IN  
PP  
DG  
Differential Gain  
= 1 V at f = 4.43 MHz  
1
%
%
PP  
LNL  
Luminance non-linearity  
Video S/N ratio  
0.6  
VSN  
Refer to Note 1  
65  
dB  
Note: 1 S/N = 20log (VOUT Black to White = 0.7 VPP/VNoise (mVRMS) weighted CCIR567).  
2.3  
Chroma Section  
TAMB = 25°C, VCCV = VCCB = VDD = 5V, RLoadYC = 4.7 kΩ, RLoadCVBS = 150 , unless otherwise  
specified.  
Symbol  
Parameter  
DC Input Level  
Test Conditions  
Min.  
Typ.  
3
Max.  
Unit  
V
V
DCIN  
R
C
V
Input Resistance  
30  
50  
2
kΩ  
pF  
IN  
IN  
IN  
Input Capacitance  
Max Input Signal  
1.5  
1.5  
V
V
PP  
PP  
DYN  
CBW  
CTi  
Dynamic Output Signal  
Chroma Bandwidth  
C = 1 V  
10  
55  
12  
60  
MHz  
dB  
IN  
PP  
Crosstalk Isolation between C Input  
Channels  
C
= 0. 5V at f = 4.43 MHz, on  
PP  
IN  
one point.  
CTo  
Crosstalk Isolation of C from Y  
Channels  
V
= 1 V at f = 4.43 MHz, on  
50  
55  
dB  
IN  
PP  
one point.  
R
Output Resistance  
2.5  
0
5.0  
dB  
V
OUT  
G
Gain at C_OUT @4.43 MHz  
DC Output voltage  
V
= 1 V  
PP  
-0.5  
+0.5  
OUTC  
IN  
DC  
2.2  
OUTC  
4/12  
STV6688  
Electrical Characteristics  
Symbol  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
+0.5  
10  
Unit  
dB  
G
Gain matching between C inputs  
Chroma to Luma delay, Y/C source  
V
V
= 1 V  
-0.5  
0
5
CM  
IN  
PP  
CToYdel  
@4.43 MHz  
ns  
PP  
5/12  
Electrical Characteristics  
STV6688  
2.4  
I²C Bus Characteristics  
TAMB = 25°C, VCCV = VCCB = VDD = 5V, RLoadYC = 4.7 kΩ, RLoadCVBS = 150 , unless otherwise  
specified.  
Symbol  
Address Selection Input  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
ADDsel_L Address Selection Low Level  
ADDsel_H Address Selection High Level  
0
0.2  
V
V
2.5  
V
DD  
ILEAK  
SCL  
Leakage Current  
10  
µA  
V
Low Level Input Voltage  
High Level Input Voltage  
Input Leakage Current  
-0.3  
3
1.5  
5.5  
10  
V
V
IL  
IH  
LI  
V
I
V
= 0 to 5.5 V  
-10  
0
µA  
IN  
IN  
SDA  
V
Low Level Input Voltage  
High Level Input Voltage  
Input Leakage Current  
Input Capacitance  
-0.3  
3
1.5  
5.5  
10  
V
V
IL  
IH  
LI  
V
I
V
= 0 to 5.5 V  
-10  
0
µA  
pF  
µs  
ns  
V
C
10  
I
t
Input Rise Time  
1.5 V to 3 V  
3 V to 1.5 V  
1
R
t
Input Fall Time  
300  
0.4  
250  
400  
F
V
Low Level Output Voltage  
Output Fall Time  
I
= 3 mA  
OL  
OL  
t
3 V to 1.5 V  
ns  
pF  
F
C
Load Capacitance  
L
Timing (Clock Frequency = 100 kHz, see Note 2)  
t
Clock Low Period  
4.7  
4
µs  
µs  
ns  
ns  
µs  
µs  
µs  
µs  
LOW  
t
Clock High Period  
HIGH  
t
Data Setup Time  
250  
0
SU,DAT  
HD,DAT  
SU,STO  
t
Data Hold Time  
340  
t
Setup Time from Clock High to Stop  
Start Setup Time following a Stop  
Start Hold Time  
4
t
4.7  
4
BUF  
t
t
HD,STA  
SU,STA  
Start Setup Time following Clock Low  
to High Transition  
4.7  
Note: 2 The device can also operate at 400 kHz.  
6/12  
STV6688  
Electrical Characteristics  
Figure 2: I²C Bus Timings  
SDA  
SCL  
SDA  
t
t
t
f
BUF  
LOW  
t
t
t
t
t
HD,STA  
r
HD,DAT  
HIGH  
SU,DAT  
t
(Start, Stop)  
SU,STA  
t
SU,STO  
The I²C Bus Decoder of the  
microcontroller provides the Automatic  
Incrementation mode in Write mode.  
2.5  
I²C Bus Selection  
Data transfers follow the usual I²C format:  
after the Start condition (S), a 7-bit slave  
address is sent, followed by an 8-bit word  
which is a data direction bit (W). An 8-bit  
sub-address is sent to select a register,  
followed by an 8-bit data word to be  
included in the register.  
String Format: Write Only mode (S =  
Start condition, P = Stop condition, A  
= Acknowledge)  
S
SLAVE ADDRESS: 94h  
A
00h  
A
DATA  
A
P
Input Signals Summary: (Write  
Mode)  
Data  
Reg.Addr.  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
(Hex)  
General  
Stand-by  
Buffer  
Stand-by  
Always set  
to 1  
Switch Control  
Input Signal: (Write Mode) Data Byte  
Data  
Reg.  
Addr.  
Description  
Bits  
Comments  
D7  
D6  
D5  
D4 D3  
D2  
D1  
D0  
0x00  
General Stand-by  
Buffer Stand-by  
1
1
2
0
1
X
X
1
1
X
X
X
X
X
X
X
X
X
X
All disabled  
All active  
X
X
0
1
1
1
X
X
X
X
X
X
X
X
X
X
Buffer disabled  
Buffer active  
Y/CVBS and  
C Selection  
X
X
X
X
X
X
X
X
1
1
1
1
X
X
X
X
X
X
X
X
X
X
X
X
0
0
1
1
0
1
0
1
INT TV  
IN1  
IN2  
IN3  
7/12  
Input/Output Groups  
STV6688  
3
Input/Output Groups  
Figure 3: Bottom Clamped Video Inputs  
(Pins 1, 4, 7 and 19)  
VCC 5 V  
VCC 5 V  
2 V + VD  
15 kΩ  
tri  
Protected Pad  
Figure 4: Average Clamped Video Inputs  
(Pins 2, 5, 8 and 18)  
VCC 5 V  
VCC 5 V  
IB  
25 kΩ  
25 kΩ  
3 V  
tri  
Protected Pad  
Figure 5: Video Outputs (Pins 13, 14 and 16)  
VCCB1,2 ...7 5 V  
VCC 5 V  
IB  
Protected Pad  
8/12  
STV6688  
Input/Output Groups  
Figure 6: I²C Bus SDA (Pin 10)  
VDD 5 V  
Float  
Acknowledge  
10 kΩ  
Protected Pad  
Figure 7: I²C Bus SCL (Pin 11)  
VDD 5 V  
Float  
10 kΩ  
Protected Pad  
9/12  
Package Mechanical Data  
STV6688  
4
Package Mechanical Data  
Figure 8: 20-Pin Plastic Single in Line Package (PDIP20)  
mm  
Inches  
Typ.  
Dim.  
Min.  
Typ.  
Max.  
Min.  
Max.  
A
A1  
A2  
b
5.33  
0.210  
0.38  
2.92  
0.36  
1.14  
0.20  
24.89  
0.015  
0.115  
0.014  
0.045  
0.008  
0.980  
3.30  
0.46  
1.52  
0.25  
4.95  
0.56  
1.78  
0.36  
26.92  
0.130  
0.018  
0.060  
0.010  
0.195  
0.022  
0.070  
0.014  
1.060  
b2  
c
D
e
2.54  
6.35  
3.30  
0.100  
0.250  
0.130  
E1  
L
6.10  
2.92  
7.11  
3.81  
0.240  
0.115  
0.280  
0.150  
10/12  
STV6688  
Package Mechanical Data  
Figure 9: 20-Pin Plastic Small Outline Package, 300-mil Width (PSO20)  
mm  
Inches  
Typ.  
Dim.  
Min.  
Typ.  
Max.  
Min.  
Max.  
A
A1  
B
C
D
E
2.35  
0.10  
0.33  
2.65  
0.0926  
0.0040  
0.0130  
0.1043  
0.51  
0.32  
0.0200  
0.0125  
0.5118  
0.2992  
4.98  
7.40  
13.00  
7.60  
0.1961  
0.2914  
e
1.27  
0.050  
H
h
10.01  
0.25  
0°  
10.64  
0.74  
8°  
0.394  
0.010  
0°  
0.419  
0.029  
8°  
K
L
0.41  
1.27  
0.10  
0.016  
0.050  
0.004  
G
Number of Pins  
20  
N
11/12  
STV6688  
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the  
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its  
use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications  
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously  
supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without  
express written approval of STMicroelectronics.  
The ST logo is a registered trademark of STMicroelectronics  
© 2003 STMicroelectronics - All Rights Reserved  
STMicroelectronics GROUP OF COMPANIES  
Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan  
Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A.  
www.st.com  
12/12  

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