VNH3SP3013TR [STMICROELECTRONICS]
IC,MOTOR CONTROLLER,SOP,30PIN;
| 型号： | VNH3SP3013TR |
| 厂家： | 
ST |
| 描述： | IC,MOTOR CONTROLLER,SOP,30PIN 电动机控制 光电二极管 |
| 文件： | 总26页 (文件大小：221K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
VNH3SP30
FULLY INTEGRATED H-BRIDGE MOTOR DRIVER
TYPE
VNH3SP30
R
(*)
I
V
CCmax
DS(on)
OUT
34mΩ
30 A
40 V
(*) Typical per leg at 25°C
■
OUTPUT CURRENT:30 A
■
■
5V LOGIC LEVEL COMPATIBLE INPUTS
UNDERVOLTAGE AND OVERVOLTAGE
SHUT-DOWN
MultiPowerSO-30
■
■
■
■
OVERVOLTAGE CLAMP
THERMAL SHUT DOWN
CROSS-CONDUCTION PROTECTION
LINEAR CURRENT LIMITER
VERY LOW STAND-BY POWER
CONSUMPTION
DESCRIPTION
The VNH3SP30 is a full bridge motor driver
intended for wide range of automotive
applications. The device incorporates a dual
monolithic HSD and two Low-Side switches. The
HSD switch is designed using STMicroelectronics
VIPower M0-3 technology that allows to efficiently
integrate on the same die a true Power MOSFET
with an intelligent signal/protection circuitry. The
Low-Side switches are vertical MOSFETs
a
■
■
■
PWM OPERATION UP TO 10 KHz
PROTECTION AGAINST:
LOSS OF GROUND AND LOSS OF V
CC
manufactured
using
STMicroelectronics
proprietary EHD (“STripFET™”) process.
BLOCK DIAGRAM
V
CC
O
V
+ U
V
OVERTEMPERATURE A
OVERTEMPERATURE B
CLAMP A
CLAMP B
HS
A
HS
B
DRIVER
HSA
DRIVER
HSB
LOGIC
CURRENT
CURRENT
LIMITATION A
LIMITATION B
OUT
OUT
B
A
DRIVER
LSA
DRIVER
LSB
LS
LS
B
A
DIAG /EN IN
PWM IN DIAG /EN
B B B
GND
GND
B
A
A
A
A
April 2004
1/26
VNH3SP30
The three dice are assembled in MultiPowerSO-30
package on electrically isolated leadframes. This
package, specifically designed for the harsh
automotive environment offers improved thermal
performance thanks to exposed die pads.
Moreover, its fully symmetrical mechanical design
allows superior manufacturability at board level.
up resistor, enable one leg of the bridge. They also
provide a feedback digital diagnostic signal. The
normal condition operation is explained in the truth
table on page 7. The PWM, up to 10KHz, lets us to
control the speed of the motor in all possible
conditions. In all cases, a low level state on the
PWM pin will turn off both the LS and LS
A
B
The input signals IN and IN can directly
switches. When PWM rises to a high level, LS or
A
B
A
interface to the microcontroller to select the motor
direction and the brake condition. The DIAG /EN
LS turn on again depending on the input pin
state.
B
A
A
or DIAG /EN , when connected to an external pull
B
B
CONNECTION DIAGRAM (TOP VIEW)
1
30
OUTA
OUTA
Nc
Vcc
Nc
Nc
OUTA
GNDA
Heat Slug3
GNDA
INA
ENA/DIAGA
Nc
GNDA
OUTA
Nc
VCC
PWM
Vcc
Heat Slug1
Nc
Nc
OUTB
ENB/DIAGB
INB
Nc
GNDB
GNDB
OUTB
Heat Slug2
Vcc
Nc
GNDB
Nc
15
16
OUTB
OUTB
PIN DEFINITIONS AND FUNCTIONS
PIN No
SYMBOL
FUNCTION
OUT Heat
Slug2
A,
1, 25, 30
Source of High-Side Switch A / Drain of Low-Side Switch A
Not connected
2, 4,7,9,12,14,17, 22,
24,29
NC
VCC, Heat
Slug1
3, 13, 23
Drain of High-Side Switches and Power Supply Voltage
5
6
8
9
IN
Clockwise Input
A
EN /DIAG
Status of High-Side and Low-Side Switches A; Open Drain Output
A
A
B
PWM
NC
PWM Input
Not connected
EN /DIAG
B
10
Status of High-Side and Low-Side Switches B; Open Drain Output
11
IN
Counter Clockwise Input
B
OUT Heat
Slug3
B,
15, 16, 21
Source of High-Side Switch B / Drain of Low-Side Switch B
26, 27, 28
18, 19, 20
GND
GND
Source of Low-Side Switch A (*)
Source of Low-Side Switch B (*)
A
B
(*) Note: GND and GND must be externally connected together
A
B
2/26
VNH3SP30
PIN FUNCTIONS DESCRIPTION
NAME
DESCRIPTION
V
Battery connection.
CC
GND
A
Power grounds, must always be externally connected together.
Power connections to the motor.
GND
B
OUT
OUT
A
B
Voltage controlled input pins with hysteresis, CMOS compatible. These two pins control the state of
IN
IN
A
the bridge in normal operation according to the truth table (brake to V , Brake to GND, clockwise and
CC
B
counterclockwise).
Voltage controlled input pin with hysteresis, CMOS compatible. Gates of Low-Side FETS get
modulated by the PWM signal during their ON phase allowing speed control of the motor
PWM
Open drain bidirectional logic pins. These pins must be connected to an external pull up resistor.When
externally pulled low, they disable half-bridge A or B. In case of fault detection (thermal shutdown of a
High-Side FET or excessive ON state voltage drop across a Low-Side FET), these pins are pulled low
by the device (see truth table in fault condition).
EN /DIAG
A
A
EN /DIAG
B
B
BLOCK DESCRIPTIONS
(see Electrical Block Diagram page 4)
NAME
DESCRIPTION
Allows the turn-on and the turn-off of the High Side and the Low Side
switches according to the truth table.
LOGIC CONTROL
Shut-down the device outside the range [5.5V..36V] for the battery
voltage.
OVERVOLTAGE + UNDERVOLTAGE
HIGH SIDE CLAMP VOLTAGE
HIGH SIDE AND LOW SIDE DRIVER
LINEAR CURRENT LIMITER
Protect the High-Side switches from the high voltage on the battery
line in all configuration for the motor.
Drive the gate of the concerned switch to allow a good R
leg of the bridge.
for the
DS(on)
In case of short circuit for the High-Side switch, limits the motor current
by reducing its electrical characteristics.
In case of short-circuit with the increase of the junction’s temperature,
shuts-down the concerned High-Side to prevent its degradation and to
protect the die.
OVERTEMPERATURE PROTECTION
Signalize an abnormal behavior of the switches in the half-bridge A or
B by pulling low the concerned ENx/DIAGx pin.
FAULT DETECTION
3/26
VNH3SP30
ABSOLUTE MAXIMUM RATING
Symbol
Parameter
Value
-0.3.. 40
30
Unit
V
V
Supply voltage
CC
I
Maximum output current (continuous)
Reverse output current (continuous)
A
max1
I
-30
A
R
I
Input current (IN and IN pins)
+/- 10
+/- 10
+/- 10
mA
mA
mA
IN
A
B
I
Enable input current (DIAG /EN and DIAG /EN pins)
EN
A
A
B
B
I
PWM input current
pw
Electrostatic discharge (R=1.5kΩ, C=100pF)
V
- Logic pins
4
5
KV
kV
°C
°C
°C
ESD
- Output pins: OUT OUT
V
B, CC
A,
T
Junction operating temperature
Case operating temperature
Storage temperature
Internally Limited
-40 to 150
-55 to 150
j
T
c
T
STG
CURRENT AND VOLTAGE CONVENTIONS
ICC
VCC
IINA
VCC
IOUTA
INA
OUTA
OUTB
IINB
IOUTB
INB
VOUTA
IENA
DIAGA/ENA
IENB
VOUTB
DIAGB/ENB
PWM
GNDA
GNDB
Ipw
GND
IGND
VENB
VINA VINB
Vpw
VENA
4/26
VNH3SP30
THERMAL DATA
See MultiPowerSO-30 Thermal Data section.
ELECTRICAL CHARACTERISTICS (V =9V up to 18V; -40°C<T <150°C; unless otherwise specified)
CC
j
POWER
Symbol
Parameter
Test Conditions
Min
Typ
Max
36
30
Unit
V
V
Operating supply voltage
5.5
CC
R
On state high side resistance
On state low side resistance
On state leg resistance
I
I
I
=12A; T =25°C
23
11
mΩ
mΩ
mΩ
mA
µA
ONHS
LOAD
LOAD
LOAD
j
R
=12A; T =25°C
15
ONLS
j
R
=12A
90
ON
ON state; V =V =5V
15
INA
INB
I
Supply current
s
OFF state
40
High Side Free-wheeling
Diode Forward Voltage
V
I =12A
0.8
1.1
3
V
f
f
T =25°C; V
=EN =0V;
X
j
=13VOUTX
µA
V
High Side Off State Output
Current (per channel)
CC
T =125°C; V
I
L(off)
=EN =0V;
j
OUTX
X
5
µA
V
=13V
CC
SWITCHING (V =13V, R
=1.1Ω)
CC
LOAD
Parameter
PWM frequency
Symbol
Test Conditions
Min
Typ
Max
10
Unit
kHz
µs
f
0
t
t
Turn-on delay time
Input rise time < 1µs (see fig. 3)
Input rise time < 1µs (see fig. 3)
(see fig. 2)
100
85
1.5
2
300
255
3
D(on)
Turn-off delay time
µs
D(off)
t
Output voltage rise time
Output voltage fall time
µs
r
t
(see fig. 2)
5
µs
f
Delay time during change of
operation mode
t
(see fig. 1)
600
1800
µs
DEL
PROTECTION AND DIAGNOSTIC
Symbol
Parameter
Undervoltage shut-down
Overvoltage shut-down
Current limitation
Test Conditions
Min
Typ
Max
Unit
V
V
5.5
USD
V
36
30
43
45
V
OV
I
A
LIM
Thermal shut-down
temperature
T
V
= 3.25 V
150
170
200
°C
TSD
IN
T
Thermal Reset Temperature
Thermal Hysteresis
135
7
°C
°C
TR
T
15
HYST
5/26
1
VNH3SP30
PWM
ELECTRICAL CHARACTERISTICS (continued)
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
V
V
PWM low level voltage
Low level PWM pin current
PWM high level voltage
High level PWM pin current
PWM hysteresis voltage
1.5
pwl
pwl
I
V
V
=1.5V
1
µA
V
pw
V
3.25
pwh
pwh
I
=3.25V
10
µA
V
pw
V
0.5
pwhhyst
I
I
= 1 mA
V
+0.3
V
+0.7
V +1.0
CC
V
pw
CC
CC
V
PWM clamp voltage
pwcl
= -1 mA
-5.0
-3.5
-2.0
-500
-2.0
V
pw
V
Test mode PWM pin voltage
-3.5
-0.5
V
pwtest
I
Test mode PWM pin current V
= -2.0V
-2000
µA
pwtest
pwtest
LOGIC INPUT (IN /IN )
A
B
Symbol
Parameter
Test Conditions
V =1.5V
Min
Typ
Max
Unit
V
V
Input low level voltage
Input current
1.5
IL
I
1
µA
V
INL
IN
V
Input high level voltage
Input current
3.25
IH
I
V =3.25V
10
µA
V
INH
IN
V
Input hysteresis voltage
0.5
6.0
IHYST
I =1mA
6.8
8.0
V
IN
V
Input clamp voltage
ICL
I =-1mA
-1.0
-0.7
-0.3
V
IN
ENABLE (LOGIC I/O PIN)
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
V
Normal operation
V
Enable low level voltage
1.5
(DIAG /EN pin acts as an
ENL
X
X
input pin)
I
Low level Enable pin current V = 1.5V
1
µA
V
ENL
EN
Normal operation
V
Enable high level voltage
3.25
(DIAG /EN pin acts as an
ENH
X
X
input pin)
High level Enable pin
current
I
V
= 3.25V
10
µA
ENH
EN
Normal operation
V
Enable hysteresis voltage
Enable clamp voltage
0.5
V
(DIAG /EN pin acts as an
input pin)
EHYST
X
X
I
I
=1mA
6.0
6.8
8.0
V
V
EN
V
ENCL
=-1mA
-1.0
-0.7
-0.3
EN
Fault operation
Enable output low level
voltage
(DIAG /EN pin acts as an
input pin)
X
X
V
0.4
V
DIAG
I
=1 mA
EN
6/26
2
VNH3SP30
WAVEFORMS AND TRUTH TABLE
TRUTH TABLE IN NORMAL OPERATING CONDITIONS
In normal operating conditions the DIAG /EN pin is considered as an input pin by the device. This pin must be externally
X
X
pulled high.
IN
IN
DIAG /EN
DIAG /EN
OUT
OUT
B
Comment
Brake to V
A
B
A
A
B
B
A
1
1
1
1
1
1
1
1
1
1
H
H
L
H
L
CC
1
0
0
0
1
0
Clockwise
H
L
Counter cw
L
Brake to GND
PWM pin usage:
In all cases, a “0” on the PWM pin will turn-off both LSA and LSB switches. When PWM rises back to “1”, LS or LS
A
B
turn on again depending on the input pin state.
NB: in no cases external pins (except for GND and GND ) are allowed to be connected with ground.
B
A
TYPICAL APPLICATION CIRCUIT FOR DC TO 10KHz PWM OPERATION
V
CC
Reg 5V
+5V
+5V
3.3K
3.3K
V
CC
1K
1K
DIAG /EN
B
DIAG /EN
B
A
A
1K
1K
HSA
HSB
OUT
OUT
A
PWM
B
µC
1K
IN
A
IN
B
CW
LSA
LSB
(*)
10K
M
GND
A
CCW
GND
B
S
G
b) N MOSFET
D
(*) Open load detection in off mode
7/26
VNH3SP30
REVERSE BATTERY PROTECTION
Three possible solutions can be thought of:
a) a Schottky diode
b) a N-channel MOSFET connected to the GND pin (see Typical Application Circuit on page 7)
c) a P-channel MOSFET connected to the V pin
D
connected to V
pin
CC
CC
The device sustains no more than -30A in reverse battery conditions because of the two Body diodes of
the Power MOSFETs. Additionally, in reverse battery condition the I/Os of VNH2SP30 will be pulled down
to the V
line (approximately -1.5V). Series resistor must be inserted to limit the current sunk from the
CC
microcontroller I/Os. If I
is the maximum target reverse current through µC I/Os, series resistor is:
Rmax
V
– V
IOs
I
CC
R = ------------------------------
Rmax
OPEN LOAD DETECTION IN OFF-MODE
It is possible for the microcontroller to detect an open load condition by adding a simply resistor (for
example 10kΩ) between one of the outputs of the bridge (for example OUT ) and one microcontroller
B
input. A possible sequence of inputs and enable signals is the following: IN =1, IN =X, EN = 1, EN =0.
A
B
A
B
-
-
normal condition: OUT =H and OUT =H
A B
open load condition: OUT =H and OUT =L: in this case the OUT pin is internally pulled down to
A
B
B
GND. This condition is detected on OUT pin by the microcontroller as an open load fault.
B
SHORT CIRCUIT PROTECTION
In case of a fault condition the DIAG /EN pin is considered as an output pin by the device.
X
X
The fault conditions are:
- overtemperature on one or both high sides;
- short to battery condition on the output (saturation detection on the Low-Side Power MOSFET).
Possible origins of fault conditions may be:
OUT is shorted to ground ---> overtemperature detection on high side A.
A
(1)
OUT is shorted to V ---> Low-Side Power MOSFET saturation detection.
A
CC
When a fault condition is detected, the user can know which power element is in fault by monitoring the
IN , IN , DIAG /EN and DIAG /EN pins.
A
B
A
A
B
B
In any case, when a fault is detected, the faulty half bridge is latched off. To turn-on the respective output
(OUT ) again, the input signal must rise from low to high level.
X
(1) An internal operational amplifier compares the Drain-Source MOSFET voltage with the internal reference (2.7V Typ.).
The relevant Lowside PowerMOS is switched off when its Drain-Source voltage exceeds the reference voltage.
TRUTH TABLE IN FAULT CONDITIONS (detected on OUT )
A
IN
IN
DIAG /EN
DIAG /EN
OUT
OUT
H
A
B
A
A
B
B
A
B
1
1
0
0
X
X
X
1
0
1
0
X
1
0
0
0
0
0
0
0
0
1
1
1
1
0
1
1
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
L
H
L
OPEN
H
OPEN
Fault Information
Protection Action
8/26
VNH3SP30
TEST MODE
The PWM pin allows to test the load connection between two half-bridges. In the test mode (V
=-2V)
pwm
the internal Power Mos gate drivers are disabled. The IN or IN inputs allow to turn-on the High Side A
A
B
or B, respectively, in order to connect one side of the load at V voltage. The check of the voltage on
CC
the other side of the load allow to verify the continuity of the load connection. In case of load
disconnection the DIAD /EN pin corresponding to the faulty output is pulled down.
X
X
ELECTRICAL TRANSIENT REQUIREMENTS
ISO T/R
Test Level
I
Test Level
II
Test Level
III
Test Level
IV
Test Levels
7637/1
Delays and Impedance
Test Pulse
1
2
-25V
+25V
-25V
-50V
+50V
-50V
-75V
+75V
-100V
+75V
-6V
-100V
+100V
-150V
+100V
-7V
2ms, 10Ω
0.2ms, 10Ω
0.1µs, 50Ω
0.1µs, 50Ω
100ms, 0.01Ω
400ms, 2Ω
3a
3b
4
+25V
-4V
+50V
-5V
5
+26.5V
+46.5V
+66.5V
+86.5V
ISO T/R
Test Levels Result
I
Test Levels Result
II
Test Levels Result
III
Test Levels Result
IV
7637/1
Test Pulse
1
2
C
C
C
C
C
C
C
C
C
C
C
E
C
C
C
C
C
E
C
C
C
C
C
E
3a
3b
4
5
Class
C
Contents
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device are not performed as designed after exposure to disturbance
and cannot be returned to proper operation without replacing the device.
E
9/26
1
VNH3SP30
HALF-BRIDGE CONFIGURATION
The VNH3SP30 can be used as a high power half-bridge driver achieving an on resistance
per leg of 22.5mΩ. Suggested configuration is the following:
V
CC
IN
IN
IN
A
B
A
A
B
IN
DIAG /EN
DIAG /EN
A
A
A
B
DIAG /EN
DIAG /EN
B
B
B
PWM
PWM
OUT
A
OUT
OUT
OUT
M
B
B
A
GND
GND
B
GND
GND
B
A
A
MULTI-MOTORS CONFIGURATION
The VNH3SP30 can easily be designed in multi-motors driving applications such as seat
positioning systems where only one motor must be driven at a time. DIAG /EN pins allow
X
X
to put unused half-bridges in high impedance. Suggested configuration is the following:
V
CC
IN
IN
IN
IN
A
B
A
B
DIAG /EN
DIAG /EN
A
A
A
A
DIAG /EN
DIAG /EN
PWM
B
B
B
B
PWM
OUT
A
OUT
OUT
OUT
B
M
2
B
A
GND
GND
B
GND
GND
B
A
A
M
M
1
3
10/26
VNH3SP30
Figure 1: Definition of the delay times measurement (example of clockwise operation)
V
INA,
t
V
INB
t
PWM
t
I
LOAD
t
DEL
t
DEL
t
Figure 2: Definition of the Low Side Switching times
PWM
t
V
OUTA, B
90%
80%
t
f
t
r
t
10%
20%
11/26
VNH3SP30
Figure 3: Definition of the High side Switching times
V
INA,
t
t
D(off)
D(on)
t
V
OUTA
90%
10%
t
12/26
VNH3SP30
Waveforms
NORMAL OPERATION (DIAG /EN =1, DIAG /EN =1)
A
A
B
B
DIAG /EN
A
A
B
DIAG /EN
B
IN
IN
A
B
PWM
OUT
A
OUT
B
(int. pin) GATE
(int. pin) GATE
A
B
NORMAL OPERATION (DIAG /EN =1, DIAG /EN =0 and DIAG /EN =0, DIAG /EN =1)
A
A
B
B
A
A
B
B
DIAG /EN
A
A
B
DIAG /EN
B
IN
IN
A
B
PWM
OUT
A
OUT
B
(int. pin) GATE
(int. pin) GATE
A
B
CURRENT LIMITATION/THERMAL SHUTDOWN or OUT SHORTED TO GROUND
A
IN
IN
A
B
I
LIM
I
OUTA
T
TSD
T
j
DIAG /EN
A
A
B
DIAG /EN
B
(int. pin) GATE
(int. pin) GATE
A
B
normal operation
normal operation
OUT shorted to ground
A
13/26
VNH3SP30
Waveforms (Continued)
OUT shorted to V and undervoltage shutdown
A
CC
IN
IN
A
B
OUT
A
OUT
B
(int. pin) GATE
A
B
(int. pin) GATE
DIAG /EN
B
B
A
DIAG /EN
A
V
CC
normal operation
OUT shorted to V
normal operation
undervoltage shutdown
A
CC
Load disconnection test (IN =1, PWM=-2V)
A
IN
IN
A
B
PWM
(test mode)
OUT
A
OUT
B
(int. pin)GATE
A
(int. pin) GATE
B
DIAG /EN
A
A
DIAG /EN
B
B
load connected
load connected back
load disconnected
14/26
VNH3SP30
Off State Supply Current
On State Supply Current
Is (uA)
Is (mA)
50
8
45
7
Vcc=18V
Vcc=18V
INA or INB=5V
40
6
35
30
25
20
15
10
5
5
4
3
2
1
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
Tc (ºC)
High Level Input Current
Input Clamp Voltage
Iinh (µA)
Vicl (V)
8
8
7
7.75
Vin=3.25V
Iin=1mA
6
7.5
5
4
3
2
1
0
7.25
7
6.75
6.5
6.25
6
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100 125 150
175
Tc (ºC)
Tc (ºC)
Input High Level Voltage
Input Low Level Voltage
Vih (V)
Vil (V)
3.6
2.8
2.6
2.4
2.2
2
3.4
3.2
3
2.8
2.6
2.4
2.2
2
1.8
1.6
1.4
1.2
1
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
Tc (ºC)
15/26
VNH3SP30
Input Hysteresis Voltage
High Level Enable Pin Current
Ienh (µA)
Vihyst (V)
8
2
1.8
7
Vcc=13V
Ven=3.25V
1.6
6
1.4
1.2
1
5
4
3
2
1
0
0.8
0.6
0.4
0.2
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
Tc (ºC)
High Level Enable Voltage
Low Level Enable Voltage
Venl (V)
Venh (V)
2.8
4
3.8
2.6
Vcc=9V
Vcc=9V
3.6
2.4
3.4
3.2
3
2.2
2
1.8
1.6
1.4
1.2
1
2.8
2.6
2.4
2.2
2
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
Tc (ºC)
Enable Clamp Voltage
Enable Output Low Level Voltage
Vdiag (V)
Vencl (V)
0.6
8
0.525
7.75
Ien=1mA
Ien=1mA
0.45
7.5
0.375
0.3
7.25
7
0.225
0.15
0.075
0
6.75
6.5
6.25
6
-50
-25
0
25
50
75
100 125 150 175
-50
-25
0
25
50
75
100
125 150
175
Tc (ºC)
Tc (ºC)
16/26
VNH3SP30
PWM High Level Voltage
PWM Low Level Voltage
Vpwl (V)
Vpwh (V)
2.8
5
4.5
2.6
Vcc=9V
Vcc=9V
2.4
4
3.5
3
2.2
2
2.5
2
1.8
1.6
1.4
1.2
1
1.5
1
0.5
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
Tc (ºC)
Overvoltage Shutdown
PWM High Level Current
Vov (V)
Ipwh (µA)
54
8
52
50
48
46
44
42
40
38
36
34
7
Vcc=9V
Vpw=3.25V
6
5
4
3
2
1
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
Tc (ºC)
Current Limitation
Undervoltage Shutdown
Ilim (A)
Vusd (V)
80
7
75
70
65
60
55
50
45
40
35
30
6.5
6
5.5
5
4.5
4
3.5
3
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
Tc (ºC)
17/26
VNH3SP30
On State High Side Resistance Vs. T
On State High Side Resistance Vs. V
case
CC
Ronhs (mOhm)
Ronhs (mOhm)
80
80
70
70
Iload=12A
Iload=12A
Vcc=9V; 13V; 18V
60
60
50
40
30
20
10
0
50
Tc= 150ºC
40
30
20
10
0
Tc= 25ºC
Tc= -40ºC
-50
-25
0
25
50
75
100
125
150
175
8
9
10 11 12 13 14 15 16 17 18 19 20
Vcc (V)
Tc (ºC)
On State Low Side Resistance Vs. T
On State Low Side Resistance Vs. V
case
CC
Ronls (mOhm)
Ronls (mOhm)
40
40
35
35
Iload=12A
Iload=12A
Vcc=9V; 13V; 18V
30
30
25
20
15
10
5
25
Tc= 150ºC
20
15
10
5
Tc= 25ºC
Tc= -40ºC
0
0
-50
-25
0
25
50
75
100
125
150
175
8
9
10 11 12 13 14 15 16 17 18 19 20
Vcc (V)
Tc (ºC)
Delay Time during change of operation mode
On State Leg Resistance
tdel (µs)
Ron (mOhm)
1000
90
900
800
700
600
500
400
300
200
100
0
80
70
60
50
40
30
20
10
0
-50
-25
0
25
50
75
100 125 150 175
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
Tc (ºC)
18/26
VNH3SP30
Turn-on Delay Time
Turn-off Delay Time
td(off) (µs)
td(on) (µs)
150
100
140
130
120
110
100
90
90
80
70
60
50
40
30
20
10
0
80
70
60
50
-50
-25
0
25
50
75
100 125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
Tc (ºC)
Output Voltage Rise Time
Output Voltage Fall Time
tf (µs)
tr (µs)
5
1
4.5
4
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
3.5
3
2.5
2
1.5
1
0.5
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
Tc (ºC)
19/26
VNH3SP30
MultiPowerSO-30 THERMAL DATA
MultiPowerSO-30 PC Board
Layout condition of R and Z measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm,
th
th
2
Cu thickness=35µm, Copper areas: from minimum pad lay-out to 16cm ).
CHIPSET CONFIGURATION
HIGH SIDE
CHIP
HSAB
LOW SIDE
CHIP B
LOW SIDE
CHIP A
LSB
LSA
Auto and mutual R
definitions)
Vs PCB copper area in open box free air condition (according to page 20
thj-amb
°C/W
45
40
35
30
25
20
15
10
5
RthA
RthB = RthC
RthAB = RthAC
RthBC
0
0
5
10
15
20
cm2 of Cu Area (refer to PCB layout)
20/26
VNH3SP30
THERMAL CALCULATION IN CLOCKWISE AND ANTI-CLOCKWISE OPERATION IN STEADY-
STATE MODE
HS
HS
LS
LS
T
T
T
jLSB
A
B
A
B
jHSAB
jLSA
P
R
dHSA x R
+ PdLSB x
amb
P
R
dHSA x R
+ PdLSB x
P
R
dHSA x R
+ PdLSB x
+ PdLSA x
thHS
thHSLS
thHSLS
ON
OFF
ON
OFF
ON
ON
+ T
+ T
+ T
thHSLS
thLSLS
amb
thLS
amb
PdHSB x R
+ PdLSA x
amb
PdHSB x R
+ PdLSA x PdHSB x R
thHS
thHSLS
amb
thHSLS
OFF
OFF
R
+ T
R
+ T
R
+ T
thLSLS amb
thHSLS
thLS
Thermal resistances definition (values according to the PCB heatsink area)
R
= R
= R
= High Side Chip Thermal Resistance Junction to Ambient (HS or HS in ON
thHSB A B
thHS
thHSA
state)
R
R
= R
= R
= Low Side Chip Thermal Resistance Junction to Ambient
thLSB
thLS
thHSLS
thLSA
= R
= R
= Mutual Thermal Resistance Junction to Ambient between High Side
thHSBLSA
thHSALSB
and Low Side Chips
= R
R
= Mutual Thermal Resistance Junction to Ambient between Low Side Chips
thLSALSB
thLSLS
THERMAL CALCULATION IN TRANSIENT MODE (*)
T
T
= Z
x P
+ Z
x (P
+ P
) + T
jHSAB
thHS
dHSAB
thHSLS
dLSA
dLSB amb
= Z
x P
+ Z
+ Z
x P
+ Z
x P
x P
+ T
jLSA
jLSB
thHSLS
thHSLS
dHSAB
dHSAB
thLS
dLSA
thLSLS
dLSB
dLSB
amb
amb
T
= Z
x P
x P
+ Z
+ T
thLSLS
dLSA
thLS
Single pulse thermal impedance definition (values according to the PCB heatsink area)
Z
Z
Z
= High Side Chip Thermal Impedance Junction to Ambient
thHS
thLS
= Z
= Z
= Low Side Chip Thermal Impedance Junction to Ambient
thLSB
thLSA
= Z
= Z
= Mutual Thermal Impedance Junction to Ambient between High Side
thHSLS
thHSABLSA
thHSABLSB
and Low Side Chips
= Z
Z
= Mutual Thermal Impedance Junction to Ambient between Low Side Chips
thLSALSB
thLSLS
Pulse calculation formula
= R (1 – δ)
Z
δ + Z
THδ
TH
δ = t ⁄ T
THtp
where
p
(*) Calculation is valid in any dynamic operating condition. P values set by user.
d
21/26
VNH3SP30
MultiPowerSO-30 HSD Thermal Impedance Junction Ambient Single Pulse
10 0
Footprint
2
4 cm
2
8 cm
2
16 cm
Z
thHS
Footprint
2
1 0
4 cm
2
8 cm
2
16 cm
Z
thHSLS
W
°C/
1
0 .1
0 .0 0 1
0 .0 1
0 .1
ti m e (se c)
1
1 0
1 0 0
10 0 0
MultiPowerSO-30 LSD Thermal Impedance Junction Ambient Single Pulse
1 0 0
Footprint
2
4 cm
2
8 cm
Z
thLS
2
16 cm
Footprint
2
1 0
4 cm
2
8 cm
Z
thLSLS
2
16 cm
W
/
°C
1
0 .1
0 .0 0 1
t i m e ( se c )
0 .0 1
0 .1
1
1 0
1 0 0
1 0 0 0
22/26
VNH3SP30
Thermal fitting model of an H-Bridge in MultiPowerSO-30
Thermal Parameter (*)
2
Area/island (cm )
Footprint
0.05
0.3
4
8
16
R1=R7 (°C/W)
R2=R8 (°C/W)
R3 (°C/W)
0.5
R4 (°C/W)
1.3
R5 (°C/W)
1.4
R6 (°C/W)
44.7
0.6
39.1
36.1
31.6
30.4
23.7
20.8
R9=R10=R15=R16 (°C/W)
R11=R17 (°C/W)
R12=R18 (°C/W)
R13=R19 (°C/W)
R14=R20 (°C/W)
R21=R22=R23 (°C/W)
C1=C7 (W.s/°C)
C2=C8 (W.s/°C)
C3 (W.s/°C)
0.8
1.5
20
46.9
115
0.001
0.005
0.02
0.3
C4=C13=C19 (W.s/°C)
C5 (W.s/°C)
0.6
C6 (W.s/°C)
5
7
9
11
C9=C15 (W.s/°C)
C10=C11=C16=C17 (W.s/°C)
C12=C18 (W.s/°C)
C14=C20 (W.s/°C)
0.001
0.003
0.075
2.5
3.5
4.5
5.5
(*) The blank space means that the value is the same as the previous one.
23/26
VNH3SP30
MultiPowerSO-30 MECHANICAL DATA
mm.
DIM.
MIN.
TYP
MAX.
2.35
2.25
0.1
A
A2
A3
B
1.85
0
0.42
0.23
17.1
18.85
15.9
0.58
0.32
17.3
19.15
16.1
C
D
17.2
E
E1
e
16
1
F1
F2
F3
L
5.55
4.6
6.05
5.1
9.6
10.1
1.15
10deg
7deg
0.8
N
S
0deg
24/26
2
VNH3SP30
MultiPowerSO-30 SUGGESTED PAD LAY-OUT
25/26
VNH3SP30
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a trademark of STMicroelectronics
2004 STMicroelectronics - Printed in ITALY- All Rights Reserved.
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia -
Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A.
http://www.st.com
26/26
相关型号：
©2020 ICPDF网 联系我们和版权申明