NVHL027N65S3F [ONSEMI]
单 N 沟道功率 MOSFET SUPERFET® III，FRFET®，650 V，75 A，27.4 mΩ，TO-247;
| 型号： | NVHL027N65S3F |
| 厂家： | 
ONSEMI |
| 描述： | 单 N 沟道功率 MOSFET SUPERFET® III，FRFET®，650 V，75 A，27.4 mΩ，TO-247 |
| 文件： | 总11页 (文件大小：605K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MOSFET – Power,
N-Channel, SUPERFET) III,
FRFET)
650 V, 75 A, 27.4 mW
NVHL027N65S3F
Description
www.onsemi.com
SUPERFET III MOSFET is ON Semiconductor’s brand−new high
voltage super−junction (SJ) MOSFET family that is utilizing charge
balance technology for outstanding low on−resistance and lower gate
charge performance. This advanced technology is tailored to minimize
conduction loss, provide superior switching performance, and
withstand extreme dv/dt rate.
Consequently, SUPERFET III MOSFET is very suitable for the
various power system for miniaturization and higher efficiency.
SUPERFET III FRFET MOSFET’s optimized reverse recovery
performance of body diode can remove additional component and
improve system reliability.
V
R
MAX
I MAX
D
DSS
DS(ON)
650 V
27.4 mW @ 10 V
75 A
D
G
Features
• 700 V @ T = 150°C
J
S
• Typ. R
= 21.5 mW
DS(on)
POWER MOSFET
• Ultra Low Gate Charge (Typ. Q = 227 nC)
g
• Low Effective Output Capacitance (Typ. C
= 1880 pF)
oss(eff.)
• 100% Avalanche Tested
• AEC−Q101 Qualified and PPAP Capable
Applications
G
• Automotive On Board Charger HEV−EV
• Automotive DC/DC Converter for HEV−EV
D
S
TO−247 LONG LEADS
CASE 340CX
MARKING DIAGRAM
$Y&Z&3&K
NVHL
027N65S3F
$Y
&Z
&3
&K
= ON Semiconductor Logo
= Assembly Plant Code
= Data Code (Year & Week)
= Lot
NVHL027N65S3F = Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
March, 2020 − Rev. 3
NVHL027N65S3F/D
NVHL027N65S3F
ABSOLUTE MAXIMUM RATINGS (T = 25°C, Unless otherwise noted)
C
Symbol
Parameter
NVHL027N65S3F
Unit
V
V
DSS
V
GSS
Drain to Source Voltage
Gate to Source Voltage
650
30
− DC
V
− AC (f > 1 Hz)
30
I
D
Drain Current
− Continuous (T = 25°C)
75
A
C
− Continuous (T = 100°C)
60
C
I
Drain Current
− Pulsed (Note 1)
187.5
1610
15
A
mJ
A
DM
E
Single Pulsed Avalanche Energy (Note 2)
Avalanche Current (Note 2)
Repetitive Avalanche Energy (Note 1)
MOSFET dv/dt
AS
AS
I
E
5.95
100
mJ
V/ns
AR
dv/dt
Peak Diode Recovery dv/dt (Note 3)
Power Dissipation
50
P
(T = 25°C)
595
W
W/°C
°C
D
C
− Derate Above 25°C
4.76
−55 to +150
300
T , T
Operating and Storage Temperature Range
J
STG
T
Maximum Lead Temperature for Soldering, 1/8″ from Case for 5 seconds
°C
L
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Repetitive rating: pulse−width limited by maximum junction temperature.
2. I = 15 A, R = 25 W, starting T = 25°C.
AS
G
J
3. I ≤ 37.5 A, di/dt ≤ 200 A/ms, V ≤ 400 V, starting T = 25°C.
SD
DD
J
THERMAL CHARACTERISTICS
Symbol
Parameter
NVHL027N65S3F
Unit
R
Thermal Resistance, Junction to Case, Max.
Thermal Resistance, Junction to Ambient, Max.
0.21
40
_C/W
q
JC
JA
R
q
PACKAGE MARKING AND ORDERING INFORMATION
Part Number
Top Marking
Package
Packing Method
Reel Size
N/A
Tape Width
Quantity
NVHL027N65S3F
NVHL027N65S3F
TO−247
Tube
N/A
30 Units
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2
NVHL027N65S3F
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
C
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
650
700
−
−
−
−
−
−
V
V
V
V
I
= 0 V, I = 1 mA, T = 25_C
DSS
GS
D
J
= 0 V, I = 10 mA, T = 150_C
GS
D
J
DBV
/ DT
Breakdown Voltage Temperature
Coefficient
= 20 mA, Referenced to 25_C
0.61
V/_C
DSS
J
D
I
Zero Gate Voltage Drain Current
V
DS
V
DS
V
GS
= 650 V, V = 0 V
−
−
−
−
590
−
10
−
mA
DSS
GS
= 520 V, T = 125_C
C
I
Gate to Body Leakage Current
=
30 V, V = 0 V
100
nA
GSS
DS
ON CHARACTERISTICS
V
Gate Threshold Voltage
V
GS
V
GS
V
DS
= V , I = 3 mA
3.0
−
−
5.0
27.4
−
V
mW
S
GS(th)
DS(on)
DS
D
R
Static Drain to Source On Resistance
Forward Transconductance
= 10 V, I = 35 A
21.5
57
D
g
FS
= 20 V, I = 37.5 A
−
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= 400 V, V = 0 V, f = 1 MHz
−
−
−
−
−
−
−
−
7780
200
1880
347
227
67
−
−
−
−
−
−
−
−
pF
pF
pF
pF
nC
nC
nC
W
iss
DS
GS
C
Output Capacitance
oss
C
Effective Output Capacitance
Energy Related Output Capacitance
Total Gate Charge at 10 V
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
Equivalent Series Resistance
V
DS
V
DS
V
DS
= 0 V to 400 V, V = 0 V
GS
oss(eff.)
C
= 0 V to 400 V, V = 0 V
GS
oss(er.)
Q
= 400 V, I = 37.5 A, V = 10 V
D GS
g(tot)
(Note 4)
Q
gs
Q
87
gd
ESR
f = 1 MHz
2.2
SWITCHING CHARACTERISTICS
t
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
V
= 400 V, I = 37.5 A, V = 10 V
−
−
−
−
46
59
−
−
−
−
ns
ns
ns
ns
d(on)
DD
g
D
GS
R = 2 W
t
r
(Note 4)
t
147
42
d(off)
t
f
SOURCE-DRAIN DIODE CHARACTERISTICS
I
Maximum Continuous Source to Drain Diode Forward Current
Maximum Pulsed Source to Drain Diode Forward Current
−
−
−
−
−
−
−
75
187.5
1.3
−
A
A
S
I
SM
V
SD
Source to Drain Diode Forward Voltage
Reverse Recovery Time
V
V
= 0 V, I = 37.5 A
−
V
GS
SD
t
rr
= 0 V, I = 37.5 A,
179
1098
ns
nC
GS
SD
dI /dt = 100 A/ms
F
Q
Reverse Recovery Charge
−
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Essentially independent of operating temperature typical characteristics.
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3
NVHL027N65S3F
TYPICAL PERFORMANCE CHARACTERISTICS
200
100
200
V
= 10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
VGS=10.0V
GS
8.0V
100
7.0V
6.5V
6.0V
5.5V
5.5 V
10
10
250 ms Pulse Test
TC= 150 o
250 ms Pulse Test
C
T
C
= 255C
1
1
0.1
1
10
, Drain−Source Voltage (V)
DS
20
0.2
1
10
20
V
V
DS
, Drain−Source Voltage (V)
Figure 2. On−Region Characteristics
Figure 1. On−Region Characteristics
0.04
300
100
TC = 25o C
V
DS = 20V
250 ms Pulse Test
0.03
150oC
VGS= 10V
10
25oC
0.02
0.01
VGS= 20V
−55oC
0
50
100
150
200
1
2
3
4
5
6
7
8
I , Drain Current (A)
D
VGS, Gate−Source Voltage (V)
Figure 4. On−Resistance Variation vs.
Figure 3. Transfer Characteristics
Drain Current and Gate Voltage
1000
1000000
100000
10000
1000
VGS= 0 V
250 ms Pulse Test
100
10
Ciss
o
150C
o
25 C
Coss
1
100
−55oC
VGS = 0V
f = 1MHz
0.1
10
Crss
C
C
C
= C + C (C = shorted)
gs gd ds
iss
1
0.01
= C + C
ds gd
oss
rss
= C
gd
0.1
0.001
0.0
0.5
1.0
1.5
2.0
−1
0
1
2
3
10
10
10
10
10
V
SD
, Body Diode Forward Voltage (V)
V
DS
, Drain−Source Voltage (V)
Figure 5. Body Diode Forward Voltage
Variation vs. Source Current and
Temperature
Figure 6. Capacitance Characteristics
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4
NVHL027N65S3F
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
1.2
10
8
ID= 37.5 A
VGS= 0 V
ID = 20 mA
VDS= 130 V
1.1
VDS= 400 V
6
4
2
0
1.0
0.9
0.8
0
60
120
180
240
300
−50
0
50
100
150
Q , Total Gate Charge (nC)
g
T , Junction Temperature (5C)
J
Figure 8. Breakdown Voltage Variation vs.
Temperature
Figure 7. Gate Charge Characteristics
500
100
3.0
VGS= 10 V
ID= 35 A
30ms
2.5
100ms
1ms
2.0
1.5
10ms
10
DC
Operation in This Area
is Limited by RDS(on)
1.0
0.5
1
o
TC= 25 C
T = 150oC
J
Single Pulse
0.0
0.1
−50
0
50
100
150
1
10
100
1000
T , Junction Temperature (5C)
J
V
, Drain−Source Voltage (V)
DS
Figure 10. Maximum Safe Operating Area
Figure 9. On−Resistance Variation vs. Temperature
80
60
60
45
30
40
20
0
15
0
0
130
260
390
520
650
25
50
75
100
125
150
T , Case Temperature (5C)
C
V
DS
, Drain to Source Voltage (V)
Figure 11. Maximum Drain Current vs. Case
Temperature
Figure 12. EOSS vs. Drain to Source Voltage
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5
NVHL027N65S3F
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0
25
50
75
100
125
C)
150
TC, Case Temperature (o
Figure 13. Normalized Power Dissipation vs. Case
Temperature
5000
o
T
= 25 C
C
VGS= 10V
FOR TEMPERATURES
o
ABOVE 25 C DERATE PEAK
CURRENT AS FOLLOWS:
1000
100
10
150 − T
C
I = I
25
125
SINGLE PULSE
−5
−4
−3
−2
−1
0
1
10
10
10
10
t, Rectangular Pulse Duration (s)
Figure 14. Peak Current Capability
10
10
10
300
100
If R = 0
= (L)(I )/(1.3*RATED BV
t
AV
− V
)
AS
DSS
DD
If R =/ 0
t
AV
= (L/R)ln[(I
*R)/(1.3*RATED BV
− V ) +1]
DSS DD
AS
o
Starting T = 25 C
J
10
1
Starting T = 125oC
J
0.001
0.01
0.1
1
10
100
tAV, Time In Avalanche (ms)
NOTE: Refer to Fairchild Application Notes AN7514 and AN7515
Figure 15. Unclamped Inductive Switching Capability
+
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6
NVHL027N65S3F
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
1.2
Pulse Duration = 250 ms
Duty Cycle = 0.5% Max
120
100
80
60
40
20
0
VGS
= V
DS
I
= 3 mA
D
ID= 35 A
1.0
TJ = 150oC
0.8
0.6
0.4
TJ = 25oC
6
7
8
9
10
−50
0
50
100
oC)
150
T
VGS, Gate−Source Voltage (V)
J , Junction Temperature (
Figure 17. Normalized Gate Threshold Voltage
vs. Temperature
Figure 16. RDSON vs. Gate Voltage
2
1
DUTY CYCLE−DESCENDING ORDER
D = 0.5
0.2
0.1
P
DM
0.1
0.05
0.02
0.01
t
1
t
2
0.01
Z
q
(t) = r(t) x R
q
JC
JC
R
= 0.21°C/W
q
JC
Peak T = PDM x Z (t) + T
q
J
JC
C
SINGLE PULSE
Duty Cycle, D = t / t
1
2
0.001
−5
−4
−3
−2
−1
10
10
10
10
10
100
101
102
t, Rectangular Pulse Duration (sec)
Figure 18. Transient Thermal Response Curve
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7
NVHL027N65S3F
V
GS
R
Q
g
L
V
DS
Q
Q
gs
gd
V
GS
DUT
I
G
= Const.
Charge
Figure 19. Gate Charge Test Circuit & Waveform
R
L
V
DS
GS
90%
90%
10%
90%
V
DS
V
DD
V
GS
R
G
10%
V
DUT
V
GS
t
t
d(off)
t
r
t
f
d(on)
t
on
t
off
Figure 20. Resistive Switching Test Circuit & Waveforms
L
2
1
2
EAS
+
@ LIAS
V
DS
BV
DSS
I
D
I
AS
R
G
V
DD
I (t)
D
DUT
V
DD
V
GS
V
DS
(t)
t
p
Time
t
p
Figure 21. Unclamped Inductive Switching Test Circuit & Waveforms
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8
NVHL027N65S3F
+
DUT
V
DS
−
I
SD
L
Driver
R
G
Same Type
as DUT
V
DD
V
GS
− dv/dt controlled by R
G
− I controlled by pulse period
SD
Gate Pulse Width
D +
Gate Pulse Period
V
GS
10 V
(Driver)
I
, Body Diode Forward Current
FM
I
di/dt
SD
(DUT)
I
RM
Body Diode Reverse Current
Body Diode Recovery dv/dt
V
DS
V
DD
V
SD
(DUT)
Body Diode
Forward Voltage Drop
Figure 22. Peak Diode Recovery dv/dt Test Circuit & Waveforms
SUPERFET and FRFET are a registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United
States and/or other countries.
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9
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−247−3LD
CASE 340CX
ISSUE A
DATE 06 JUL 2020
GENERIC
MARKING DIAGRAM*
XXXXX = Specific Device Code
A
Y
= Assembly Location
= Year
WW
G
= Work Week
= Pb−Free Package
XXXXXXXXX
AYWWG
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”, may
or may not be present. Some products may
not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON93302G
TO−247−3LD
PAGE 1 OF 1
ON Semiconductor and
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