Q62702-F1055 [INFINEON]
Silicon N Channel MOSFET Tetrode (Integrated suppression network against spurious VHF oscillations); 硅N沟道MOSFET四极管（抗杂散甚高频振荡抑制综合网络）
| 型号： | Q62702-F1055 |
| 厂家： | 
Infineon |
| 描述： | Silicon N Channel MOSFET Tetrode (Integrated suppression network against spurious VHF oscillations) |
| 文件： | 总7页 (文件大小：119K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Silicon N Channel MOSFET Tetrode
BF 997
● Integrated suppression network against
spurious VHF oscillations
● For VHF applications, especially in TV
tuners with extended VHF band,
e. g. in CATV tuners
Package1)
SOT-143
Type
Marking
Ordering Code
(tape and reel)
Pin Configuration
1
2
3
4
BF 997
MK
Q62702-F1055
S
D
G
2
G
1
Maximum Ratings
Parameter
Symbol
Values
20
Unit
Drain-source voltage
Drain current
V
DS
V
I
D
30
mA
Gate 1/gate 2 peak source current
± IG1/2SM
tot
10
Total power dissipation, T
S
< 76 ˚C
P
200
mW
Storage temperature range
Channel temperature
T
stg
ch
– 55 … + 150 ˚C
150
T
Thermal Resistance
R
th JS
< 370
K/W
Junction - soldering point
1)
For detailed information see chapter Package Outlines..
07.94
Semiconductor Group
1
BF 997
Electrical Characteristics
at T = 25 ˚C, unless otherwise specified.
A
Parameter
Symbol
Values
typ.
Unit
min.
max.
DC Characteristics
Drain-source breakdown voltage
ID = 10 µA, – VG1S = – VG2S = 4 V
V
(BR) DS
20
–
–
–
–
–
–
–
–
–
V
Gate 1 source breakdown voltage
± IG1S = 10 mA, VG2S = VDS = 0
± V(BR) G1SS 8.5
± V(BR) G2SS 8.5
14
14
50
50
20
2.5
2.0
Gate 2 source breakdown voltage
± IG2S = 10 mA, VG1S = VDS = 0
Gate 1 source leakage current
± VG1S = 5 V, VG2S = VDS = 0
± IG1SS
± IG2SS
–
–
2
–
–
nA
Gate 2 source leakage current
± VG2S = 5 V, VG1S = VDS = 0
Drain current
IDSS
mA
V
VDS = 15 V, VG1S = 0, VG2S = 4 V
Gate 1 source pinch-off voltage
= 20 µA
– VG1S (p)
– VG2S (p)
VDS = 15 V, VG2S = 4 V, I
D
Gate 2 source pinch-off voltage
= 20 µA
V
DS = 15 V, VG1S = 0, I
D
Semiconductor Group
2
BF 997
Electrical Characteristics
at T = 25 ˚C, unless otherwise specified.
A
Parameter
Symbol
Values
typ.
Unit
min.
max.
AC Characteristics
Forward transconductance
g
fs
15
–
18
2.5
1.2
25
1
–
–
–
–
–
–
mS
pF
V
DS = 15 V, I
D
= 10 mA, VG2S = 4 V, f = 1 kHz
Gate 1 input capacitance
= 10 mA, VG2S = 4 V, f = 1 MHz
Gate 2 input capacitance
= 10 mA, VG2S = 4 V, f = 1 MHz
Feedback capacitance
= 10 mA, VG2S = 4 V, f = 1 MHz
Output capacitance
C
C
C
C
g1ss
g2ss
dg1
V
DS = 15 V, I
D
–
V
DS = 15 V, I
D
–
fF
V
DS = 15 V, I
D
dss
–
pF
dB
V
DS = 15 V, I
D
= 10 mA, VG2S = 4 V, f = 1 MHz
Power gain
G
ps
–
25
V
DS = 15 V, I
D
= 10 mA
f= 200 MHz, G
G
= 2 mS, G
L
= 0.5 mS
(test circuit)
Noise figure
F
–
1
–
–
–
VDS = 15 V, I = 10 mA
D
f= 200 MHz, G = 2 mS, G
(test circuit)
G
L
= 0.5 mS
Gain control range
DS = 15 V, VG2S = 4 … – 2 V, f = 200 MHz
∆Gps
50
V
(test circuit)
Semiconductor Group
3
BF 997
Total power dissipation Ptot = f (T
A
)
Output characteristics I = f (VDS)
D
VG2S = 4 V
Gate 1 forward transconductance
Gate 1 forward transconductance
gfs1 = f (VG1S
)
gfs1 = f (VG2S)
V
DS = 15 V, IDSS = 10 mA, f = 1 kHz
VDS = 15 V, IDSS = 10 mA, f = 1 kHz
Semiconductor Group
4
BF 997
Drain current I
D
= f (VG1S
)
Gate 1 input capacitance Cg1ss = f (VG1S
G2S = 4 V, VDS = 15 V
DSS = 10 mA, f = 1 MHz
)
VDS = 15 V
V
I
Gate 2 input capacitance Cg2ss = f (VG2S
)
Output capacitance Cdss = f (VDS)
VG1S = 0 V, VDS = 15 V
VG1S = 0 V, VG2S = 4 V
IDSS = 10 mA, f = 1 MHz
IDSS = 10 mA, f = 1 MHz
Semiconductor Group
5
BF 997
Gate 1 input admittance y11s
Gate 1 forward transfer admittance y21s
V
DS = 15 V, VG2S = 4 V
VDS = 15 V, VG2S = 4 V
(common source)
(common source)
Output admittance y22s
V
DS = 15 V, VG2S = 4 V
(common source)
Semiconductor Group
6
BF 997
Power gain Gps = f (VG2S
)
Noise figure F = f (VG2S
)
VDS = 15 V, VG1S = 0 V, IDSS = 10 mA
VDS = 15 V, VG1S = 0 V, IDSS = 10 mA
f= 200 MHz (see test circuit)
f= 200 MHz, (see test circuit)
Test circuit for power gain and noise figure
f= 200 MHz, G
G
= 2 mS, G = 0.5 mS
L
Semiconductor Group
7
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