NSVMMUN2232LT3G [ONSEMI]
NPN 双极数字晶体管 (BRT);
| 型号： | NSVMMUN2232LT3G |
| 厂家： | 
ONSEMI |
| 描述： | NPN 双极数字晶体管 (BRT) 小信号双极晶体管 数字晶体管 |
| 文件： | 总10页 (文件大小：82K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DTC114EM3T5G Series
Digital Transistors (BRT)
NPN Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The digital transistor
contains a single transistor with a monolithic bias network consisting
of two resistors; a series base resistor and a base−emitter resistor. The
digital transistor eliminates these individual components by
integrating them into a single device. The use of a digital transistor can
reduce both system cost and board space. The device is housed in the
SOT−723 package which is designed for low power surface mount
applications.
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NPN SILICON DIGITAL
TRANSISTORS
PIN 3
COLLECTOR
(OUTPUT)
Features
PIN 1
BASE
(INPUT)
R1
R2
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
PIN 2
EMITTER
(GROUND)
• The SOT−723 Package can be Soldered using Wave or Reflow.
• Available in 4 mm, 8000 Unit Tape & Reel
• These are Pb−Free Devices
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
3
SOT−723
CASE 631AA
STYLE 1
Rating
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
Symbol
Value
50
Unit
Vdc
V
V
CBO
CEO
2
1
50
Vdc
I
100
mAdc
C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
MARKING DIAGRAM
xx
xx = Specific Device Code
(See Marking Table on page 2)
M = Date Code
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
March, 2006 − Rev. 3
DTC114EM3/D
DTC114EM3T5G Series
DEVICE MARKING AND RESISTOR VALUES
†
Device
DTC114EM3T5G
Marking
R1 (K)
R2 (K)
Package
Shipping
8A
10
10
DTC124EM3T5G
DTC144EM3T5G
DTC114YM3T5G
DTC114TM3T5G
DTC143TM3T5G
DTC123EM3T5G
DTC143EM3T5G
DTC143ZM3T5G*
DTC124XM3T5G*
DTC123JM3T5G
DTC115EM3T5G
DTC144WM3T5G*
DTC144TM3T5G
8B
8C
8D
8E
8F
8H
8J
22
47
22
47
47
∞
10
10
4.7
2.2
4.7
4.7
22
∞
2.2
4.7
47
47
47
100
22
∞
SOT−723
(Pb−Free)
8000/Tape & Reel
8K
8L
8M
8N
8P
8T
2.2
100
47
47
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*Available upon request.
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
Total Device Dissipation,
P
D
FR−4 Board (Note 1) @ T = 25°C
Derate above 25°C
260
2.0
mW
mW/°C
A
Thermal Resistance, Junction−to−Ambient (Note 1)
R
q
JA
480
°C/W
Total Device Dissipation,
P
D
FR−4 Board (Note 2) @ T = 25°C
Derate above 25°C
600
4.8
mW
mW/°C
A
Thermal Resistance, Junction−to−Ambient (Note 2)
Junction and Storage Temperature Range
R
205
°C/W
°C
q
JA
T , T
J
−55 to +150
stg
1. FR−4 @ minimum pad.
2. FR−4 @ 1.0 × 1.0 inch pad.
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2
DTC114EM3T5G Series
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Collector−Base Cutoff Current (V = 50 V, I = 0)
I
I
−
−
−
−
100
500
nAdc
nAdc
mAdc
CB
E
CBO
CEO
Collector−Emitter Cutoff Current (V = 50 V, I = 0)
CE
B
Emitter−Base Cutoff Current
(V = 6.0 V, I = 0)
DTC114EM3T5G
DTC124EM3T5G
DTC144EM3T5G
DTC114YM3T5G
DTC114TM3T5G
DTC143TM3T5G
DTC123EM3T5G
DTC143EM3T5G
DTC143ZM3T5G
DTC124XM3T5G
DTC123JM3T5G
DTC115EM3T5G
DTC144WM3T5G
DTC144TM3T5G
I
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
0.5
0.2
0.1
0.2
0.9
1.9
2.3
1.5
0.18
0.13
0.2
0.05
0.13
0.2
EBO
EB
C
Collector−Base Breakdown Voltage (I = 10 mA, I = 0)
V
V
50
50
−
−
−
−
Vdc
Vdc
C
E
(BR)CBO
(BR)CEO
Collector−Emitter Breakdown Voltage (Note 3)
(I = 2.0 mA, I = 0)
C
B
ON CHARACTERISTICS (Note 3)
DC Current Gain
DTC114EM3T5G
DTC124EM3T5G
DTC144EM3T5G
DTC114YM3T5G
DTC114TM3T5G
DTC143TM3T5G
DTC123EM3T5G
DTC143EM3T5G
DTC143ZM3T5G
DTC124XM3T5G
DTC123JM3T5G
DTC115EM3T5G
DTC144WM3T5G
DTC144TM3T5G
h
FE
35
60
80
60
−
−
−
−
−
−
−
−
−
−
−
−
−
−
(V = 10 V, I = 5.0 mA)
100
140
140
350
350
15
CE
C
80
160
160
8.0
15
80
80
80
80
80
160
30
200
150
140
150
140
350
Collector−Emitter Saturation Voltage (I = 10 mA, I = 0.3 mA)
V
CE(sat)
−
−
0.25
Vdc
Vdc
C
B
(I = 10 mA, I = 5 mA)
DTC123EM3T5G
C
B
(I = 10 mA, I = 1 mA)
DTC143TM3T5G/DTC114TM3T5G/
DTC143EM3T5G/DTC143ZM3T5G/
DTC124XM3T5G/DTC144TM3T5G
C
B
Output Voltage (on)
(V = 5.0 V, V = 2.5 V, R = 1.0 kW)
V
OL
DTC114EM3T5G
DTC124EM3T5G
DTC114YM3T5G
DTC114TM3T5G
DTC143TM3T5G
DTC123EM3T5G
DTC143EM3T5G
DTC143ZM3T5G
DTC124XM3T5G
DTC123JM3T5G
DTC144EM3T5G
DTC144TM3T5G
DTC115EM3T5G
DTC144WM3T5G
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
CC
B
L
(V = 5.0 V, V = 3.5 V, R = 1.0 kW)
CC
B
L
(V = 5.0 V, V = 5.5 V, R = 1.0 kW)
CC
B
L
(V = 5.0 V, V = 4.0 V, R = 1.0 kW)
CC
B
L
3. Pulse Test: Pulse Width < 300 ms, Duty Cycle < 2.0%.
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3
DTC114EM3T5G Series
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
Characteristic
ON CHARACTERISTICS (Note 4)
Characteristic
Symbol
Min
Typ
Max
Unit
Symbol
Min
Typ
Max
Unit
Output Voltage (off) (V = 5.0 V, V = 0.5 V, R = 1.0 kW)
V
OH
4.9
−
−
Vdc
CC
B
L
(V = 5.0 V, V = 0.25 V, R = 1.0 kW)
DTC143TM3T5G
CC
B
L
DTC143ZM3T5G
DTC114TM3T5G
DTC144TM3T5G
Input Resistor
DTC114EM3T5G
DTC124EM3T5G
DTC144EM3T5G
DTC114YM3T5G
DTC114TM3T5G
DTC143TM3T5G
DTC123EM3T5G
DTC143EM3T5G
DTC143ZM3T5G
DTC124XM3T5G
DTC123JM3T5G
DTC115EM3T5G
DTC144WM3T5G
DTC144TM3T5G
R1
7.0
15.4
32.9
7.0
7.0
3.3
1.5
3.3
3.3
15.4
1.54
70
32.9
32.9
10
22
47
10
10
4.7
2.2
4.7
4.7
22
2.2
100
47
13
28.6
61.1
13
13
6.1
2.9
6.1
6.1
28.6
2.86
130
61.1
61.1
kW
47
Resistor Ratio
R /R
1 2
DTC114EM3T5G/DTC124EM3T5G/
DTC144EM3T5G/DTC115EM3T5G
DTC114YM3T5G
0.8
1.0
1.2
0.17
−
0.8
0.055
0.38
0.038
1.7
0.21
−
1.0
0.25
−
1.2
0.185
0.56
0.056
2.6
DTC143TM3T5G/DTC114TM3T5G/DTC144TM3T5G
DTC123EM3T5G/DTC143EM3T5G
DTC143ZM3T5G
0.1
DTC124XM3T5G
DTC123JM3T5G
DTC144WM3T5G
0.47
0.047
2.1
4. Pulse Test: Pulse Width < 300 ms, Duty Cycle < 2.0%.
300
250
200
150
100
R
q
JA
= 480°C/W
50
0
−ꢀ50
0
50
100
150
T , AMBIENT TEMPERATURE (°C)
A
Figure 1. Derating Curve
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4
DTC114EM3T5G Series
TYPICAL ELECTRICAL CHARACTERISTICS − DTC114EM3T5G
1
1000
I /I = 10
C B
V
= 10 V
T ꢁ=ꢁ−25°C
A
CE
25°C
T ꢁ=ꢁ75°C
A
25°C
0.1
−25°C
75°C
100
0.01
0.001
10
0
20
40
50
1
10
100
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 2. VCE(sat) versus IC
Figure 3. DC Current Gain
4
3
100
10
25°C
75°C
f = 1 MHz
= 0 V
I
E
T ꢁ=ꢁ−25°C
A
T
= 25°C
A
1
0.1
2
1
0
0.01
0.001
V
= 5 V
9
O
0
10
20
30
40
50
0
1
2
3
4
5
6
7
8
10
V , REVERSE BIAS VOLTAGE (VOLTS)
R
V , INPUT VOLTAGE (VOLTS)
in
Figure 4. Output Capacitance
Figure 5. Output Current versus Input Voltage
10
V
= 0.2 V
T ꢁ=ꢁ−25°C
A
O
25°C
75°C
1
0.1
0
10
20
30
40
50
I , COLLECTOR CURRENT (mA)
C
Figure 6. Input Voltage versus Output Current
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5
DTC114EM3T5G Series
TYPICAL ELECTRICAL CHARACTERISTICS − DTC124EM3T5G
1000
1
V
= 10 V
CE
I /I = 10
C B
T ꢁ=ꢁ75°C
A
25°C
25°C
T ꢁ=ꢁ−25°C
A
0.1
−25°C
75°C
100
0.01
10
0.001
1
10
100
0
20
40
50
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 7. VCE(sat) versus IC
Figure 8. DC Current Gain
4
3
2
1
0
100
10
1
75°C
25°C
f = 1 MHz
= 0 V
T ꢁ=ꢁ−25°C
A
I
E
T
A
= 25°C
0.1
0.01
V
= 5 V
O
0.001
0
10
20
30
40
50
0
2
4
6
8
10
V , REVERSE BIAS VOLTAGE (VOLTS)
R
V , INPUT VOLTAGE (VOLTS)
in
Figure 9. Output Capacitance
Figure 10. Output Current versus Input Voltage
100
V
= 0.2 V
O
T ꢁ=ꢁ−25°C
A
10
1
25°C
75°C
0.1
0
10
20
30
40
50
I , COLLECTOR CURRENT (mA)
C
Figure 11. Input Voltage versus Output Current
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6
DTC114EM3T5G Series
TYPICAL ELECTRICAL CHARACTERISTICS − DTC144EM3T5G
10
1
1000
V
= 10 V
CE
I /I = 10
C B
T ꢁ=ꢁ75°C
A
25°C
−25°C
25°C
75°C
100
T ꢁ=ꢁ−25°C
A
0.1
0.01
10
0
20
I , COLLECTOR CURRENT (mA)
40
50
1
10
100
I , COLLECTOR CURRENT (mA)
C
C
Figure 12. VCE(sat) versus IC
Figure 13. DC Current Gain
1
100
10
1
25°C
f = 1 MHz
= 0 V
75°C
I
E
T ꢁ=ꢁ−25°C
A
0.8
T
= 25°C
A
0.6
0.4
0.1
0.01
0.2
0
V
= 5 V
O
0.001
0
10
20
30
40
50
0
2
4
6
8
10
V , REVERSE BIAS VOLTAGE (VOLTS)
R
V , INPUT VOLTAGE (VOLTS)
in
Figure 14. Output Capacitance
Figure 15. Output Current versus Input Voltage
100
V
= 0.2 V
O
T ꢁ=ꢁ−25°C
A
25°C
75°C
10
1
0.1
0
10
20
30
40
50
I , COLLECTOR CURRENT (mA)
C
Figure 16. Input Voltage versus Output Current
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7
DTC114EM3T5G Series
TYPICAL ELECTRICAL CHARACTERISTICS − DTC114YM3T5G
1
300
T ꢁ=ꢁ75°C
A
V
= 10
I /I = 10
C B
CE
T ꢁ=ꢁ−25°C
250
200
150
100
A
25°C
25°C
75°C
0.1
−25°C
0.01
50
0
0.001
0
20
40
60
80
1
2
4
6
8
10 15 20 40 50 60 70 80 90 100
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 17. VCE(sat) versus IC
Figure 18. DC Current Gain
4
3.5
3
100
10
1
f = 1 MHz
= 0 V
T ꢁ=ꢁ75°C
25°C
A
l
E
T
A
= 25°C
−25°C
2.5
2
1.5
1
0.5
0
V
= 5 V
O
0
2
4
6
8
10 15 20 25 30 35 40 45 50
0
2
4
6
8
10
V , REVERSE BIAS VOLTAGE (VOLTS)
R
V , INPUT VOLTAGE (VOLTS)
in
Figure 19. Output Capacitance
Figure 20. Output Current versus Input Voltage
10
V
= 0.2 V
O
T ꢁ=ꢁ−25°C
A
25°C
75°C
1
0.1
0
10
20
30
40
50
I , COLLECTOR CURRENT (mA)
C
Figure 21. Input Voltage versus Output Current
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8
DTC114EM3T5G Series
TYPICAL APPLICATIONS FOR NPN BRTs
+12 V
ISOLATED
LOAD
FROM mP OR
OTHER LOGIC
Figure 22. Level Shifter: Connects 12 or 24 Volt Circuits to Logic
+12 V
V
CC
OUT
IN
LOAD
Figure 23. Open Collector Inverter:
Inverts the Input Signal
Figure 24. Inexpensive, Unregulated Current Source
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9
DTC114EM3T5G Series
PACKAGE DIMENSIONS
SOT−723
CASE 631AA−01
ISSUE B
NOTES:
−X−
E
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
D
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
A
b1
−Y−
3
HE
L
1
2
MILLIMETERS
INCHES
NOM MAX
0.018 0.020 0.022
b 2X
C
DIM MIN
NOM
0.50
0.21
0.31
0.12
MAX
0.55
0.27 0.0059 0.0083 0.0106
0.37 0.010 0.012 0.015
0.17 0.0028 0.0047 0.0067
MIN
e
0.08 (0.0032) X Y
A
b
b1
C
D
E
e
H E
L
0.45
0.15
0.25
0.07
1.15
0.75
1.20
0.80
1.25
0.85
0.045 0.047 0.049
0.03 0.032 0.034
0.016 BSC
STYLE 1:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
0.40 BSC
1.20
0.20
1.15
0.15
1.25
0.045 0.047 0.049
0.25 0.0059 0.0079 0.0098
SOLDERING FOOTPRINT*
0.40
0.0157
0.40
0.0157
1.0
0.039
0.40
0.0157
0.40
0.0157
0.40
0.0157
mm
inches
ǒ
Ǔ
SCALE 20:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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DTC114EM3/D
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